2026-02-19 03:30:27.881 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.36.20:5700'
2026-02-19 03:30:27.881 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.36.20:5802)
2026-02-19 03:30:27.881 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.36.20:5801)
2026-02-19 03:30:27.881 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.36.22:6700'
2026-02-19 03:30:27.881 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.36.22:6802)
2026-02-19 03:30:27.881 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.36.22:6801)
2026-02-19 03:30:27.881 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.36.20:5700/1'
2026-02-19 03:30:27.881 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.36.20:5804)
2026-02-19 03:30:27.881 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.36.20:5803)
2026-02-19 03:30:27.881 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.36.20:5700/2'
2026-02-19 03:30:27.881 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.36.20:5806)
2026-02-19 03:30:27.881 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.36.20:5805)
2026-02-19 03:30:27.881 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.36.20:5700/3'
2026-02-19 03:30:27.881 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.36.20:5808)
2026-02-19 03:30:27.881 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.36.20:5807)
2026-02-19 03:30:27.881 [INFO] fake_trx.py:429 Init complete
2026-02-19 03:30:27.881 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-02-19 03:30:29.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:30:29.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:30:29.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:29.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:29.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:29.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:32.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:32.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:30:32.017 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:32.017 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:30:32.017 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 0 -> 1
2026-02-19 03:30:32.018 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:30:32.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:30:32.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:30:32.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:32.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:32.018 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:30:32.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:30:32.018 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 0 -> 1
2026-02-19 03:30:32.019 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:30:32.019 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:30:32.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:30:32.019 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:32.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:32.019 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:30:32.019 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:30:32.019 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 0 -> 1
2026-02-19 03:30:32.020 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:30:32.020 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:30:32.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:30:32.020 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:32.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:32.020 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:30:32.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:30:32.020 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 0 -> 1
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:30:32.021 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:30:32.021 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:30:32.021 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:30:32.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:32.026 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:30:32.496 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:30:32.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:32.536 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:30:32.537 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:30:32.537 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:30:32.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:32.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:32.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:32.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:32.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:32.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:32.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:32.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:32.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:32.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:32.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:32.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:32.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:32.964 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:30:33.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:33.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:33.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:33.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:33.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:33.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:33.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:33.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:33.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:33.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:33.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:33.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:33.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:33.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:33.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:33.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:33.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:33.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.434 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:30:33.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:33.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:33.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:33.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:33.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:33.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:33.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:33.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:33.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:33.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:33.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:33.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:33.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:33.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:33.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:33.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:33.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:33.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:33.885 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:33.885 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:33.885 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:33.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:30:33.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:33.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:33.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:33.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:33.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:34.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:34.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:34.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:34.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:34.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:34.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:34.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:34.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:34.375 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:30:34.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:34.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:34.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:34.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:34.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:34.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:34.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:34.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:34.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:34.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:34.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:34.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:34.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:34.846 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:30:35.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:35.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:35.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:35.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:30:35.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:35.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:35.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:35.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:35.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:35.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:35.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:35.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:35.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:35.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:35.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:35.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:35.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:35.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:35.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:35.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:35.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:35.788 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:30:36.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:36.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:36.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:36.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:36.258 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:30:36.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:36.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:36.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:36.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:36.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:36.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:36.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:36.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:36.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:36.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:36.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:36.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:36.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:36.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:36.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:36.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:36.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:36.729 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:30:36.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:36.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:36.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:36.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:36.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:36.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:36.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:36.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:36.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:36.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:36.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:36.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:36.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:36.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:37.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:37.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:37.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:37.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:37.200 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:30:37.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:37.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:37.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:37.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:37.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:37.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:37.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:37.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:37.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:37.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:37.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:37.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:37.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:37.672 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:30:37.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:37.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:37.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:37.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:38.144 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:30:38.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:38.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:38.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:38.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:38.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:38.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:38.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:38.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:38.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:38.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:38.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:38.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:38.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:38.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:30:38.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:38.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:38.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:38.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:39.083 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:30:39.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:39.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:39.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:39.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:39.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:39.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:39.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:39.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:39.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:39.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:39.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:39.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:39.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:39.555 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:30:39.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:39.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:39.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:39.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:40.025 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:30:40.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:40.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:40.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:40.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:40.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:40.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:40.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:40.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:40.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:40.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:40.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:40.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:40.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:40.494 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:30:40.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:40.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:40.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:40.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:40.964 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:30:41.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:41.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:41.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:41.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:41.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:41.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:41.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:41.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:41.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:41.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:41.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:41.435 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:30:41.467 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:41.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:41.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:41.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:41.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:41.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:41.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:41.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:41.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:41.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:41.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:41.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:41.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:41.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:41.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:41.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:30:42.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:42.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:42.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:42.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:42.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:42.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:42.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:42.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:42.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:42.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:42.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:42.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:42.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:42.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.372 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:30:42.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:42.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:42.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:42.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:42.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:42.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:42.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:42.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:42.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:42.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:42.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:42.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:42.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:42.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:42.845 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:30:43.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:43.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:43.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:43.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:43.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:43.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:43.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:43.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:43.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:43.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:43.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:43.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:43.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:43.316 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:30:43.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:43.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:43.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:43.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:43.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:43.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:43.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:43.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:43.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:43.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:43.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:43.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:43.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:43.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:43.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:43.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:43.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:43.788 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:30:43.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:43.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:43.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:43.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:44.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:44.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:44.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:44.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:44.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:44.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:44.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:44.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:44.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:44.258 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:30:44.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:44.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:44.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:44.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:44.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:44.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:44.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:44.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:44.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:44.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:44.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:44.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:30:44.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:30:44.727 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:30:44.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:44.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:30:44.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:30:44.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:44.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:45.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:30:45.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:45.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:45.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:45.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:45.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:45.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:45.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:45.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:45.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:45.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:45.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:45.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:30:45.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:30:45.174 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:30:50.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:30:50.172 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:30:50.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:50.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:50.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:50.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:50.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:50.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:30:50.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:50.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:30:50.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:30:50.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:30:50.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:30:50.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:30:50.178 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:50.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:50.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:30:50.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:30:50.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:30:50.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:30:50.179 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:30:50.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:30:50.179 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:50.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:50.179 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:30:50.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:30:50.179 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:30:50.180 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:30:50.180 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:30:50.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:30:50.180 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:50.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:50.180 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:30:50.180 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:30:50.180 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:30:50.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:30:50.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:30:50.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:30:50.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:30:50.181 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:30:50.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:30:50.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:30:50.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:30:50.182 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:30:50.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:50.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:50.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:30:50.657 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:30:50.696 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:30:50.697 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:30:50.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.697 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:30:50.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:50.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:50.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:50.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:50.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 03:30:51.124 [DEBUG] clck_gen.py:113 IND CLOCK 204
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2026-02-19 03:30:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:51.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:51.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:51.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:51.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:51.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:51.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:51.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:51.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:51.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:51.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:51.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:51.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:51.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:30:51.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:30:51.209 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:30:56.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:30:56.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:30:56.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:56.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:56.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:56.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:56.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:56.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:30:56.221 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:56.221 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:30:56.221 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:30:56.222 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:30:56.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:30:56.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:30:56.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:56.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:56.222 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:30:56.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:30:56.222 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:30:56.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:30:56.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:30:56.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:30:56.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:56.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:56.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:30:56.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:30:56.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:30:56.224 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:30:56.224 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:30:56.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:30:56.224 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:30:56.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:56.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:30:56.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:30:56.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:30:56.226 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:30:56.226 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:30:56.226 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:30:56.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:30:56.231 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:30:56.702 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:30:56.756 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:30:56.757 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:30:56.759 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:30:56.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:56.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:30:56.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:30:56.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:30:56.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:56.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:30:56.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:30:56.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:30:56.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:30:56.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:30:56.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:30:56.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:30:56.785 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:30:56.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:30:56.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:30:56.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:30:56.786 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:30:56.786 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.786 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.786 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:30:56.788 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:01.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:31:01.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:31:01.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:01.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:01.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:01.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:01.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:01.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:31:01.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:01.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:31:01.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:31:01.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:31:01.788 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:31:01.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:31:01.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:01.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:01.788 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:31:01.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:31:01.788 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:31:01.789 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:31:01.789 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:31:01.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:31:01.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:01.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:01.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:31:01.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:31:01.789 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:31:01.790 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:31:01.790 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:31:01.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:31:01.790 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:01.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:01.790 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:31:01.790 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:31:01.790 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:31:01.791 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:31:01.792 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:31:01.792 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:31:01.792 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:01.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:01.797 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:31:02.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:31:02.310 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:31:02.311 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:31:02.312 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:31:02.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:02.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:02.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:02.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:02.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:31:02.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:31:02.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:31:02.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:31:02.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:02.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:02.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:02.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:02.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:31:02.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:31:02.333 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:31:07.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:31:07.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:31:07.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:07.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:07.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:07.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:07.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:07.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:31:07.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:07.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:31:07.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:31:07.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:31:07.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:31:07.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:31:07.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:07.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:07.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:31:07.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:31:07.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:31:07.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:31:07.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:31:07.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:31:07.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:07.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:07.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:31:07.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:31:07.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:31:07.365 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:31:07.365 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:31:07.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:31:07.365 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:07.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:07.365 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:31:07.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:31:07.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:31:07.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:31:07.367 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:31:07.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:07.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:07.372 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:31:07.840 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:31:07.880 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:31:07.880 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:31:07.881 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:31:07.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:07.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:07.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:07.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:07.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:07.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:07.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:07.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:07.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:07.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:08.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:08.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:08.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:31:08.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:31:08.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:31:08.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:31:08.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:08.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:08.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:08.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:08.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:31:08.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:31:08.104 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:31:08.104 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=161 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:08.104 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=161 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:08.104 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=161 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:08.104 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=161 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:08.104 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=161 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:08.104 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=161 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:08.104 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=161 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:31:13.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:31:13.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:31:13.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:13.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:13.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:13.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:13.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:31:13.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:31:13.120 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:13.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:31:13.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:31:13.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:31:13.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:31:13.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:31:13.123 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:13.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:31:13.123 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:31:13.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:31:13.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:31:13.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:31:13.126 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:31:13.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:31:13.126 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:13.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:31:13.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:31:13.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:31:13.127 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:31:13.129 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:31:13.129 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:31:13.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:31:13.129 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:31:13.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:31:13.129 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:31:13.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:31:13.129 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:31:13.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:31:13.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:31:13.133 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:31:13.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:31:13.137 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:31:13.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:31:13.660 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:31:13.661 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:31:13.662 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:31:13.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:13.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:13.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:13.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:13.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:13.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:13.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:13.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:13.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:13.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:13.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:13.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:13.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:13.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:13.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:14.076 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:31:14.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:31:14.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:31:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:31:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:31:14.545 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:31:15.017 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:31:15.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:31:15.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:31:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:31:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:31:15.486 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:31:15.957 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:31:16.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:31:16.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:31:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:31:16.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:31:16.427 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:31:16.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:31:17.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:31:17.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:31:17.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:31:17.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:31:17.366 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:31:17.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:17.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:17.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:17.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:17.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:17.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:17.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:17.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:17.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:17.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:17.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:17.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:17.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:17.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:17.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:17.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:17.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:17.835 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:31:18.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:18.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:31:18.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:31:18.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:31:18.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:31:18.306 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:31:18.778 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:31:19.246 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:31:19.719 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:31:20.189 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:31:20.662 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:31:21.136 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:31:21.606 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:31:22.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:22.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:22.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:22.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:22.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:22.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:22.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:22.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:22.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:22.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:22.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:22.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:22.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:22.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:22.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:22.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:22.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:22.075 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:31:22.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:22.542 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:31:23.013 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:31:23.481 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:31:23.950 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:31:24.421 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:31:24.890 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:31:25.362 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:31:25.834 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:31:26.304 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:31:26.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:26.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:26.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:26.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:26.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:26.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:26.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:26.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:26.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:26.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:26.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:26.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:26.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:26.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:26.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:26.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:26.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:26.774 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:31:27.243 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:31:27.711 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:31:28.182 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:31:28.652 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:31:29.123 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:31:29.596 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:31:30.067 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:31:30.536 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:31:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:30.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:30.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:30.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:30.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:30.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:30.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:30.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:30.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:30.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:30.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:30.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:30.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:30.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:31.006 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:31:31.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:31.475 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:31:31.944 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:31:32.419 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:31:32.891 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:31:33.363 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:31:33.833 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:31:34.304 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:31:34.774 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:31:35.245 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:31:35.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:35.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:35.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:35.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:35.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:35.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:35.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:35.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:35.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:35.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:35.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:35.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:35.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:35.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:35.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:35.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:35.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:35.718 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:31:36.192 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:31:36.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:36.664 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:31:37.139 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:31:37.610 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:31:38.079 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:31:38.547 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:31:39.019 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:31:39.490 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:31:39.961 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:31:40.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:40.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:40.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:40.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:40.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:40.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:40.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:40.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:40.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:40.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:40.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:40.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:40.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:40.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:40.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:40.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:40.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:40.432 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:31:40.903 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:31:41.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:41.377 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:31:41.847 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:31:42.321 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:31:42.793 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:31:43.266 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:31:43.740 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:31:44.209 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:31:44.680 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:31:45.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:45.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:45.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:45.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:45.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:45.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:45.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:45.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:45.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:45.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:45.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:45.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:45.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:45.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:45.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:45.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:45.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:45.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:45.151 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:31:45.620 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:31:45.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:46.092 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:31:46.562 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:31:47.033 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 03:31:47.509 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 03:31:47.979 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 03:31:48.452 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 03:31:48.922 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 03:31:49.391 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 03:31:49.861 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 03:31:49.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:49.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:49.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:49.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:49.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:49.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:49.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:49.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:49.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:49.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:49.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:49.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:49.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:49.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:49.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:49.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:49.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:50.329 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 03:31:50.802 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 03:31:50.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:51.274 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 03:31:51.748 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 03:31:52.217 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 03:31:52.688 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 03:31:53.157 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 03:31:53.627 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 03:31:54.099 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 03:31:54.569 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 03:31:54.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:54.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:54.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:54.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:54.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:54.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:54.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:54.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:54.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:54.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:54.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:54.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:54.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:31:54.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:54.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:54.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:54.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:54.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:55.040 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 03:31:55.511 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 03:31:55.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:55.981 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 03:31:56.452 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 03:31:56.923 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 03:31:57.394 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 03:31:57.866 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 03:31:58.336 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 03:31:58.806 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 03:31:59.276 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 03:31:59.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:59.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:59.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:59.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:59.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:31:59.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:31:59.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:31:59.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:59.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:59.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:59.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:31:59.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:31:59.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:31:59.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:31:59.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:31:59.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:59.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:31:59.746 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 03:32:00.214 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 03:32:00.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:00.683 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 03:32:01.152 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 03:32:01.620 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 03:32:02.089 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 03:32:02.558 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 03:32:03.027 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 03:32:03.496 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 03:32:03.966 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 03:32:04.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:04.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:04.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:04.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:04.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:04.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:04.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:04.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:04.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:04.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:04.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:04.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:04.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:04.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:04.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:04.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:04.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:04.437 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 03:32:04.906 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 03:32:05.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:05.380 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 03:32:05.849 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 03:32:06.317 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 03:32:06.788 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 03:32:07.256 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 03:32:07.726 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 03:32:08.196 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 03:32:08.665 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 03:32:09.133 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 03:32:09.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:09.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:09.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:09.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:09.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:09.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:09.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:09.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:09.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:09.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:09.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:09.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:09.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:09.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:09.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:09.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:09.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:09.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:09.604 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 03:32:10.072 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 03:32:10.541 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 03:32:11.012 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 03:32:11.482 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 03:32:11.951 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 03:32:12.420 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 03:32:12.891 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 03:32:13.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:13.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:13.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:13.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:13.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:13.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:13.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:13.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:13.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:13.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:13.297 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:13.297 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:13.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:13.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:13.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:13.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:13.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:13.361 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 03:32:13.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:13.830 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 03:32:14.299 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 03:32:14.766 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 03:32:15.235 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 03:32:15.704 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 03:32:16.173 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 03:32:16.641 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 03:32:17.109 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 03:32:17.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:17.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:17.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:17.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:17.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:17.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:17.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:17.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:17.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:17.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:17.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:17.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:17.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:17.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:17.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:17.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:17.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:17.580 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 03:32:17.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:18.047 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 03:32:18.516 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 03:32:18.985 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 03:32:19.454 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 03:32:19.923 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 03:32:20.391 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 03:32:20.861 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 03:32:21.330 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 03:32:21.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:21.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:21.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:21.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:21.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:21.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:21.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:21.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:21.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:21.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:21.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:21.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:21.800 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 03:32:21.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:21.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:21.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:21.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:21.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:22.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:22.271 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 03:32:22.739 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 03:32:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 03:32:23.680 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 03:32:24.148 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 03:32:24.617 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 03:32:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 03:32:25.555 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 03:32:26.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:26.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:26.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:26.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:26.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:26.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:26.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:26.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:26.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:26.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:26.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:26.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:26.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:26.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:26.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:26.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:26.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:26.025 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 03:32:26.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:26.497 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 03:32:26.967 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 03:32:27.438 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 03:32:27.909 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 03:32:28.380 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 03:32:28.850 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 03:32:29.318 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 03:32:29.786 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 03:32:30.254 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 03:32:30.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:30.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:30.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:30.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:30.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:30.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:30.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:30.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:30.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:30.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:30.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:30.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:30.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:30.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:30.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:30.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:30.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:30.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:30.722 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 03:32:31.189 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 03:32:31.658 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 03:32:32.126 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 03:32:32.593 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 03:32:33.061 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-19 03:32:33.529 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-19 03:32:33.996 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-19 03:32:34.464 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-19 03:32:34.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:34.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:34.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:34.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:34.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:34.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:34.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:34.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:34.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:34.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:34.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:34.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:34.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:34.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:34.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:34.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:34.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:34.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:34.932 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-19 03:32:35.400 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-19 03:32:35.889 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-19 03:32:36.357 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-19 03:32:36.825 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-19 03:32:37.293 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-19 03:32:37.762 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-19 03:32:38.230 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-19 03:32:38.698 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-19 03:32:38.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:38.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:38.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:38.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:38.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:38.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:38.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:38.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:38.896 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:38.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:38.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:38.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:38.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:38.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:38.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:38.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:38.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:39.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:39.165 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-19 03:32:39.633 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-19 03:32:40.100 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-19 03:32:40.568 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-19 03:32:41.037 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-19 03:32:41.506 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-19 03:32:41.974 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-19 03:32:42.441 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-19 03:32:42.909 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-19 03:32:43.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:43.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:43.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:43.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:32:43.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:32:43.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:32:43.144 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:43.145 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19536 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:32:48.145 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:32:48.145 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:32:48.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:32:48.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:32:48.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:32:48.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:32:48.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:32:48.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:32:48.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:48.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:32:48.152 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:32:48.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:32:48.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:32:48.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:32:48.152 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:32:48.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:32:48.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:32:48.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:32:48.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:32:48.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:32:48.154 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:32:48.154 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:32:48.154 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:48.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:32:48.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:32:48.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:32:48.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:32:48.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:32:48.156 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:32:48.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:32:48.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:32:48.157 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:48.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:32:53.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:32:53.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:32:53.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:32:53.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:32:53.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:32:53.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:32:53.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:32:53.165 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:53.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:32:53.165 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:32:53.166 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:32:53.166 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:32:53.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:32:53.167 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:53.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:32:53.167 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:32:53.167 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:32:53.167 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:32:53.168 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:32:53.168 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:32:53.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:32:53.168 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:53.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:32:53.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:32:53.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:32:53.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:32:53.169 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:32:53.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:32:53.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:32:53.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:32:53.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:32:53.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:32:53.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:32:53.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:32:53.171 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:32:53.171 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:32:53.171 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.171 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:53.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:32:53.176 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:32:53.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:32:53.683 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:32:53.684 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:32:53.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:53.684 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:32:53.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:53.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:53.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:53.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:53.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:53.693 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:53.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:53.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:53.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:53.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:53.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:53.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:53.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:53.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:53.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:53.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:53.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:53.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:53.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:53.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:53.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:53.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:53.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:53.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:53.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:53.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:53.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:53.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:53.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:53.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.113 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:32:54.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:32:54.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:32:54.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:32:54.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:32:54.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:54.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:54.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:54.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:54.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:54.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:54.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:54.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:54.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:54.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:54.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:54.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:54.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:54.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:54.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:54.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:54.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:54.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:54.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:54.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:54.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:54.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:54.581 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:32:54.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:54.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:54.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:54.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:54.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:55.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:55.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:55.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:55.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:55.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:55.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:55.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:55.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:55.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:55.048 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:32:55.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:55.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:55.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:55.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:32:55.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:32:55.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:32:55.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:32:55.516 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:32:55.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:55.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:55.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:55.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:55.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:55.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:55.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:55.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:55.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:55.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:55.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:55.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:55.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:55.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:55.984 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:32:56.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:56.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:56.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:56.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:56.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:56.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:56.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:56.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:56.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:56.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:56.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:56.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:56.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:56.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:32:56.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:32:56.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:32:56.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:32:56.452 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:32:56.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:56.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:56.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:56.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:56.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:56.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:56.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:56.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:56.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:56.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:56.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:56.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:56.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:56.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:56.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:56.919 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:32:57.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:57.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:57.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:57.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:57.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:57.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:57.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:57.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:57.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:57.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:32:57.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:32:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:32:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:32:57.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:57.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:57.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:57.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.388 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:32:57.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:57.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:57.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:57.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:57.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:57.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:57.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:57.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:57.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:57.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:57.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:32:57.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:57.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:57.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:57.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:57.855 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:32:58.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:32:58.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:32:58.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:32:58.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:32:58.323 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:32:58.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:58.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:58.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:58.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:58.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:58.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:58.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:58.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:58.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:58.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:58.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:58.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:58.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:58.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:58.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:58.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:58.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:58.792 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:32:59.260 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:32:59.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:59.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:59.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:59.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:59.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:32:59.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:32:59.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:32:59.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:59.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:59.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:59.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:32:59.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:32:59.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:32:59.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:32:59.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:32:59.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:59.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:32:59.730 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:33:00.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:00.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:00.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:00.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:00.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:00.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:00.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:00.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:00.093 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:00.093 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:00.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:00.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:00.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:00.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.197 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:33:00.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:00.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:00.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:00.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:00.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:00.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:00.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:00.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:00.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:00.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:00.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:00.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:00.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:00.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.665 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:33:00.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:00.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:00.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:00.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:00.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:00.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:00.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:00.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:00.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:00.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:00.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:00.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:00.899 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:00.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:00.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.134 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:33:01.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:01.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:01.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:01.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:01.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:01.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:01.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:01.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:01.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:01.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:01.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:01.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:01.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:01.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.602 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:33:01.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:01.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:01.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:01.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:01.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:01.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:01.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:01.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:01.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:01.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:01.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:01.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:01.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:01.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:01.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:01.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:02.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:02.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:02.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:02.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:02.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:02.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:02.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:02.069 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:33:02.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:02.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:02.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:02.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:02.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:02.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:02.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:02.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:02.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:02.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:02.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:02.485 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:02.485 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:02.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:02.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:02.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:02.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.537 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:33:02.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:02.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:02.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:02.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:02.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:02.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:02.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:02.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:02.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:02.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:02.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:03.005 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:33:03.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:03.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:03.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:03.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:03.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:03.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:03.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:03.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:03.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:03.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:03.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:03.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:33:03.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:33:03.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:33:03.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:33:03.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:33:03.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:33:03.452 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:33:03.452 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2241 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:33:03.452 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2241 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:33:03.452 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2241 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:33:03.452 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2241 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:33:03.452 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2241 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:33:03.452 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2241 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:33:08.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:33:08.452 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:33:08.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:33:08.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:33:08.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:33:08.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:33:08.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:33:08.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:33:08.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:08.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:33:08.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:33:08.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:33:08.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:33:08.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:33:08.460 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:08.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:33:08.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:33:08.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:33:08.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:33:08.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:33:08.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:33:08.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:33:08.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:08.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:33:08.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:33:08.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:33:08.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:33:08.462 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:33:08.462 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:33:08.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:33:08.462 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:08.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:33:08.462 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:33:08.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:33:08.462 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:33:08.464 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:33:08.464 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:33:08.464 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:08.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:08.469 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:33:08.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:33:08.976 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:33:08.977 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:33:08.977 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:33:08.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:08.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:08.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:08.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:08.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:08.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:08.985 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:08.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:08.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:09.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:09.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:09.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:09.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:09.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:09.406 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:33:09.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:09.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:09.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:09.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:09.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:09.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:09.874 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:33:10.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:10.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:10.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:10.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:10.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:10.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:10.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:10.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:10.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:10.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:10.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:10.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:10.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:10.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:10.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:10.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:10.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:10.342 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:33:10.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:10.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:10.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:10.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:10.809 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:33:11.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:11.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:11.278 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:33:11.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:11.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:11.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:11.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:11.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:11.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:11.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:11.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:11.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:11.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:11.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:11.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:11.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:11.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:11.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:11.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:11.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:11.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:11.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:11.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:11.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:11.745 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:33:12.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:12.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:12.214 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:33:12.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:12.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:12.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:12.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:12.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:12.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:12.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:12.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:12.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:12.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:12.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:12.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:12.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:12.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:12.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:12.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:12.685 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:33:12.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:12.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:12.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:12.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:12.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:13.154 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:33:13.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:13.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:13.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:13.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:13.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:13.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:13.622 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:33:14.090 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:33:14.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:14.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:14.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:14.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:14.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:14.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:14.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:14.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:14.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:14.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:14.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:14.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:14.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:14.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:14.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:14.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:14.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:14.613 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:33:15.081 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:33:15.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:15.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:15.549 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:33:15.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:15.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:15.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:15.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:15.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:15.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:15.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:15.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:15.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:15.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:15.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:15.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:15.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:15.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:15.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:15.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:15.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:16.017 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:33:16.485 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:33:16.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:16.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:16.953 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:33:17.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:17.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:17.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:17.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:17.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:17.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:17.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:17.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:17.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:17.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:17.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:17.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:17.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:17.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:17.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:17.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:17.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:17.422 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:33:17.890 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:33:18.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:18.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:18.357 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:33:18.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:18.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:18.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:18.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:18.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:18.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:18.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:18.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:18.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:18.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:18.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:18.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:18.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:18.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:18.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:18.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:18.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:18.824 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:33:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:33:19.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:19.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:19.760 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:33:20.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:20.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:20.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:20.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:20.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:20.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:20.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:20.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:20.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:20.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:20.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:20.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:20.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:20.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:20.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:20.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:20.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:20.228 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:33:20.696 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:33:21.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:21.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:21.164 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:33:21.631 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:33:21.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:21.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:21.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:21.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:21.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:21.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:21.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:21.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:21.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:21.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:21.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:21.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:21.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:21.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:21.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:21.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:21.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:21.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:22.100 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:33:22.569 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:33:23.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:23.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:23.037 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:33:23.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:23.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:23.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:23.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:23.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:23.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:23.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:23.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:23.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:23.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:23.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:23.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:23.506 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:33:23.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:23.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:23.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:23.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:23.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:23.973 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:33:24.442 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:33:24.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:24.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:33:24.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:24.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:24.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:24.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:24.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:24.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:24.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:24.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:24.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:24.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:24.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:24.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:24.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:24.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:24.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:24.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:24.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:25.378 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:33:25.847 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:33:25.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:25.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:26.315 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:33:26.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:26.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:26.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:26.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:26.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:26.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:26.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:26.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:26.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:26.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:26.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:26.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:26.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:26.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:26.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:26.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:26.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:26.783 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:33:27.251 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:33:27.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:27.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:27.720 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:33:27.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:27.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:27.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:27.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:27.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:27.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:27.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:27.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:27.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:27.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:27.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:27.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:27.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:27.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:27.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:27.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:27.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:28.188 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:33:28.656 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:33:28.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:28.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:29.124 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:33:29.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:29.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:29.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:29.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:29.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:29.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:29.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:29.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:29.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:29.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:29.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:29.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:29.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:29.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:29.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:29.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:29.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:29.592 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:33:30.062 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:33:30.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:30.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:30.531 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:33:30.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:30.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:30.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:30.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:30.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:30.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:30.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:30.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:30.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:30.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:30.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:30.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:30.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:30.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:30.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:30.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:30.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:30.999 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:33:31.468 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:33:31.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:31.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:31.935 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:33:32.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:32.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:32.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:32.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:32.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:32.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:32.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:32.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:32.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:32.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:32.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:32.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:32.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:32.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:32.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:32.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:32.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:32.430 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:33:32.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:32.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:32.898 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:33:33.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:33.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:33.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:33.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:33.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:33.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:33.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:33.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:33.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:33.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:33.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:33.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:33.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:33.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:33.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:33.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:33.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:33.366 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:33:33.834 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:33:34.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:34.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:34.302 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:33:34.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:34.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:34.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:34.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:34.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:34.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:34.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:34.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:34.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:34.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:34.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:34.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:34.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:34.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:34.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:34.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:34.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:34.770 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:33:35.239 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:33:35.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:35.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:35.706 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:33:36.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:36.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:36.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:36.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:36.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:36.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:36.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:36.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:36.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:36.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:36.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:36.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:36.174 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:33:36.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:36.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:36.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:36.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:36.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:36.642 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:33:37.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:37.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:37.112 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:33:37.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:37.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:37.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:37.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:37.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:37.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:37.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:37.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:37.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:33:37.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:33:37.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:33:37.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:33:37.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:33:37.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:33:37.558 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:33:42.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:33:42.558 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:33:42.558 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:33:42.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:33:42.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:33:42.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:33:42.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:33:42.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:33:42.566 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:42.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:33:42.566 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:33:42.568 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:33:42.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:33:42.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:33:42.568 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:42.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:33:42.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:33:42.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:33:42.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:33:42.570 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:33:42.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:33:42.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:33:42.570 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:42.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:33:42.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:33:42.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:33:42.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:33:42.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:33:42.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:33:42.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:33:42.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:33:42.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:33:42.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:33:42.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:33:42.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:33:42.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:33:42.576 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:33:42.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:33:42.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:33:43.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:33:43.093 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:33:43.094 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:33:43.094 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:33:43.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:43.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:43.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:43.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:43.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:43.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:43.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:43.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:43.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:43.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:43.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:43.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:43.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:43.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:43.519 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:33:43.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:43.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:43.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:43.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:43.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:33:44.456 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:33:44.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:44.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:44.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:44.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:44.924 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:33:45.395 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:33:45.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:45.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:45.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:45.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:45.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:33:46.330 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:33:46.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:46.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:46.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:46.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:46.798 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:33:46.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:46.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:46.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:46.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:47.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:47.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:47.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:47.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:47.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:47.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:47.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:47.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:47.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:47.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:47.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:47.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:47.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:47.266 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:33:47.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:33:47.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:33:47.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:33:47.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:33:47.734 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:33:48.202 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:33:48.670 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:33:49.138 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:33:49.608 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:33:50.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:33:50.543 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:33:51.011 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:33:51.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:51.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:51.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:51.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:51.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:51.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:51.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:51.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:51.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:51.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:51.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:51.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:51.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:51.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:51.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:51.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:51.479 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:33:51.946 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:33:52.415 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:33:52.884 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:33:53.352 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:33:53.820 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:33:54.287 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:33:54.755 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:33:55.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:55.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:55.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:55.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:55.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:55.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:55.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:55.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:55.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:55.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:55.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:55.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:55.223 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:33:55.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:55.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:55.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:55.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:55.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:55.691 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:33:56.159 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:33:56.626 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:33:57.094 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:33:57.562 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:33:58.030 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:33:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:33:58.965 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:33:59.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:59.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:59.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:59.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:59.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:33:59.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:33:59.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:33:59.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:59.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:59.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:59.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:33:59.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:33:59.433 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:33:59.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:33:59.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:33:59.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:33:59.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:59.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:33:59.901 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:34:00.369 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:34:00.837 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:34:01.305 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:34:01.772 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:34:02.241 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:34:02.709 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:34:03.178 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:34:03.645 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:34:04.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:04.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:04.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:04.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:04.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:04.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:04.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:04.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:04.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:04.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:04.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:04.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:04.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:04.113 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:34:04.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:04.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:04.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:04.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:04.581 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:34:05.049 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:34:05.517 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:34:05.985 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:34:06.468 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:34:06.936 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:34:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:34:07.872 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:34:08.340 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:34:08.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:08.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:08.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:08.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:08.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:08.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:08.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:08.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:08.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:08.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:08.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:08.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:08.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:08.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:08.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:08.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:08.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:08.807 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:34:09.275 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:34:09.743 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:34:10.211 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:34:10.679 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:34:11.147 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:34:11.615 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:34:12.083 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:34:12.551 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:34:12.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:12.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:12.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:12.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:12.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:12.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:12.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:12.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:12.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:12.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:12.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:12.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:12.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:34:12.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:12.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:12.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:12.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:12.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:13.019 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:34:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:34:13.956 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:34:14.424 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:34:14.892 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:34:15.360 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:34:15.829 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:34:16.297 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 03:34:16.765 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 03:34:17.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:17.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:17.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:17.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:17.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:17.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:17.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:17.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:17.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:17.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:17.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:17.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:17.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:17.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:17.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:17.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:17.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:17.234 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 03:34:17.702 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 03:34:18.171 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 03:34:18.639 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 03:34:19.108 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 03:34:19.577 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 03:34:20.046 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 03:34:20.515 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 03:34:20.983 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 03:34:21.452 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 03:34:21.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:21.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:21.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:21.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:21.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:21.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:21.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:21.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:21.501 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:21.501 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:21.501 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:21.501 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:34:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:21.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:21.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:21.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:21.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:21.920 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 03:34:22.389 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 03:34:22.857 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 03:34:23.326 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 03:34:23.795 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 03:34:24.263 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 03:34:24.731 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 03:34:25.199 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 03:34:25.667 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 03:34:25.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:25.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:25.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:25.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:25.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:25.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:25.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:25.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:25.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:25.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:25.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:25.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:25.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:25.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:25.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:25.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:25.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:26.135 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 03:34:26.603 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 03:34:27.071 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 03:34:27.539 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 03:34:28.007 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 03:34:28.475 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 03:34:28.943 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 03:34:29.411 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 03:34:29.878 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 03:34:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:30.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:30.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:30.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:30.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:30.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:30.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:30.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:30.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:30.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:30.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:30.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:30.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:30.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:30.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:30.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:30.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:30.346 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 03:34:30.815 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 03:34:31.284 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 03:34:31.753 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 03:34:32.221 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 03:34:32.690 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 03:34:33.159 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 03:34:33.629 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 03:34:34.098 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 03:34:34.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:34.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:34.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:34.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:34.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:34.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:34.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:34.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:34.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:34.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:34.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:34.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:34.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:34.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:34.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:34.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:34.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:34.567 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 03:34:35.035 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 03:34:35.504 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 03:34:35.972 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 03:34:36.441 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 03:34:36.909 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 03:34:37.377 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 03:34:37.845 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 03:34:38.313 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 03:34:38.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:38.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:38.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:38.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:38.475 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:38.475 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:38.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:38.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:38.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:38.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:38.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:38.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:38.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:38.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:38.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:38.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:38.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:38.782 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 03:34:39.250 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 03:34:39.719 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 03:34:40.188 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 03:34:40.658 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 03:34:41.128 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 03:34:41.598 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 03:34:42.066 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 03:34:42.534 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 03:34:42.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:42.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:42.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:42.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:42.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:42.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:42.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:42.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:42.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:42.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:42.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:42.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:42.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:42.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:42.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:42.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:42.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:43.002 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 03:34:43.470 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 03:34:43.939 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 03:34:44.406 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 03:34:44.875 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 03:34:45.343 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 03:34:45.813 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 03:34:46.281 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 03:34:46.750 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 03:34:46.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:46.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:46.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:46.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:46.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:46.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:46.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:46.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:46.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:46.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:46.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:46.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:46.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:46.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:46.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:46.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:46.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:47.219 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 03:34:47.688 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 03:34:48.156 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 03:34:48.625 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 03:34:49.096 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 03:34:49.564 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 03:34:50.033 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 03:34:50.501 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 03:34:50.970 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 03:34:51.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:51.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:51.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:51.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:51.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:51.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:51.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:51.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:51.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:51.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:51.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:51.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:51.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:51.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:51.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:51.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 03:34:51.906 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 03:34:52.374 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 03:34:52.842 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 03:34:53.310 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 03:34:53.778 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 03:34:54.246 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 03:34:54.715 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 03:34:55.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:55.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:55.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:55.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:55.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:55.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:55.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:55.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:55.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:55.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:55.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:55.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:55.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:55.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:55.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:55.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:55.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:55.182 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 03:34:55.651 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 03:34:56.118 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 03:34:56.586 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 03:34:57.054 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 03:34:57.521 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 03:34:57.989 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 03:34:58.457 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 03:34:58.925 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 03:34:59.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:59.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:59.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:59.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:59.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:34:59.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:34:59.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:34:59.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:59.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:59.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:59.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:34:59.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:34:59.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:34:59.392 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:34:59.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:34:59.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:59.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:34:59.393 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 03:34:59.861 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 03:35:00.329 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 03:35:00.798 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 03:35:01.266 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 03:35:01.736 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 03:35:02.204 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-19 03:35:02.672 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-19 03:35:03.140 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-19 03:35:03.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:03.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:03.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:03.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:03.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:03.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:03.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:03.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:03.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:03.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:03.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:03.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:03.608 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-19 03:35:03.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:03.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:03.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:03.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:03.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:04.078 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-19 03:35:04.547 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-19 03:35:05.016 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-19 03:35:05.484 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-19 03:35:05.952 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-19 03:35:06.420 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-19 03:35:06.888 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-19 03:35:07.357 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-19 03:35:07.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:07.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:07.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:07.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:07.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:35:07.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:35:07.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:35:07.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:35:07.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:35:07.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:35:07.805 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:35:07.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:35:07.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:35:07.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:35:07.805 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:35:12.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:35:12.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:35:12.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:35:12.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:35:12.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:35:12.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:35:12.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:35:12.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:35:12.809 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:12.809 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:35:12.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:35:12.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:35:12.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:35:12.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:35:12.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:12.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:35:12.811 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:35:12.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:35:12.812 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:35:12.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:35:12.812 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:35:12.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:35:12.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:12.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:35:12.813 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:35:12.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:35:12.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:35:12.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:35:12.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:35:12.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:35:12.814 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:12.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:35:12.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:35:12.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:35:12.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:35:12.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:35:12.815 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:35:12.815 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:12.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:35:12.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:12.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:35:12.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:35:12.817 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:35:12.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:35:12.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:35:17.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:35:17.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:35:17.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:35:17.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:35:17.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:35:17.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:35:17.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:35:17.822 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:17.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:35:17.822 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:35:17.823 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:35:17.823 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:35:17.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:35:17.823 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:17.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:35:17.823 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:35:17.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:35:17.823 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:35:17.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:35:17.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:35:17.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:35:17.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:17.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:35:17.824 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:35:17.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:35:17.824 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:35:17.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:35:17.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:35:17.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:35:17.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:35:17.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:35:17.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:35:17.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:35:17.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.827 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:35:17.827 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:35:17.827 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:35:17.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:35:17.832 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:35:18.301 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:35:18.342 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:35:18.342 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:35:18.342 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:35:18.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:18.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:18.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:18.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:18.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:18.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:18.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:18.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:18.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:18.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:18.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:18.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:18.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:18.770 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:35:18.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:35:18.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:35:18.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:35:18.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:35:19.238 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:35:19.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:35:19.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:35:19.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:35:19.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:35:19.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:35:20.203 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:35:20.674 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:35:20.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:35:20.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:35:20.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:35:20.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:35:21.145 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:35:21.614 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:35:21.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:35:21.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:35:21.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:35:21.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:35:22.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:35:22.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:22.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:22.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:22.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:22.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:22.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:22.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:22.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:22.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:22.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:22.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:22.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:22.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:22.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:22.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:22.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:22.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:22.553 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:35:22.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:35:22.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:35:22.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:35:22.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:35:23.023 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:35:23.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:35:23.964 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:35:24.435 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:35:24.905 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:35:25.376 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:35:25.850 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:35:26.321 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:35:26.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:26.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:26.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:26.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:26.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:26.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:26.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:26.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:26.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:26.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:26.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:26.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:26.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:26.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:26.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:26.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:26.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:26.792 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:35:27.263 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:35:27.733 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:35:28.203 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:35:28.673 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:35:29.144 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:35:29.615 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:35:30.086 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:35:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:35:31.025 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:35:31.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:31.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:31.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:31.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:31.181 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:31.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:31.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:31.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:31.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:31.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:31.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:31.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:31.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:31.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:31.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:31.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:31.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:31.495 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:35:31.965 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:35:32.435 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:35:32.906 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:35:33.375 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:35:33.845 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:35:34.316 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:35:34.787 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:35:35.256 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:35:35.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:35.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:35.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:35.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:35.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:35.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:35.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:35.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:35.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:35.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:35.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:35.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:35.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:35.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:35.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:35.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:35.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:35.724 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:35:36.191 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:35:36.659 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:35:37.126 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:35:37.596 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:35:38.189 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:35:38.664 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:35:39.132 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:35:39.602 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:35:40.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:40.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:40.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:40.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:40.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:40.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:40.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:40.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:40.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:40.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:40.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:40.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:40.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:40.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:40.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:40.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:40.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:40.072 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:35:40.541 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:35:41.012 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:35:41.482 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:35:41.951 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:35:42.420 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:35:42.888 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:35:43.357 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:35:43.825 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:35:44.292 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:35:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:44.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:44.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:44.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:44.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:44.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:44.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:44.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:44.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:44.518 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:44.518 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:44.518 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:44.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:44.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:44.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:44.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:44.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:44.760 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:35:45.227 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:35:45.695 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:35:46.165 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:35:46.634 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:35:47.102 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:35:47.570 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:35:48.038 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:35:48.532 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:35:48.999 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:35:49.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:49.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:49.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:49.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:49.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:49.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:49.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:49.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:49.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:49.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:49.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:49.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:49.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:35:49.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:49.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:49.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:49.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:49.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:49.468 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:35:50.054 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:35:50.530 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:35:51.211 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:35:51.680 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:35:52.148 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 03:35:52.616 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 03:35:53.083 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 03:35:53.551 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 03:35:54.019 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 03:35:54.486 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 03:35:54.953 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 03:35:55.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:55.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:55.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:55.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:55.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:55.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:55.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:35:55.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:55.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:55.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:55.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:35:55.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:35:55.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:35:55.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:35:55.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:35:55.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:55.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:35:55.421 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 03:35:55.888 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 03:35:56.357 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 03:35:56.829 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 03:35:57.298 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 03:35:57.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:35:57.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:35:57.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:35:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:35:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:35:57.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:35:57.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:35:57.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:35:57.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:35:57.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:35:57.330 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:35:57.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:35:57.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:02.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:36:05.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:36:05.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:05.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:05.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:05.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:36:05.209 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:05.209 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:36:05.209 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:36:05.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:36:05.214 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:36:05.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:36:05.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:05.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:05.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:36:05.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:36:05.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:36:05.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:36:05.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:36:05.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:36:05.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:05.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:05.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:36:05.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:36:05.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:36:05.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:36:05.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:36:05.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:36:05.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:05.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:05.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:36:05.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:36:05.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:36:05.218 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:36:05.218 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:05.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:36:05.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:36:05.219 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:36:05.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:36:10.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:36:10.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:10.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:10.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:10.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:10.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:10.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:36:10.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:10.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:36:10.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:36:10.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:36:10.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:36:10.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:36:10.226 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:10.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:10.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:36:10.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:36:10.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:36:10.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:36:10.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:36:10.227 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:36:10.227 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:10.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:10.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:36:10.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:36:10.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:36:10.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:36:10.229 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:36:10.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:36:10.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:10.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:10.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:36:10.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:36:10.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:36:10.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:36:10.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:36:10.231 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:10.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:10.235 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:36:10.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:36:10.743 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:36:10.744 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:36:10.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:10.744 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:36:10.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:10.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:10.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:10.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:10.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:10.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:10.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:10.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:10.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:10.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:10.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:10.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:10.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:11.172 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:36:11.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:11.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:11.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:11.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:11.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:36:11.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:11.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:11.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:11.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:11.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:11.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:11.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:11.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:11.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:11.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:11.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:11.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:11.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:11.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:11.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:11.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:11.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:12.109 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:36:12.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:12.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:12.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:12.577 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:36:13.045 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:36:13.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:13.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:13.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:13.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:13.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:13.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:13.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:13.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:13.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:13.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:13.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:13.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:13.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:13.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:13.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:13.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:13.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:13.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:13.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:13.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:13.512 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:36:13.980 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:36:14.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:14.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:14.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:14.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:14.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:14.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:14.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:14.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:14.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:14.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:14.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:14.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:14.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:14.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:14.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:14.447 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:36:14.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:14.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:14.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:14.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:14.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:14.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:36:15.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:15.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:15.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:15.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:15.382 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:36:15.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:15.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:15.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:15.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:15.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:15.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:15.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:15.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:15.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:15.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:15.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:15.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:15.850 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:36:15.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:15.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:15.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:15.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:15.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:16.318 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:36:16.785 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:36:17.254 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:36:17.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:17.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:17.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:17.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:17.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:17.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:17.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:17.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:17.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:17.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:17.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:17.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:17.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:17.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:17.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:17.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:17.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:17.723 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:36:18.199 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:36:18.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:18.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:18.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:18.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:18.408 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1781 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:18.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:18.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:18.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:18.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:18.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:18.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:18.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:18.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:18.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:18.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:18.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:18.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:18.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:18.673 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:36:19.146 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:36:19.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:19.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:19.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:19.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:19.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:19.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:19.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:19.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:19.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:19.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:19.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:19.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:19.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:19.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:19.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:19.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:19.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:19.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:19.614 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:36:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:36:20.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:20.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:20.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:20.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:20.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:20.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:20.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:20.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:20.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:20.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:20.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:20.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:20.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:20.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:20.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:20.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:20.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:20.557 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:36:21.029 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:36:21.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:21.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:21.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:21.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:21.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:21.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:21.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:21.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:21.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:21.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:21.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:21.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:21.498 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:36:21.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:21.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:21.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:21.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:21.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:21.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:21.966 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:36:22.435 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:36:22.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:22.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:22.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:22.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:22.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:22.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:22.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:22.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:22.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:22.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:22.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:22.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:22.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:22.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:22.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:22.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:22.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:36:23.376 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:36:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:36:24.317 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:36:24.790 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:36:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:25.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:25.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:25.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:25.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:25.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:25.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:25.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:25.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:25.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:25.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:25.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:25.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:25.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:25.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:25.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:25.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:25.620 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:36:26.179 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:36:26.657 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:36:27.129 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:36:27.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:27.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:27.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:27.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:27.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:27.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:27.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:27.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:27.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:27.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:27.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:27.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:27.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:27.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:27.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:27.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:27.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:27.601 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:36:28.074 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:36:28.546 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:36:29.018 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:36:29.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:29.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:29.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:29.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:29.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:29.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:29.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:29.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:29.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:29.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:29.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:29.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:29.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:29.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:29.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:29.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:29.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:29.492 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:36:29.959 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:36:30.430 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:36:30.901 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:36:31.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:31.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:31.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:31.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:31.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:31.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:31.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:31.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:31.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:31.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:31.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:31.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:31.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:31.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:31.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:31.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:31.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:31.371 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:36:31.846 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:36:32.318 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:36:32.796 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:36:32.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:32.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:32.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:32.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:33.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:33.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:33.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:33.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:33.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:33.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:33.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:33.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:33.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:33.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:33.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:33.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:33.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:33.273 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:36:33.751 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:36:34.225 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:36:34.695 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:36:34.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:34.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:34.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:34.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:34.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:34.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:34.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:34.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:34.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:34.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:34.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:34.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:34.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:34.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:34.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:34.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:34.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:35.170 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:36:35.648 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:36:36.126 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:36:36.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:36.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:36.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:36.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:36.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:36.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:36.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:36.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:36.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:36.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:36.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:36.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:36.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:36.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:36.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:36.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:36.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:36.603 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:36:37.082 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:36:37.560 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:36:38.036 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:36:38.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:38.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:38.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:38.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:38.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:38.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:38.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:38.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:38.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:38.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:38.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:38.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:38.513 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:36:38.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:38.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:38.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:38.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:38.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:38.991 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:36:39.467 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:36:39.936 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:36:40.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:40.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:40.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:40.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:40.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:40.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:40.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:40.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:40.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:40.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:40.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:40.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:40.405 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:36:40.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:40.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:40.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:40.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:40.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:40.878 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:36:41.347 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:36:41.816 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:36:42.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:42.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:42.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:42.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:42.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:42.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:42.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:42.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:42.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:42.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:42.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:42.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:42.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:36:42.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:36:42.278 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:36:42.278 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:42.278 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:42.278 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:42.278 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:42.278 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:47.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:36:47.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:36:47.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:47.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:47.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:47.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:47.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:36:47.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:36:47.292 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:47.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:36:47.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:36:47.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:36:47.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:36:47.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:36:47.294 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:47.294 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:36:47.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:36:47.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:36:47.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:36:47.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:36:47.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:36:47.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:36:47.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:47.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:36:47.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:36:47.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:36:47.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:36:47.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:36:47.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:36:47.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:36:47.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:36:47.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:36:47.297 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:36:47.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:36:47.297 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:36:47.299 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:36:47.299 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:36:47.299 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.299 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:36:47.304 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:36:47.778 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:36:47.832 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:36:47.833 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:36:47.835 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:36:47.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:47.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:47.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:47.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:47.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:47.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:47.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:47.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:47.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:47.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:36:47.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:47.877 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:47.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:47.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:48.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:36:48.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:48.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:48.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:48.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:48.722 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:36:49.192 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:36:49.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:49.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:49.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:49.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:49.664 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:36:50.136 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:36:50.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:50.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:50.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:50.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:50.611 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:36:50.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:51.081 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:36:51.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:51.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:51.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:51.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:51.558 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:36:51.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:51.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:51.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:51.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:51.634 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:51.634 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:36:51.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:51.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:51.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:51.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:51.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:51.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:51.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:36:51.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:51.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:51.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:51.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:52.033 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:36:52.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:36:52.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:36:52.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:36:52.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:36:52.506 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:36:52.978 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:36:53.450 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:36:53.920 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:36:54.391 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:36:54.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:54.860 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:36:55.330 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:36:55.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:55.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:55.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:55.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:55.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:55.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:55.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:55.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:55.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:55.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:55.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:55.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:55.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:36:55.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:55.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:55.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:55.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:36:56.270 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:36:56.740 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:36:57.211 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:36:57.683 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:36:58.153 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:36:58.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:58.623 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:36:59.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:36:59.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:59.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:36:59.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:36:59.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:36:59.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:59.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:59.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:59.077 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:36:59.077 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:36:59.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:36:59.095 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:36:59.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:36:59.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:36:59.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:59.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:36:59.566 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:37:00.036 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:37:00.506 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:37:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:37:01.448 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:37:01.922 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:37:02.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:02.394 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:37:02.865 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:37:02.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:02.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:02.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:02.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:02.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:02.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:02.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:02.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:02.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:02.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:02.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:02.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:02.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:02.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:02.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:02.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:02.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:03.337 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:37:03.807 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:37:04.278 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:37:04.753 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:37:05.225 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:37:05.696 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:37:06.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:06.167 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:37:06.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:06.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:06.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:06.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:06.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:06.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:06.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:06.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:06.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:06.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:06.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:06.637 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:37:06.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:06.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:06.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:06.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:07.113 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:37:07.589 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:37:08.066 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:37:08.537 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:37:09.010 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:37:09.481 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:37:09.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:09.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:09.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:09.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:09.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:09.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:09.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:09.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:09.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:09.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:09.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:09.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:09.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:09.949 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:37:09.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:09.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:09.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:09.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:09.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:10.418 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:37:10.892 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:37:11.363 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:37:11.836 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:37:12.308 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:37:12.779 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:37:13.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:13.250 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:37:13.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:13.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:13.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:13.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:13.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:13.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:13.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:13.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:13.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:13.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:13.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:13.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:13.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:13.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:13.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:13.722 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:37:14.191 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:37:14.662 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:37:15.134 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:37:15.606 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:37:16.076 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:37:16.546 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:37:16.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:16.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:16.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:16.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:16.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:16.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:37:16.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:37:16.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:37:16.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:37:16.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:37:16.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:37:16.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:37:16.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:37:16.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:37:16.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:37:16.952 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:37:16.952 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:16.952 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:16.952 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:16.952 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:16.952 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:16.952 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:21.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:37:21.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:37:21.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:37:21.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:37:21.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:37:21.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:37:21.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:37:21.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:37:21.969 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:37:21.969 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:37:21.969 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:37:21.971 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:37:21.971 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:37:21.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:37:21.971 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:37:21.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:37:21.971 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:37:21.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:37:21.971 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:37:21.972 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:37:21.972 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:37:21.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:37:21.972 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:37:21.972 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:37:21.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:37:21.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:37:21.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:37:21.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:37:21.974 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:37:21.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:37:21.974 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:37:21.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:37:21.974 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:37:21.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:37:21.974 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:37:21.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:37:21.976 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:37:21.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:37:21.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:37:22.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:37:22.501 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:37:22.503 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:37:22.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:22.505 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:37:22.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:22.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:22.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:22.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:22.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:22.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:22.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:22.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:22.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:22.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:22.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:22.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:22.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:37:22.979 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:37:22.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:37:22.979 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:37:22.979 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:37:23.402 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:37:23.877 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:37:23.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:37:23.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:37:23.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:37:23.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:37:24.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:37:24.816 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:37:24.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:37:24.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:37:24.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:37:24.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:37:25.286 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:37:25.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:25.756 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:37:25.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:37:25.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:37:25.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:37:25.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:37:26.229 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:37:26.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:26.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:26.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:26.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:26.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:26.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:26.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:26.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:26.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:26.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:26.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:26.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:26.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:26.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:26.700 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:37:26.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:37:26.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:37:26.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:37:26.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:37:27.169 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:37:27.639 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:37:28.111 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:37:28.580 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:37:29.052 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:37:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:29.523 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:37:29.993 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:37:30.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:30.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:30.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:30.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:30.141 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1768 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:30.141 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1768 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:30.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:30.141 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1768 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:30.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:30.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:30.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:30.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:30.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:30.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:30.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:30.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:30.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:30.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:30.464 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:37:30.935 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:37:31.406 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:37:31.876 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:37:32.347 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:37:32.818 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:37:33.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:33.289 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:37:33.760 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:37:33.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:33.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:33.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:33.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:33.980 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=2600 tn=0 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:33.980 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=2600 tn=1 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:37:33.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:33.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:33.981 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:33.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:33.981 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:33.981 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:33.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:33.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:33.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:33.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:33.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:34.231 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:37:34.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:34.701 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:37:34.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:34.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:34.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:34.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:34.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:34.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:34.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:34.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:34.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:34.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:34.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:34.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:34.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:34.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:34.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:34.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:34.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:35.172 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:37:35.643 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:37:36.113 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:37:36.584 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:37:37.055 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:37:37.526 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:37:37.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:37.996 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:37:38.467 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:37:38.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:38.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:38.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:38.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:38.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:38.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:38.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:38.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:38.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:38.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:38.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:38.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:38.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:38.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:38.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:38.938 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:37:39.409 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:37:39.880 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:37:40.350 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:37:40.821 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:37:41.291 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:37:41.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:41.763 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:37:42.233 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:37:42.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:42.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:42.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:42.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:42.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:42.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:42.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:42.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:42.377 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:42.377 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:42.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:42.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:42.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:42.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:42.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:42.704 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:37:43.175 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:37:43.645 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:37:44.116 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:37:44.587 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:37:45.058 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:37:45.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:45.529 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:37:45.999 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:37:46.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:46.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:46.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:46.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:46.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:46.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:46.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:46.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:46.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:46.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:46.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:46.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:46.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:46.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:46.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:46.470 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:37:46.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:46.940 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:37:47.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:47.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:47.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:47.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:47.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:47.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:47.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:47.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:47.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:47.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:47.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:47.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:47.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:47.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:47.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:47.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:47.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:47.410 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:37:47.882 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:37:48.351 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:37:48.821 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:37:49.293 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:37:49.763 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:37:50.233 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:37:50.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:50.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:50.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:50.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:50.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:50.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:50.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:50.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:50.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:50.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:50.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:50.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:50.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:50.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:50.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:50.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:50.707 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:37:51.177 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:37:51.647 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:37:52.117 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:37:52.587 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:37:53.061 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:37:53.529 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:37:53.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:53.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:53.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:53.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:53.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:53.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:53.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:53.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:53.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:53.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:53.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:53.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:53.998 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:37:54.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:54.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:54.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:54.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:54.468 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:37:54.943 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:37:55.415 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:37:55.885 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 03:37:56.354 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 03:37:56.823 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 03:37:57.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:57.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:57.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:57.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:57.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:57.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:57.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:57.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:57.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:57.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:57.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:57.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:57.293 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 03:37:57.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:57.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:57.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:57.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:57.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:57.764 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 03:37:58.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:37:58.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:58.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:58.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:58.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:37:58.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:37:58.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:37:58.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:58.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:58.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:58.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:37:58.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:37:58.235 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 03:37:58.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:37:58.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:37:58.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:37:58.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:58.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:37:58.705 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 03:37:59.176 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 03:37:59.647 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 03:38:00.118 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 03:38:00.589 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 03:38:01.060 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 03:38:01.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:01.530 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 03:38:01.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:01.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:01.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:01.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:01.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:38:01.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:01.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:01.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:01.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:38:01.925 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:38:01.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:38:01.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:01.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:01.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:01.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:02.001 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 03:38:02.472 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 03:38:02.942 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 03:38:03.413 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 03:38:03.884 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 03:38:04.353 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 03:38:04.822 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 03:38:04.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:05.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:05.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:05.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:05.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:05.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:38:05.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:05.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:05.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:05.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:38:05.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:38:05.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:38:05.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:05.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:05.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:05.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:05.292 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 03:38:05.762 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 03:38:06.233 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 03:38:06.703 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 03:38:07.175 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 03:38:07.647 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 03:38:08.117 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 03:38:08.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:08.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:08.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:08.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:08.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:08.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:38:08.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:08.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:08.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:08.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:38:08.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:38:08.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:38:08.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:08.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:08.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:08.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:08.588 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 03:38:09.059 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 03:38:09.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:09.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:09.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:09.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:09.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:09.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:09.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:09.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:09.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:09.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:09.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:09.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:38:09.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:38:09.467 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:38:09.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:09.468 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10290 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:09.468 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10290 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.468 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10290 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.468 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10290 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10290 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10290 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:09.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:14.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:38:14.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:38:14.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:14.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:14.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:14.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:14.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:14.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:38:14.476 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:14.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:38:14.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:38:14.478 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:38:14.478 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:38:14.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:38:14.478 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:14.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:14.479 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:38:14.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:38:14.479 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:38:14.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:38:14.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:38:14.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:38:14.480 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:14.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:14.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:38:14.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:38:14.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:38:14.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:38:14.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:38:14.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:38:14.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:14.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:14.483 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:38:14.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:38:14.483 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:38:14.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:38:14.486 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:14.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:14.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:14.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:38:14.962 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:38:15.011 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:38:15.011 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:38:15.011 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:38:15.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:15.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:15.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:15.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:38:15.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:15.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:15.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:15.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:38:15.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:38:15.435 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:38:15.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:15.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:15.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:15.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:15.905 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:38:16.376 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:38:16.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:16.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:16.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:16.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:16.847 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:38:17.317 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:38:17.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:17.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:17.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:17.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:17.788 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:38:18.259 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:38:18.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:18.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:18.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:18.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:18.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:38:19.200 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:38:19.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:19.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:19.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:19.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:19.670 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:38:20.141 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:38:20.612 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:38:21.082 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:38:21.553 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:38:22.022 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:38:22.492 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:38:22.961 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:38:23.431 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:38:23.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:23.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:23.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:23.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:23.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:23.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:23.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:23.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:23.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:23.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:38:23.777 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:38:23.777 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:38:23.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:28.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:38:28.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:38:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:28.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:28.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:28.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:28.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:28.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:38:28.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:28.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:38:28.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:38:28.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:38:28.793 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:38:28.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:38:28.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:28.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:28.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:38:28.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:38:28.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:38:28.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:38:28.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:38:28.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:38:28.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:28.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:28.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:38:28.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:38:28.796 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:38:28.796 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:38:28.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:38:28.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:38:28.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:28.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:28.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:38:28.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:38:28.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:38:28.799 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:38:28.799 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:38:28.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:28.803 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:38:29.274 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:38:29.327 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:38:29.329 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:38:29.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:29.332 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:38:29.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:29.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:29.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:38:29.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:29.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:29.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:29.336 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:38:29.336 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:38:29.743 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:38:29.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:29.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:29.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:29.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:30.213 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:38:30.684 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:38:30.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:30.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:30.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:30.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:31.156 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:38:31.626 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:38:31.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:31.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:31.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:31.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:32.097 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:38:32.567 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:38:32.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:32.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:32.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:32.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:33.038 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:38:33.508 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:38:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:33.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:33.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:33.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:33.978 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:38:34.449 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:38:34.918 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:38:35.388 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:38:35.858 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:38:36.331 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:38:36.800 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:38:37.269 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:38:37.741 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:38:38.211 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:38:38.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:38.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:38.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:38.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:38.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:38.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:38.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:38.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:38:38.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:38:38.310 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:38:38.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2063 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:38.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:38.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2063 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:38.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2063 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:38.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2063 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:38.312 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2063 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:43.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:38:43.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:38:43.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:43.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:43.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:43.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:43.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:43.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:38:43.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:43.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:38:43.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:38:43.312 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:38:43.312 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:38:43.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:38:43.312 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:43.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:43.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:38:43.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:38:43.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:38:43.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:38:43.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:38:43.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:38:43.313 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:43.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:43.313 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:38:43.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:38:43.313 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:38:43.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:38:43.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:38:43.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:38:43.314 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:38:43.314 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:38:43.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:38:43.314 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:38:43.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:38:43.317 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:38:43.317 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:38:43.317 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:38:43.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:38:43.321 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:38:43.795 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:38:43.842 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:38:43.843 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:38:43.844 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:38:43.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:38:43.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:43.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:43.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:38:44.265 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:38:44.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:44.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:44.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:44.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:44.733 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:38:44.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:38:44.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:38:44.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:38:44.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:38:44.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:38:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:38:45.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:45.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:45.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:45.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:45.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:38:46.142 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:38:46.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:46.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:46.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:46.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:46.612 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:38:47.082 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:38:47.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:47.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:47.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:47.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:47.554 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:38:48.021 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:38:48.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:48.323 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:48.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:48.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:48.491 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:38:48.960 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:38:49.429 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:38:49.898 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:38:50.368 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:38:50.839 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:38:51.310 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:38:51.780 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:38:52.251 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:38:52.722 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:38:53.190 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:38:53.658 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:38:54.129 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:38:54.598 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:38:55.067 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:38:55.537 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:38:56.011 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:38:56.481 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:38:56.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:38:56.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:38:56.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:38:56.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:38:56.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:38:56.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:38:56.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:38:56.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:38:56.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:38:56.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:38:56.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:38:56.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:38:56.629 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:38:56.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2890 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:56.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2890 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:56.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2890 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:56.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2890 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:56.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2890 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:38:56.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2890 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:01.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:01.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:01.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:01.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:01.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:01.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:01.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:01.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:01.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:01.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:01.649 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:39:01.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:39:01.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:39:01.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:01.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:01.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:01.653 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:39:01.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:01.653 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:39:01.655 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:39:01.655 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:39:01.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:01.655 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:01.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:01.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:39:01.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:01.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:39:01.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:39:01.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:39:01.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:01.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:01.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:01.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:39:01.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:01.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:39:01.662 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:39:01.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:39:01.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:39:01.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:39:01.662 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:39:01.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:39:01.663 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:39:01.663 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:39:01.663 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:01.668 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:39:02.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:39:02.202 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:02.204 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:39:02.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:02.206 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:39:02.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:02.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:02.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:02.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:02.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:02.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:02.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:02.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:02.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:39:02.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:02.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:02.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:02.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:03.083 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:39:03.229 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:03.552 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:39:03.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:03.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:03.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:03.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:03.748 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:04.019 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:39:04.264 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:04.487 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:39:04.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:04.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:04.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:04.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:04.956 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:39:05.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:39:05.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:05.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:05.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:05.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:05.893 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:39:06.278 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:06.365 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:39:06.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:06.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:06.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:06.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:06.801 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:06.836 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:39:07.307 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:39:07.315 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:07.775 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:39:07.827 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:08.245 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:39:08.715 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:39:09.185 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:39:09.657 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:39:09.831 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:10.125 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:39:10.598 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:39:11.066 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:39:11.541 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:39:11.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:11.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:11.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:11.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:11.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:11.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:11.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:11.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:11.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:11.880 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:39:11.880 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2217 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:11.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:11.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:11.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:11.881 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2217 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:11.881 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2217 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:11.881 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2217 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:11.881 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2217 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:11.881 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2217 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:11.881 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2217 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:16.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:16.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:16.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:16.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:16.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:16.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:16.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:16.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:16.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:16.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:16.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:39:16.882 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:39:16.882 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:39:16.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:16.882 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:16.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:16.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:39:16.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:16.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:39:16.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:39:16.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:39:16.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:16.883 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:16.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:16.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:39:16.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:16.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:39:16.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:39:16.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:39:16.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:16.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:16.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:39:16.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:16.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:16.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:39:16.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:39:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:39:16.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:39:16.887 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:39:16.887 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:16.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:16.892 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:39:17.361 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:39:17.414 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:17.415 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:39:17.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.416 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:39:17.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:17.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:17.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:17.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:17.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:17.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:17.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.826 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.826 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:17.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:17.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.830 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:39:17.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.838 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.838 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:17.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:17.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:17.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:17.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:17.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:17.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.891 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.891 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:17.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:17.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:17.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:17.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:17.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:17.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:17.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:17.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:17.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:17.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:17.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:18.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:18.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.129 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.129 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.185 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.185 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.299 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:39:18.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.770 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:39:18.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:18.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:18.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:18.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:18.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:18.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:18.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:18.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:18.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:18.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:18.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:18.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:18.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:18.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:18.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:19.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:19.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:19.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:19.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:19.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:19.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:19.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:19.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:19.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:19.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:19.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:19.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:19.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:19.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:19.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:19.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:19.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:19.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:19.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:19.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:19.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:19.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:19.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:19.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:19.238 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:39:19.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:19.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:19.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:19.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:19.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:19.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:19.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:19.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:19.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:19.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:19.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:19.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:19.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:19.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:19.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:19.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:19.429 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:39:19.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=554 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:19.430 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=554 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:19.430 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=554 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:19.430 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=554 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:19.430 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=554 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:19.430 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=554 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:24.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:24.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:24.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:24.434 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:24.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:24.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:24.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:24.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:24.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:24.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:24.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:39:24.452 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:39:24.452 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:39:24.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:24.452 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:24.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:24.452 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:39:24.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:24.452 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:39:24.454 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:39:24.454 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:39:24.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:24.454 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:24.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:24.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:39:24.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:24.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:39:24.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:39:24.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:39:24.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:24.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:24.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:24.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:39:24.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:24.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:39:24.457 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:39:24.457 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:39:24.457 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:24.462 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:39:24.932 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:39:24.984 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:24.986 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:39:24.987 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:39:24.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:24.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:24.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:24.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:39:24.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:25.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:25.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:25.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:39:25.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:39:25.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 03:39:25.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:39:25.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:39:25.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:25.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:39:25.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:25.401 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:39:25.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:25.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:25.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:25.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:25.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:39:26.341 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:39:26.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:26.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:26.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:26.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:26.812 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:39:27.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:39:27.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:39:27.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:27.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:27.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:27.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:27.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:27.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:27.083 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:27.083 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:27.083 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:39:27.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:27.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:27.083 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:27.084 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:27.084 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:27.084 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:27.084 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:27.084 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:27.084 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:27.084 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:32.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:32.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:32.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:32.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:32.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:32.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:32.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:32.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:32.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:32.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:32.102 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:39:32.106 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:39:32.106 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:39:32.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:32.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:32.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:32.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:39:32.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:32.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:39:32.110 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:39:32.110 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:39:32.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:32.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:32.111 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:32.111 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:39:32.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:32.111 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:39:32.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:39:32.114 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:39:32.114 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:32.114 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:32.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:32.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:39:32.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:32.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:39:32.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:39:32.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:39:32.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:39:32.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:39:32.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:39:32.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:39:32.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:39:32.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:39:32.120 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:39:32.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:39:32.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:32.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:32.123 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:32.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:37.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:37.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:37.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:37.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:37.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:37.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:37.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:37.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:37.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:37.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:37.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:39:37.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:39:37.137 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:39:37.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:37.137 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:37.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:37.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:39:37.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:37.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:39:37.140 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:39:37.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:39:37.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:37.140 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:37.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:37.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:39:37.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:37.140 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:39:37.141 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:39:37.141 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:39:37.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:37.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:37.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:37.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:39:37.142 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:37.142 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:39:37.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:39:37.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:39:37.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:39:37.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:39:37.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:39:37.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:39:37.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:39:37.144 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:39:37.144 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:39:37.144 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:37.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:39:37.621 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:39:37.663 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:37.664 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:39:37.665 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:39:37.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:38.093 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:39:38.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:38.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:38.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:38.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:38.563 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:39:39.032 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:39:39.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:39.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:39.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:39.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:39.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:39:39.971 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:39:40.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:40.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:40.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:40.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:40.440 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:39:40.909 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:39:41.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:41.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:41.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:41.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:41.378 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:39:41.847 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:39:42.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:42.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:42.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:42.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:42.316 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:39:42.785 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:39:43.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:43.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:43.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:43.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:43.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:43.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:43.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:43.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:43.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:43.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:43.153 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:39:48.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:48.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:48.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:48.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:48.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:48.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:48.157 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:48.273 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:48.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:48.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:48.274 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:39:48.280 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:39:48.280 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:39:48.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:48.281 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:48.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:48.282 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:39:48.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:48.282 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:39:48.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:39:48.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:39:48.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:48.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:48.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:48.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:39:48.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:48.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:39:48.291 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:39:48.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:39:48.292 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:48.292 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:48.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:48.292 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:39:48.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:48.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:39:48.299 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:39:48.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:39:48.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:39:48.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:39:48.300 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:39:48.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:39:48.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:39:48.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:39:48.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:39:48.301 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:39:48.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:39:48.301 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:39:48.301 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:39:48.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:48.306 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:39:48.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:39:48.834 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:39:48.835 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:39:48.836 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:39:48.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:39:49.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:39:49.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:49.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:49.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:49.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:49.716 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:39:50.186 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:39:50.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:50.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:50.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:50.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:50.656 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:39:51.127 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:39:51.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:51.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:51.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:51.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:51.596 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:39:52.066 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:39:52.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:52.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:52.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:52.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:52.538 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:39:53.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:39:53.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:53.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:53.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:53.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:53.479 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:39:53.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:39:53.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:39:53.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:39:53.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:39:53.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:53.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:53.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:53.844 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1203 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:53.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:53.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1203 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1203 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1203 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1203 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:53.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1204 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:39:58.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:58.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:58.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:58.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:58.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:58.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:58.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:58.847 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:58.847 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:39:58.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:58.848 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:39:58.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:39:58.848 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:39:58.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:39:58.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:39:58.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:58.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:58.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:39:58.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:39:58.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:39:58.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:39:58.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:39:58.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:39:58.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:58.851 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:39:58.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:39:58.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:39:58.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:39:58.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:39:58.852 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:39:58.852 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:39:58.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:39:58.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:39:58.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:39:58.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:39:58.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:39:58.854 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:39:58.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:39:58.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:03.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:40:03.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:40:03.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:03.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:03.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:03.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:03.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:03.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:03.874 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:03.874 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:03.874 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:40:03.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:40:03.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:40:03.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:03.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:03.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:03.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:40:03.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:03.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:40:03.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:40:03.884 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:40:03.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:03.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:03.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:03.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:40:03.885 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:03.885 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:40:03.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:40:03.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:40:03.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:03.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:03.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:03.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:40:03.889 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:03.889 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:40:03.891 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:40:03.891 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:40:03.891 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:03.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:03.896 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:40:04.365 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:40:04.407 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:40:04.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:04.408 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:40:04.408 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:40:04.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:40:04.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:40:04.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:40:04.833 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:40:04.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:04.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:04.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:04.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:05.301 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:40:05.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:05.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:40:05.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:40:05.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:40:05.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:40:05.769 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:40:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:05.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:06.240 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:40:06.711 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:40:06.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:06.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:06.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:06.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:07.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:40:07.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:40:07.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:07.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:07.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:07.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:08.120 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:40:08.590 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:40:08.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:08.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:08.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:08.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:09.061 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:40:09.531 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:40:10.001 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:40:10.472 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:40:10.943 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:40:11.414 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:40:11.885 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:40:12.354 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:40:12.823 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:40:13.292 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:40:13.763 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:40:14.234 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:40:14.707 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:40:15.180 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:40:15.654 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:40:16.124 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:40:16.592 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:40:17.064 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:40:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:40:18.002 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:40:18.473 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:40:18.941 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:40:19.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:40:19.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:40:19.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:19.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:19.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:19.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:19.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:19.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:19.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:19.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:40:19.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:40:19.302 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:40:19.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:24.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:40:24.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:40:24.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:24.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:24.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:24.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:24.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:24.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:24.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:24.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:24.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:40:24.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:40:24.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:40:24.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:24.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:24.323 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:40:24.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:24.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:24.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:40:24.325 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:40:24.325 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:40:24.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:24.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:24.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:24.325 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:40:24.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:24.325 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:40:24.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:40:24.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:40:24.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:24.326 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:24.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:24.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:40:24.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:24.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:40:24.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:40:24.329 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:40:24.329 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:24.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:24.334 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:40:24.807 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:40:24.846 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:40:24.846 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:40:24.846 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:40:24.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:24.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:40:24.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:40:24.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:40:24.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:24.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:40:24.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:40:24.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:40:24.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:40:24.896 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:40:24.897 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:40:24.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:24.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:40:24.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:40:24.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:24.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:25.275 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:40:25.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:25.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:25.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:25.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:25.747 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:40:26.218 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:40:26.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:26.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:26.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:26.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:26.688 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:40:27.158 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:40:27.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:27.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:27.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:27.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:27.626 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:40:28.095 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:40:28.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:28.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:28.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:28.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:28.565 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:40:29.036 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:40:29.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:29.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:29.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:29.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:29.506 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:40:29.976 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:40:30.447 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:40:30.920 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:40:31.389 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:40:31.860 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:40:32.329 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:40:32.798 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:40:32.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:32.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:32.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:40:32.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:40:32.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:32.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:32.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:32.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:32.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:32.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:40:32.921 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:40:32.921 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:40:32.922 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:32.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:32.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:32.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:32.922 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:32.922 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:32.922 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:32.923 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:32.923 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:32.923 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:32.923 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:37.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:40:37.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:40:37.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:37.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:37.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:37.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:37.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:37.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:37.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:37.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:37.926 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:40:37.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:40:37.927 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:40:37.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:37.927 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:37.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:37.927 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:40:37.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:37.927 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:40:37.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:40:37.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:40:37.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:37.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:37.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:37.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:40:37.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:37.928 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:40:37.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:40:37.929 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:40:37.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:37.929 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:37.929 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:40:37.929 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:37.929 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:40:37.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:37.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:40:37.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:40:37.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:40:37.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:40:37.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:40:37.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:40:37.932 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:40:37.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:37.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:37.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:40:38.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:40:38.451 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:40:38.451 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:40:38.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:38.452 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:40:38.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:40:38.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:40:38.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:40:38.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:38.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:40:38.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:40:38.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:40:38.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:40:38.499 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:40:38.503 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:40:38.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:38.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:40:38.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:40:38.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:38.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:38.876 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:40:38.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:38.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:38.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:38.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:39.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:40:39.813 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:40:39.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:39.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:39.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:39.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:40.282 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:40:40.757 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:40:40.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:40.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:40.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:40.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:41.226 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:40:41.694 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:40:41.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:41.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:41.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:41.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:40:42.634 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:40:42.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:42.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:42.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:42.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:43.103 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:40:43.573 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:40:44.042 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:40:44.510 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:40:44.978 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:40:45.449 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:40:45.919 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:40:46.387 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:40:46.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:46.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:46.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:40:46.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:40:46.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:46.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:46.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:46.520 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:46.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:46.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:46.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:46.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:46.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:40:46.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:40:46.524 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:40:46.524 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1868 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:46.524 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:46.524 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:46.524 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:46.524 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:46.524 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:40:51.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:40:51.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:40:51.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:51.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:51.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:51.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:51.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:40:51.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:51.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:51.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:40:51.525 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:40:51.527 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:40:51.527 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:40:51.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:51.527 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:51.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:40:51.527 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:40:51.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:40:51.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:40:51.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:40:51.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:40:51.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:51.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:51.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:40:51.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:40:51.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:40:51.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:40:51.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:40:51.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:40:51.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:51.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:40:51.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:40:51.529 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:40:51.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:40:51.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:40:51.530 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:40:51.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:40:51.531 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:40:51.531 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:40:51.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:40:51.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:40:51.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:40:51.536 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:40:52.006 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:40:52.047 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:40:52.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:52.049 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:40:52.050 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:40:52.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:40:52.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:40:52.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:40:52.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:52.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:40:52.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:40:52.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:40:52.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:40:52.096 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:40:52.098 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:40:52.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:40:52.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:40:52.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:40:52.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:52.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:40:52.476 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:40:52.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:52.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:52.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:52.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:52.944 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:40:53.413 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:40:53.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:53.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:53.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:53.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:53.887 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:40:54.357 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:40:54.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:54.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:54.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:54.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:54.825 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:40:55.296 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:40:55.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:55.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:55.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:55.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:55.766 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:40:56.238 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:40:56.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:40:56.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:40:56.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:40:56.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:40:56.709 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:40:57.182 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:40:57.651 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:40:58.120 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:40:58.593 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:40:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:40:59.539 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:41:00.010 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:41:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:00.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:00.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:00.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:00.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:00.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:00.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:41:00.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:00.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:00.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:00.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:41:00.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:41:00.144 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:00.145 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:00.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:00.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:00.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:00.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:00.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:00.481 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:41:00.950 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:41:01.419 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:41:01.887 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:41:02.360 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:41:02.829 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:41:03.298 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:41:03.769 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:41:04.237 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:41:04.706 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:41:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:41:05.644 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:41:06.112 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:41:06.582 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:41:07.050 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:41:07.520 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:41:08.052 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:41:08.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:08.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:08.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:08.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:08.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:08.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:08.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:08.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:08.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:08.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:08.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:41:08.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:41:08.168 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3596 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:08.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3596 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3596 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3596 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3596 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:13.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:41:13.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:41:13.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:13.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:13.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:13.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:13.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:13.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:41:13.175 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:13.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:41:13.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:41:13.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:41:13.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:41:13.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:41:13.176 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:13.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:13.176 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:41:13.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:41:13.176 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:41:13.177 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:41:13.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:41:13.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:41:13.177 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:13.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:13.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:41:13.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:41:13.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:41:13.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:41:13.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:41:13.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:41:13.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:13.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:13.178 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:41:13.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:41:13.178 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:41:13.180 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:41:13.180 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:41:13.180 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:13.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:13.185 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:41:13.656 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:41:13.706 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:13.708 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:13.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:13.710 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:41:13.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:13.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:13.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:41:13.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:13.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:13.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:13.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:41:13.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:41:13.746 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:13.748 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:13.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:13.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:13.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:13.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:13.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:14.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:41:14.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:14.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:14.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:14.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:14.620 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:41:15.090 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:41:15.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:15.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:15.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:15.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:15.560 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:41:16.030 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:41:16.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:16.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:16.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:16.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:16.501 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:41:16.972 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:41:17.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:17.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:17.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:17.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:17.441 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:41:17.909 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:41:18.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:18.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:18.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:18.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:18.378 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:41:18.846 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:41:19.314 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:41:19.786 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:41:20.255 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:41:20.724 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:41:21.192 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:41:21.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:21.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:21.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:21.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:21.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:21.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:21.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:21.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:21.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:21.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:21.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:41:21.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:41:21.519 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:41:21.519 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1807 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:21.519 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1807 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:21.519 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1807 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:21.519 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1807 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:21.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1807 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:21.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1807 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:41:26.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:41:26.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:41:26.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:26.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:26.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:26.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:26.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:26.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:41:26.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:26.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:41:26.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:41:26.522 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:41:26.522 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:41:26.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:41:26.522 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:26.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:26.522 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:41:26.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:41:26.522 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:41:26.523 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:41:26.523 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:41:26.523 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:41:26.523 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:26.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:26.523 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:41:26.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:41:26.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:41:26.524 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:41:26.524 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:41:26.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:41:26.525 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:26.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:26.525 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:41:26.525 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:41:26.525 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.526 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:41:26.526 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:41:26.526 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:41:26.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:26.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:26.531 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:41:27.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:41:27.039 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:27.039 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:27.039 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:41:27.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:27.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:27.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:27.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:41:27.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:27.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:27.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:27.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:41:27.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:41:27.091 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:27.092 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:27.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:27.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:27.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:27.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:27.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:27.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:41:27.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:27.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:27.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:27.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:27.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:27.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:27.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:41:27.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:41:27.776 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:41:32.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:41:32.777 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:41:32.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:32.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:32.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:32.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:32.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:41:32.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:41:32.781 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:32.781 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:41:32.781 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:41:32.782 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:41:32.782 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:41:32.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:41:32.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:32.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:41:32.782 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:41:32.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:41:32.782 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:41:32.783 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:41:32.783 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:41:32.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:41:32.783 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:32.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:41:32.783 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:41:32.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:41:32.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:41:32.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:41:32.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:41:32.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:41:32.784 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:41:32.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:41:32.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:41:32.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:41:32.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:41:32.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:41:32.786 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:41:32.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:32.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:41:33.258 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:41:33.300 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:33.301 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:33.301 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:41:33.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:33.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:33.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:41:33.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:33.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:33.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:33.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:41:33.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:41:33.347 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:33.348 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:33.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:33.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:33.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:33.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:33.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:33.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:41:33.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:33.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:33.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:33.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:34.194 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:41:34.661 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:41:34.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:34.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:34.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:34.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:35.129 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:41:35.597 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:41:35.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:35.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:35.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:35.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:36.065 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:41:36.533 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:41:36.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:36.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:36.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:36.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:37.001 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:41:37.469 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:41:37.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:41:37.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:41:37.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:41:37.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:41:37.937 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:41:38.406 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:41:38.874 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:41:39.342 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:41:39.810 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:41:40.278 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:41:40.746 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:41:41.213 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:41:41.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:41.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:41.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:41.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:41.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:41.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:41.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:41:41.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:41.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:41.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:41.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:41:41.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:41:41.392 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:41.392 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:41.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:41.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:41.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:41.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:41.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:41.682 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:41:42.151 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:41:42.618 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:41:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:41:43.555 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:41:44.022 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:41:44.490 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:41:44.958 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:41:45.426 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:41:45.894 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:41:46.362 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:41:46.830 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:41:47.297 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:41:47.765 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:41:48.233 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:41:48.702 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:41:49.171 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:41:49.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:49.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:49.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:49.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:49.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:49.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:49.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:41:49.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:49.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:49.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:49.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:41:49.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:41:49.446 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:49.446 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:49.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:49.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:49.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:49.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:49.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:49.640 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:41:50.109 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:41:50.577 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:41:51.045 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:41:51.513 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:41:51.981 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:41:52.449 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:41:52.917 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:41:53.386 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:41:53.854 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:41:54.322 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:41:54.789 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:41:55.257 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:41:55.725 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:41:56.193 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:41:56.662 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:41:57.131 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:41:57.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:57.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:57.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:57.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:57.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:41:57.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:41:57.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:41:57.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:57.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:57.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:57.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:41:57.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:41:57.499 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:41:57.500 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:41:57.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:41:57.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:41:57.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:41:57.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:41:57.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:57.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:41:57.599 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:41:58.067 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:41:58.535 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:41:59.003 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:41:59.472 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:41:59.940 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:42:00.407 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:42:00.875 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:42:01.343 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:42:01.811 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:42:02.279 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:42:02.746 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:42:03.214 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:42:03.682 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:42:04.150 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:42:04.617 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:42:05.085 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:42:05.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:05.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:05.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:05.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:05.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:05.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:05.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:05.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:05.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:05.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:05.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:05.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:05.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:42:05.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:42:05.511 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:42:05.511 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7133 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:42:05.511 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7133 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:42:05.511 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7133 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:42:05.511 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7133 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:42:05.511 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7133 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:42:05.511 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7133 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:42:10.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:42:10.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:42:10.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:10.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:10.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:10.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:10.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:10.520 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:42:10.520 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:10.520 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:42:10.520 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:42:10.522 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:42:10.522 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:42:10.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:42:10.522 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:10.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:10.522 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:42:10.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:42:10.522 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:42:10.524 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:42:10.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:42:10.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:42:10.525 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:10.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:10.525 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:42:10.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:42:10.525 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:42:10.527 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:42:10.527 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:42:10.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:42:10.527 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:10.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:10.527 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:42:10.527 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:42:10.527 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:42:10.531 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:42:10.531 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.531 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:42:10.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:42:10.532 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:10.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:42:15.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:42:15.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:15.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:15.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:15.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:15.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:15.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:42:15.542 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:15.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:42:15.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:42:15.544 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:42:15.544 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:42:15.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:42:15.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:15.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:15.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:42:15.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:42:15.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:42:15.546 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:42:15.546 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:42:15.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:42:15.546 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:15.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:15.547 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:42:15.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:42:15.547 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:42:15.549 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:42:15.549 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:42:15.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:42:15.549 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:15.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:15.549 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:42:15.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:42:15.549 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:42:15.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:42:15.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:42:15.553 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:15.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:15.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:15.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:42:16.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:42:16.073 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:42:16.074 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:42:16.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:16.075 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:42:16.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:16.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:16.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:42:16.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:16.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:16.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:16.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:42:16.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:42:16.115 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:42:16.116 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:42:16.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:16.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:16.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:16.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:16.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:16.493 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:42:16.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:16.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:16.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:16.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:16.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:42:17.429 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:42:17.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:17.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:17.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:17.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:17.896 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:42:18.365 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:42:18.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:18.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:18.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:18.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:18.832 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:42:19.300 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:42:19.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:19.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:19.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:19.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:19.768 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:42:20.236 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:42:20.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:20.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:20.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:20.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:20.704 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:42:21.171 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:42:21.639 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:42:22.107 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:42:22.575 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:42:23.043 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:42:23.512 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:42:23.980 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:42:24.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:24.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:24.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:24.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:24.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:24.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:24.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:42:24.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:24.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:24.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:24.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:42:24.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:42:24.159 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:42:24.161 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:42:24.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:24.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:24.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:24.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:24.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:24.448 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:42:24.915 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:42:25.383 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:42:25.851 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:42:26.319 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:42:26.787 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:42:27.255 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:42:27.722 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:42:28.191 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:42:28.660 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:42:29.128 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:42:29.597 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:42:30.065 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:42:30.533 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:42:31.002 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:42:31.470 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:42:31.938 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:42:32.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:32.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:32.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:32.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:32.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:32.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:32.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:32.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:32.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:32.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:32.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:32.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:32.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:42:32.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:42:32.174 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:42:37.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:42:37.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:42:37.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:37.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:37.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:37.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:37.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:42:37.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:42:37.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:37.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:42:37.185 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:42:37.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:42:37.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:42:37.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:42:37.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:37.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:42:37.187 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:42:37.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:42:37.187 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:42:37.190 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:42:37.190 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:42:37.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:42:37.190 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:37.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:42:37.190 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:42:37.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:42:37.190 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:42:37.193 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:42:37.193 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:42:37.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:42:37.193 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:42:37.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:42:37.193 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:42:37.193 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:42:37.193 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:42:37.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:42:37.198 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:42:37.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:42:37.202 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:42:37.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:42:37.717 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:42:37.718 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:42:37.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:37.719 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:42:37.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:37.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:37.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:42:37.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:37.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:37.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:37.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:42:37.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:42:37.759 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:42:37.761 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:42:37.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:37.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:37.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:37.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:37.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:38.138 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:42:38.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:38.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:38.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:38.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:38.606 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:42:39.074 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:42:39.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:39.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:39.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:39.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:39.542 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:42:40.010 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:42:40.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:40.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:40.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:40.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:40.480 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:42:40.949 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:42:41.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:41.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:41.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:41.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:41.417 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:42:41.887 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:42:42.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:42:42.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:42:42.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:42:42.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:42:42.356 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:42:42.825 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:42:43.293 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:42:43.762 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:42:44.230 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:42:44.699 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:42:45.167 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:42:45.636 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:42:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:45.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:45.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:45.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:45.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:45.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:45.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:42:45.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:45.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:45.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:45.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:42:45.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:42:45.813 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:42:45.815 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:42:45.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:45.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:45.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:45.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:45.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:46.104 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:42:46.572 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:42:47.041 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:42:47.509 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:42:47.977 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:42:48.446 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:42:48.915 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:42:49.384 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:42:49.853 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:42:50.322 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:42:50.791 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:42:51.260 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:42:51.728 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:42:52.195 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:42:52.664 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:42:53.132 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:42:53.600 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:42:53.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:53.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:53.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:53.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:53.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:42:53.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:42:53.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:42:53.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:53.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:53.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:53.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:42:53.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:42:53.876 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:42:53.877 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:42:53.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:42:53.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:42:53.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:42:53.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:53.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:42:54.069 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:42:54.537 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:42:55.007 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:42:55.476 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:42:55.943 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:42:56.411 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:42:56.879 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:42:57.346 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:42:57.814 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:42:58.282 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:42:58.749 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:42:59.217 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:42:59.685 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:43:00.152 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:43:00.620 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:43:01.087 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:43:01.556 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:43:01.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:01.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:01.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:01.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:01.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:01.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:01.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:43:01.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:01.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:01.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:01.892 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:43:01.892 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:43:01.925 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:01.926 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:01.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:01.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:01.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:01.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:01.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:02.024 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:43:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:43:02.961 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:43:03.432 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:43:03.899 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:43:04.366 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:43:04.834 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:43:05.302 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:43:05.771 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:43:06.240 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:43:06.708 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:43:07.177 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:43:07.646 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:43:08.117 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:43:08.588 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:43:09.058 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:43:09.527 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:43:09.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:09.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:09.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:09.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:09.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:43:09.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:43:09.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:43:09.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:43:09.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:43:09.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:43:09.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:43:09.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:43:09.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:43:09.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:43:09.936 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:43:14.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:43:14.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:43:14.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:43:14.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:43:14.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:43:14.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:43:14.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:43:14.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:43:14.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:43:14.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:43:14.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:43:14.943 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:43:14.943 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:43:14.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:43:14.943 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:43:14.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:43:14.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:43:14.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:43:14.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:43:14.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:43:14.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:43:14.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:43:14.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:43:14.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:43:14.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:43:14.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:43:14.944 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:43:14.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:43:14.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:43:14.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:43:14.946 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:43:14.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:43:14.946 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:43:14.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:43:14.946 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:43:14.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:43:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:43:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:43:14.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:43:14.948 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:43:14.948 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:43:14.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:43:14.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:43:14.953 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:43:15.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:43:15.464 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:15.464 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:15.465 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:43:15.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:15.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:15.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:15.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:43:15.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:15.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:15.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:15.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:43:15.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:43:15.511 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:15.511 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:15.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:15.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:15.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:15.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:15.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:15.890 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:43:15.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:43:15.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:43:15.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:43:15.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:43:16.357 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:43:16.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:43:16.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:43:16.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:43:16.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:43:16.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:43:17.294 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:43:17.762 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:43:17.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:43:17.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:43:17.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:43:17.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:43:18.230 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:43:18.698 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:43:18.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:43:18.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:43:18.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:43:18.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:43:19.167 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:43:19.637 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:43:19.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:43:19.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:43:19.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:43:19.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:43:20.110 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:43:20.582 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:43:21.053 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:43:21.523 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:43:21.992 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:43:22.465 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:43:22.933 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:43:23.404 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:43:23.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:23.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:23.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:23.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:23.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:23.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:23.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:43:23.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:23.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:23.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:23.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:43:23.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:43:23.584 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:23.586 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:23.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:23.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:23.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:23.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:23.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:23.876 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:43:24.345 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:43:24.815 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:43:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:43:25.755 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:43:26.224 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:43:26.701 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:43:27.178 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:43:27.654 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:43:28.131 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:43:28.607 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:43:29.081 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:43:29.555 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:43:30.025 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:43:30.495 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:43:30.968 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:43:31.446 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:43:31.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:31.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:31.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:31.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:31.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:31.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:31.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:43:31.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:31.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:31.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:31.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:43:31.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:43:31.627 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:31.628 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:31.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:31.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:31.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:31.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:31.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:31.923 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:43:32.400 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:43:32.876 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:43:33.353 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:43:33.828 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:43:34.307 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:43:34.784 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:43:35.259 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:43:35.737 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:43:36.215 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:43:36.687 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:43:37.157 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:43:37.628 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:43:38.099 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:43:38.575 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:43:39.052 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:43:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:43:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:39.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:39.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:39.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:39.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:39.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:39.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:43:39.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:39.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:39.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:39.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:43:39.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:43:39.665 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:39.666 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:39.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:39.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:39.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:39.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:39.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:40.007 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:43:40.485 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:43:40.962 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:43:41.440 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:43:41.917 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:43:42.395 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:43:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:43:43.349 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:43:43.827 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:43:44.304 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:43:44.782 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:43:45.259 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:43:45.737 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:43:46.212 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:43:46.690 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:43:47.167 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:43:47.644 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:43:47.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:47.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:47.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:47.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:47.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:47.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:47.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:43:47.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:47.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:47.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:47.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:43:47.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:43:47.736 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:47.740 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:47.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:47.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:47.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:47.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:47.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:48.122 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:43:48.598 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:43:49.075 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 03:43:49.552 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 03:43:50.028 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 03:43:50.500 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 03:43:50.979 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 03:43:51.456 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 03:43:51.934 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 03:43:52.408 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 03:43:52.882 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 03:43:53.359 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 03:43:53.836 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 03:43:54.313 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 03:43:54.790 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 03:43:55.267 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 03:43:55.744 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 03:43:55.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:55.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:55.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:55.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:55.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:43:55.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:43:55.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:43:55.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:55.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:55.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:55.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:43:55.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:43:55.786 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:43:55.787 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:43:55.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:43:55.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:43:55.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:43:55.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:55.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:43:56.221 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 03:43:56.695 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 03:43:57.165 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 03:43:57.634 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 03:43:58.105 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 03:43:58.576 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 03:43:59.047 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 03:43:59.522 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 03:44:00.000 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 03:44:00.478 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 03:44:00.956 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 03:44:01.434 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 03:44:01.912 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 03:44:02.390 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 03:44:02.868 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 03:44:03.346 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 03:44:03.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:03.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:03.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:03.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:03.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:03.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:03.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:44:03.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:03.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:03.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:03.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:44:03.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:44:03.822 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 03:44:03.868 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:44:03.873 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:44:03.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:03.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:03.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:03.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:03.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:04.291 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 03:44:04.760 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 03:44:05.232 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 03:44:05.702 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 03:44:06.173 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 03:44:06.643 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 03:44:07.114 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 03:44:07.590 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 03:44:08.068 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 03:44:08.545 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 03:44:09.022 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 03:44:09.500 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 03:44:09.978 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 03:44:10.455 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 03:44:10.932 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 03:44:11.410 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 03:44:11.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:11.888 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 03:44:11.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:11.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:11.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:11.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:11.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:11.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:44:11.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:11.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:11.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:11.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:44:11.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:44:11.933 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:44:11.937 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:44:11.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:11.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:11.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:11.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:11.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:12.365 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 03:44:12.843 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 03:44:13.321 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 03:44:13.797 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 03:44:14.270 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 03:44:14.749 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 03:44:15.226 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 03:44:15.703 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 03:44:16.177 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 03:44:16.650 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 03:44:17.128 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 03:44:17.606 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 03:44:18.081 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 03:44:18.559 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 03:44:19.036 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 03:44:19.513 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 03:44:19.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:19.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:19.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:19.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:19.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:19.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:19.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:19.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:19.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:19.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:19.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:19.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:19.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:44:19.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:44:19.969 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:44:19.969 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13972 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:44:19.969 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13972 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:44:19.969 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13972 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:44:19.969 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13972 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:44:19.969 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13972 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:44:24.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:44:24.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:44:24.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:24.970 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:24.970 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:24.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:24.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:24.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:44:24.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:24.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:44:24.982 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:44:24.983 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:44:24.983 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:44:24.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:44:24.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:24.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:24.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:44:24.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:44:24.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:44:24.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:44:24.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:44:24.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:44:24.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:24.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:24.985 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:44:24.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:44:24.985 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:44:24.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:44:24.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:44:24.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:44:24.987 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:24.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:24.987 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:44:24.987 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:44:24.987 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:44:24.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:44:24.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:44:24.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:44:24.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:44:24.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:44:24.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:44:24.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:44:24.990 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:44:24.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:44:24.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:44:24.991 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:24.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:29.994 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:44:29.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:44:29.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:29.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:29.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:30.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:30.009 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:30.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:44:30.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:30.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:44:30.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:44:30.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:44:30.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:44:30.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:44:30.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:30.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:30.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:44:30.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:44:30.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:44:30.012 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:44:30.012 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:44:30.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:44:30.012 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:30.012 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:30.012 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:44:30.012 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:44:30.012 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:44:30.014 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:44:30.014 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:44:30.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:44:30.014 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:30.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:30.014 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:44:30.014 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:44:30.014 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:44:30.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:44:30.016 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:44:30.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:30.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:44:30.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:44:30.549 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:44:30.551 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:44:30.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:30.553 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:44:30.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:30.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:30.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:44:30.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:30.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:30.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:30.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:44:30.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:44:30.628 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:44:30.632 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:44:30.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:30.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:30.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:30.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:30.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:30.959 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:44:31.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:31.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:31.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:31.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:31.432 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:44:31.910 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:44:32.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:32.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:32.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:32.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:32.387 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:44:32.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:44:33.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:33.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:33.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:33.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:33.343 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:44:33.822 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:44:34.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:34.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:34.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:34.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:34.300 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:44:34.773 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:44:35.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:35.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:35.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:35.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:35.252 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:44:35.729 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:44:36.206 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:44:36.682 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:44:37.157 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:44:37.633 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:44:38.111 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:44:38.585 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:44:38.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:38.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:38.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:38.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:38.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:38.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:38.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:44:38.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:38.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:38.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:38.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:44:38.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:44:38.720 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:44:38.725 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:44:38.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:38.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:38.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:38.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:38.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:39.060 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:44:39.532 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:44:40.007 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:44:40.485 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:44:40.963 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:44:41.440 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:44:41.918 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:44:42.396 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:44:42.873 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:44:43.351 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:44:43.826 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:44:44.297 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:44:44.774 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:44:45.252 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:44:45.724 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:44:46.196 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:44:46.666 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:44:46.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:46.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:46.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:46.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:46.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:46.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:46.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:46.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:46.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:46.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:46.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:46.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:44:46.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:44:46.757 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:44:46.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:51.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:44:51.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:44:51.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:51.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:51.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:51.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:51.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:44:51.767 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:44:51.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:51.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:44:51.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:44:51.770 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:44:51.771 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:44:51.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:44:51.771 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:51.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:44:51.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:44:51.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:44:51.772 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:44:51.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:44:51.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:44:51.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:44:51.775 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:51.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:44:51.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:44:51.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:44:51.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:44:51.778 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:44:51.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:44:51.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:44:51.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:44:51.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:44:51.779 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:44:51.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:44:51.779 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:44:51.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:44:51.784 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:44:51.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:44:51.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:44:51.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:44:52.273 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:44:52.315 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:44:52.318 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:44:52.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:52.321 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:44:52.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:44:52.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:44:52.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:44:52.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:52.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:52.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:52.350 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:44:52.350 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:44:52.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:44:52.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:44:52.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:44:52.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:52.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:44:52.750 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:44:52.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:52.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:52.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:52.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:53.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:44:53.704 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:44:53.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:53.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:53.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:53.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:54.177 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:44:54.654 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:44:54.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:54.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:54.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:54.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:55.127 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:44:55.606 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:44:55.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:55.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:55.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:55.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:56.083 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:44:56.561 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:44:56.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:44:56.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:44:56.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:44:56.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:44:57.038 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:44:57.516 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:44:57.994 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:44:58.471 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:44:58.949 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:44:59.427 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:44:59.905 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:45:00.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:45:00.382 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:45:00.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:00.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:00.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:00.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:00.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:00.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:00.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:00.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:00.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:00.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:00.400 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:45:05.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:05.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:05.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:05.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:05.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:05.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:05.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:05.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:05.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:05.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:05.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:45:05.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:45:05.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:45:05.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:05.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:05.418 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:05.418 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:45:05.418 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:05.418 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:45:05.420 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:45:05.420 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:45:05.420 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:05.420 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:05.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:05.421 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:45:05.421 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:05.421 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:45:05.422 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:45:05.422 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:45:05.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:05.423 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:05.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:05.423 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:45:05.423 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:05.423 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:45:05.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:45:05.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:45:05.426 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:45:05.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:05.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:05.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:05.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:05.431 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:45:05.909 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:45:05.953 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:45:05.955 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:45:05.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:45:05.957 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:45:05.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:05.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:05.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:45:05.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:05.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:45:05.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:45:05.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:45:05.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:45:06.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:45:06.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:45:06.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:45:06.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:06.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:06.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:45:06.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:06.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:06.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:06.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:06.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:45:07.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:45:07.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:07.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:07.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:07.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:07.814 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:45:08.289 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:45:08.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:08.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:08.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:08.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:08.765 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:45:09.239 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:45:09.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:09.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:09.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:09.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:09.718 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:45:10.196 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:45:10.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:10.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:10.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:10.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:10.674 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:45:11.151 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:45:11.630 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:45:12.107 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:45:12.584 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:45:13.062 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:45:13.540 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:45:14.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:45:14.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:14.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:14.017 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:45:14.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:14.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:14.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:14.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:14.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:14.036 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:14.036 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:14.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:14.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:14.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:14.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:14.037 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:45:14.037 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:14.037 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:14.037 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:14.037 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:14.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:14.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:19.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:19.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:19.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:19.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:19.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:19.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:19.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:19.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:19.051 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:19.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:19.051 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:45:19.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:45:19.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:45:19.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:19.052 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:19.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:19.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:45:19.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:19.053 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:45:19.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:45:19.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:45:19.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:19.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:19.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:19.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:45:19.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:19.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:45:19.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:45:19.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:45:19.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:19.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:19.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:45:19.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:19.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:19.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:45:19.056 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:45:19.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:45:19.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:45:19.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:45:19.056 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:45:19.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:45:19.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:45:19.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:45:19.057 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:45:19.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:19.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:19.061 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:45:19.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:45:19.588 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:45:19.590 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:45:19.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:45:19.592 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:45:19.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:19.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:19.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:45:19.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:19.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:45:19.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:45:19.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:45:19.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:45:19.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:19.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:19.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:19.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:19.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:19.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:19.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:19.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:19.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:19.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:19.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:19.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:19.799 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:45:19.799 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=160 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:19.799 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=160 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:19.799 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=160 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:19.799 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=160 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:19.799 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=160 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:19.799 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=160 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:19.799 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=160 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:24.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:24.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:24.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:24.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:24.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:24.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:24.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:24.810 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:24.810 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:24.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:24.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:45:24.814 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:45:24.815 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:45:24.815 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:24.815 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:24.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:24.816 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:45:24.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:24.816 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:45:24.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:45:24.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:45:24.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:24.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:24.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:24.820 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:45:24.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:24.820 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:45:24.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:45:24.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:45:24.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:24.824 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:24.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:24.824 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:45:24.824 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:24.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:45:24.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:45:24.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:45:24.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:45:24.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:45:24.829 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:45:24.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:45:24.830 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:45:24.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:24.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:24.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:45:25.318 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:45:25.365 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:45:25.367 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:45:25.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:45:25.370 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:45:25.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:25.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:25.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:45:25.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:25.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:45:25.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:45:25.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:45:25.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:45:25.795 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:45:25.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:25.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:25.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:25.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:26.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:45:26.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:45:26.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:26.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:26.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:26.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:27.226 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:45:27.703 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:45:27.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:27.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:27.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:27.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:28.180 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:45:28.656 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:45:28.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:28.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:28.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:28.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:29.133 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:45:29.609 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:45:29.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:29.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:29.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:29.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:29.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:29.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:29.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:29.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:29.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:29.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:29.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:29.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:29.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:29.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:29.868 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1078 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:29.868 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1078 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:29.868 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1078 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:29.868 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1078 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:29.868 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1078 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:29.868 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1078 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:29.868 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1078 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:45:30.089 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:45:30.570 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:45:31.054 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:45:31.538 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:45:32.021 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:45:32.507 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:45:32.987 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:45:33.473 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:45:33.957 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:45:34.442 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:45:34.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:34.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:34.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:34.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:34.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:34.873 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:45:34.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:34.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:34.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:34.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:34.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:34.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:34.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:34.880 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:45:34.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:45:34.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:45:34.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:34.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:34.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:34.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:45:34.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:34.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:45:34.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:45:34.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:45:34.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:34.883 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:34.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:45:34.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:34.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:45:34.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:34.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:45:34.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:45:34.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:34.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:34.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:34.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:45:34.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:34.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:45:34.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:45:34.889 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:34.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:34.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:34.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:34.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:34.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:34.891 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:45:34.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:39.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:45:39.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:45:39.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:39.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:39.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:39.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:39.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:39.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:39.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:39.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:45:39.914 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:45:39.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:45:39.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:45:39.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:39.917 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:39.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:45:39.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:45:39.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:45:39.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:45:39.918 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:45:39.918 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:45:39.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:39.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:39.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:45:39.919 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:45:39.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:45:39.919 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:45:39.920 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:45:39.920 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:45:39.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:39.920 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:45:39.920 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:45:39.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:45:39.920 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:45:39.920 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:45:39.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:45:39.922 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:45:39.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:45:39.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:45:39.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:45:40.409 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:45:40.449 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:45:40.451 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:45:40.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:45:40.452 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:45:40.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:45:40.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:45:40.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:45:40.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:45:40.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:45:40.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:45:40.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:45:40.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:45:40.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:45:40.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:40.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:40.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:40.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:41.364 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:45:41.841 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:45:41.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:41.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:41.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:41.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:42.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:45:42.794 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:45:42.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:42.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:42.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:42.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:43.271 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:45:43.749 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:45:43.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:43.928 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:43.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:43.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:44.227 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:45:44.705 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:45:44.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:45:44.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:45:44.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:44.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:45:45.182 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:45:45.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:45:45.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:46.136 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:45:46.614 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:45:46.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:47.092 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:45:47.568 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:45:47.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:48.042 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:45:48.520 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:45:48.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:48.998 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:45:49.475 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:45:49.953 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:45:49.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:49.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:50.434 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:45:50.912 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:45:51.388 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:45:51.867 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:45:52.344 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:45:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:45:53.299 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:45:53.774 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:45:53.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:45:54.252 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:45:54.730 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:45:54.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:55.207 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:45:55.685 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:45:55.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:56.163 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:45:56.640 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:45:56.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:57.116 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:45:57.594 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:45:57.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:58.071 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:45:58.548 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:45:58.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:45:59.025 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:45:59.501 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:45:59.979 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:46:00.457 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:46:00.934 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:46:01.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:01.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:01.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:01.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:01.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:01.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:01.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:01.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:46:01.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:46:01.048 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:46:01.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:06.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:46:06.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:46:06.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:06.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:06.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:06.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:06.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:06.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:46:06.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:06.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:46:06.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:46:06.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:46:06.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:46:06.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:46:06.065 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:06.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:06.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:46:06.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:46:06.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:46:06.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:46:06.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:46:06.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:46:06.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:06.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:06.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:46:06.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:46:06.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:46:06.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:46:06.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:46:06.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:46:06.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:06.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:06.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:46:06.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:46:06.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:46:06.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:46:06.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:46:06.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:46:06.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:46:06.078 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:46:06.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:46:06.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:46:06.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:46:06.079 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:46:06.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:06.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:06.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:46:06.566 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:46:06.615 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:46:06.618 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:46:06.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:06.620 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:46:06.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:06.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:06.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:46:06.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:06.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:06.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:06.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:46:06.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:46:06.657 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:46:06.658 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:46:06.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 03:46:06.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:06.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:06.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:06.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:07.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:46:07.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:07.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:07.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:07.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:07.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 03:46:07.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:07.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:07.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:07.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:07.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:07.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:07.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:07.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:07.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:07.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:07.488 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:07.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:46:07.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:46:07.488 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:46:07.488 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:07.488 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:07.489 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:07.489 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:07.489 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:07.489 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:12.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:46:12.488 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:46:12.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:12.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:12.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:12.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:12.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:12.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:46:12.502 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:12.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:46:12.503 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:46:12.508 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:46:12.508 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:46:12.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:46:12.508 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:12.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:12.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:46:12.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:46:12.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:46:12.513 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:46:12.513 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:46:12.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:46:12.514 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:12.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:12.514 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:46:12.514 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:46:12.514 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:46:12.516 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:46:12.516 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:46:12.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:46:12.516 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:12.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:12.517 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:46:12.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:46:12.517 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:46:12.521 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:46:12.521 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:46:12.521 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:12.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:12.526 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:46:13.009 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:46:13.050 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:46:13.052 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:46:13.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:13.054 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:46:13.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:13.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:13.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:46:13.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:13.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:13.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:13.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:46:13.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:46:13.102 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:46:13.106 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:46:13.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 03:46:13.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:13.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:13.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:13.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:46:13.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:13.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:13.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:13.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:13.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 03:46:13.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:13.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:13.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:13.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:13.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:13.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:13.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:13.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:13.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:13.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:13.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:13.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:46:13.937 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:46:13.937 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:46:13.937 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:13.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:13.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:13.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:13.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:13.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:46:18.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:46:18.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:46:18.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:18.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:18.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:18.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:18.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:46:18.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:46:18.947 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:18.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:46:18.948 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:46:18.951 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:46:18.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:46:18.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:46:18.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:18.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:46:18.951 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:46:18.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:46:18.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:46:18.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:46:18.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:46:18.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:46:18.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:18.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:46:18.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:46:18.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:46:18.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:46:18.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:46:18.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:46:18.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:46:18.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:46:18.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:46:18.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:46:18.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:46:18.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:46:18.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:46:18.962 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:46:18.962 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:46:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:46:18.967 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:46:19.446 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:46:19.497 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:46:19.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:19.500 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:46:19.504 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:46:19.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:19.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:19.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:46:19.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:19.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:19.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:19.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:46:19.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:46:19.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:19.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:19.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:19.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:19.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:19.923 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:46:19.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:19.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:19.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:19.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:20.401 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:46:20.878 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:46:20.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:20.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:20.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:20.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:21.354 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:46:21.831 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:46:21.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:21.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:22.309 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:46:22.786 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:46:22.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:22.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:22.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:22.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:23.263 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:46:23.738 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:46:23.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:46:23.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:46:23.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:46:23.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:46:24.211 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:46:24.688 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:46:25.159 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:46:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:46:26.101 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:46:26.571 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:46:27.040 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:46:27.516 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:46:27.994 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:46:28.471 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:46:28.948 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:46:29.426 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:46:29.904 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:46:30.380 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:46:30.857 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:46:31.330 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:46:31.808 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:46:32.286 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:46:32.763 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:46:33.240 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:46:33.718 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:46:34.196 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:46:34.673 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:46:34.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:34.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:34.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:34.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:34.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:34.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:34.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:46:34.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:34.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:34.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:34.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:46:34.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:46:34.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:34.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:34.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:34.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:34.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:35.150 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:46:35.628 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:46:36.106 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:46:36.583 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:46:37.060 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:46:37.537 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:46:38.014 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:46:38.490 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:46:38.967 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:46:39.446 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:46:39.924 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:46:40.401 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:46:40.879 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:46:41.357 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:46:41.835 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:46:42.312 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:46:42.790 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:46:43.269 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:46:43.747 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:46:44.224 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:46:44.702 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:46:45.180 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:46:45.658 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:46:46.136 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:46:46.614 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:46:47.093 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:46:47.571 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:46:48.048 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:46:48.526 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:46:49.000 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:46:49.471 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:46:49.942 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:46:50.420 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:46:50.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:50.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:50.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:50.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:50.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:46:50.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:46:50.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:46:50.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:50.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:50.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:50.620 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:46:50.620 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:46:50.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:46:50.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:46:50.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:46:50.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:50.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:46:50.892 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:46:51.367 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:46:51.844 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:46:52.321 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:46:52.798 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:46:53.276 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 03:46:53.753 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 03:46:54.231 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 03:46:54.709 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 03:46:55.187 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 03:46:55.662 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 03:46:56.138 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 03:46:56.616 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 03:46:57.094 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 03:46:57.571 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 03:46:58.046 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 03:46:58.523 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 03:46:59.001 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 03:46:59.478 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 03:46:59.956 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 03:47:00.434 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 03:47:00.912 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 03:47:01.390 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 03:47:01.866 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 03:47:02.344 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 03:47:02.822 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 03:47:03.299 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 03:47:03.774 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 03:47:04.248 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 03:47:04.726 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 03:47:05.203 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 03:47:05.681 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 03:47:06.158 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 03:47:06.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:06.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:06.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:47:06.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:47:06.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:47:06.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:47:06.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:47:06.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:06.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:47:06.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:47:06.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:47:06.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:47:06.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:06.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:06.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:47:06.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:47:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:06.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:06.635 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 03:47:07.112 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 03:47:07.590 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 03:47:08.068 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 03:47:08.545 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 03:47:09.022 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 03:47:09.495 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 03:47:09.966 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 03:47:10.435 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 03:47:10.908 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 03:47:11.378 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 03:47:11.847 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 03:47:12.318 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 03:47:12.790 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 03:47:13.261 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 03:47:13.731 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 03:47:14.199 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 03:47:14.668 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 03:47:15.137 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 03:47:15.608 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 03:47:16.079 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 03:47:16.548 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 03:47:17.017 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 03:47:17.492 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 03:47:17.970 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 03:47:18.447 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 03:47:18.926 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 03:47:19.402 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 03:47:19.875 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 03:47:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 03:47:20.820 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 03:47:21.294 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 03:47:21.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:21.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:21.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:47:21.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:47:21.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:21.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:21.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:21.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:21.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:21.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:21.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:21.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:21.731 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:47:21.731 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:47:21.731 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:47:21.731 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13459 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:21.731 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13459 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:21.731 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13459 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:21.731 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13459 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:21.731 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13459 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:21.731 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13459 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:26.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:47:26.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:47:26.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:26.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:26.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:26.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:26.741 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:26.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:47:26.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:26.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:47:26.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:47:26.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:47:26.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:47:26.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:47:26.746 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:26.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:26.746 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:47:26.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:47:26.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:47:26.749 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:47:26.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:47:26.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:47:26.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:26.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:26.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:47:26.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:47:26.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:47:26.751 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:47:26.751 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:47:26.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:47:26.752 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:26.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:26.752 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:47:26.752 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:47:26.752 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:47:26.754 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:47:26.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:47:26.754 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:47:26.754 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:47:26.754 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:47:26.754 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:47:26.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:47:26.755 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:47:26.755 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:47:26.755 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:26.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:26.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:47:26.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:47:26.756 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:47:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:26.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:47:31.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:47:31.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:31.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:31.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:31.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:31.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:31.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:47:31.761 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:31.761 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:47:31.761 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:47:31.762 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:47:31.762 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:47:31.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:47:31.762 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:31.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:31.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:47:31.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:47:31.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:47:31.763 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:47:31.763 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:47:31.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:47:31.763 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:31.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:31.763 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:47:31.763 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:47:31.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:47:31.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:47:31.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:47:31.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:47:31.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:31.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:31.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:47:31.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:47:31.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:47:31.766 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:47:31.766 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:47:31.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.767 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:31.771 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:47:32.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:47:32.277 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:47:32.278 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:47:32.278 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:47:32.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:32.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:47:32.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:47:32.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:47:32.288 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:47:32.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:32.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:47:32.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:47:32.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:47:32.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:47:32.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:32.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:47:32.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:47:32.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:32.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:32.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:47:32.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:32.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:32.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:32.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:33.191 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:47:33.662 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:47:33.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:33.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:33.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:33.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:34.132 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:47:34.603 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:47:34.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:34.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:34.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:34.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:35.074 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:47:35.545 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:47:35.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:35.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:35.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:35.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:36.013 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:47:36.486 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:47:36.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:36.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:36.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:36.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:36.963 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:47:37.440 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:47:37.910 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:47:38.380 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:47:38.848 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:47:39.319 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:47:39.789 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:47:40.257 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:47:40.728 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:47:41.201 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:47:41.679 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:47:42.157 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:47:42.635 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:47:42.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:42.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:42.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:47:42.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:47:42.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:42.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:42.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:42.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:42.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:42.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:42.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:42.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:42.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:47:42.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:47:42.729 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:47:47.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:47:47.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:47:47.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:47.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:47.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:47.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:47.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:47.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:47:47.736 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:47.736 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:47:47.736 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:47:47.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:47:47.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:47:47.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:47:47.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:47.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:47.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:47:47.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:47:47.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:47:47.738 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:47:47.738 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:47:47.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:47:47.738 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:47.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:47.738 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:47:47.738 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:47:47.738 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:47:47.739 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:47:47.739 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:47:47.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:47:47.739 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:47:47.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:47.740 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:47:47.740 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:47:47.740 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:47:47.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:47:47.741 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:47:47.742 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:47:47.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:47:47.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:47:48.216 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:47:48.254 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:47:48.254 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:47:48.254 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:47:48.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:48.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:47:48.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:47:48.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:47:48.264 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:47:48.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:48.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:47:48.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:47:48.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:47:48.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:47:48.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:48.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:47:48.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:47:48.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:48.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:48.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:47:48.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:48.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:48.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:48.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:49.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:47:49.625 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:47:49.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:49.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:49.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:49.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:50.096 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:47:50.567 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:47:50.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:50.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:50.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:50.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:51.042 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:47:51.515 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:47:51.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:51.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:51.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:51.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:51.986 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:47:52.458 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:47:52.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:52.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:52.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:52.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:52.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:47:53.399 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:47:53.870 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:47:54.341 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:47:54.813 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:47:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:47:55.766 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:47:56.244 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:47:56.722 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:47:57.200 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:47:57.678 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:47:58.156 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:47:58.633 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:47:58.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:47:58.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:47:58.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:47:58.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:47:58.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:47:58.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:47:58.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:47:58.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:47:58.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:47:58.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:47:58.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:47:58.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:47:58.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:47:58.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:47:58.711 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:47:58.711 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2364 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:58.711 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2364 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:58.712 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2364 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:58.712 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2364 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:58.712 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2364 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:58.712 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2364 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:47:58.712 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2364 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:03.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:48:03.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:48:03.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:03.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:03.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:03.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:03.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:03.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:48:03.722 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:03.722 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:48:03.722 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:48:03.725 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:48:03.725 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:48:03.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:48:03.725 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:03.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:03.726 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:48:03.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:48:03.726 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:48:03.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:48:03.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:48:03.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:48:03.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:03.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:03.728 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:48:03.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:48:03.728 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:48:03.730 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:48:03.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:48:03.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:48:03.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:03.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:03.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:48:03.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:48:03.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:48:03.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:48:03.733 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:48:03.734 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:03.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:03.738 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:48:04.221 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:48:04.261 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:48:04.263 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:04.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:04.265 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:48:04.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:48:04.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:48:04.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:48:04.295 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:04.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:04.297 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:48:04.297 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:48:04.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:48:04.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:48:04.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:04.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:48:04.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:48:04.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:04.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:04.698 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:48:04.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:04.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:04.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:04.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:05.176 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:48:05.192 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:05.653 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:48:05.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:05.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:05.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:05.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:06.131 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:48:06.609 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:48:06.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:06.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:06.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:06.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:07.087 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:48:07.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:48:07.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:07.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:07.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:07.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:08.044 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:48:08.521 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:48:08.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:08.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:08.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:08.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:08.999 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:48:09.477 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:48:09.955 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:48:10.433 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:48:10.910 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:48:11.388 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:48:11.866 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:48:12.344 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:48:12.822 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:48:13.300 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:48:13.778 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:48:14.256 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:48:14.734 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:48:15.212 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:48:15.689 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:48:16.167 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:48:16.646 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:48:17.124 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:48:17.602 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:48:18.079 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:48:18.557 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:48:19.035 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:48:19.513 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:48:19.990 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:48:20.468 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:48:20.946 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:48:21.424 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:48:21.901 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:48:22.380 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:48:22.858 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:48:23.336 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:48:23.813 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:48:23.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:23.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:23.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:48:23.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:48:23.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:23.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:23.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:23.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:23.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:23.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:23.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:23.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:23.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:48:23.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:48:23.910 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:23.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:48:28.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:48:28.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:48:28.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:28.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:28.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:28.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:28.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:28.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:48:28.922 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:28.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:48:28.922 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:48:28.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:48:28.925 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:48:28.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:48:28.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:28.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:28.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:48:28.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:48:28.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:48:28.927 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:48:28.927 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:48:28.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:48:28.927 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:28.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:28.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:48:28.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:48:28.928 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:48:28.929 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:48:28.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:48:28.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:48:28.930 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:28.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:28.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:48:28.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:48:28.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:48:28.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:48:28.933 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:48:28.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:28.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:28.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:48:29.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:48:29.460 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:48:29.462 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:29.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:29.464 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:48:29.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:48:29.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:48:29.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:48:29.509 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:29.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:29.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:48:29.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:48:29.514 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:48:29.514 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:48:29.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:29.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:48:29.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:48:29.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:29.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:29.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:48:29.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:29.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:29.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:29.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:30.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:48:30.855 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:48:30.880 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:30.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:30.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:30.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:30.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:31.332 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:48:31.810 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:48:31.854 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:31.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:31.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:31.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:31.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:32.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:48:32.766 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:48:32.828 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:32.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:32.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:32.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:32.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:33.244 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:48:33.722 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:48:33.802 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:33.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:33.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:33.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:33.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:34.199 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:48:34.677 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:48:34.775 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:35.154 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:48:35.632 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:48:35.750 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:36.110 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:48:36.588 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:48:36.723 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:37.065 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:48:37.543 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:48:37.698 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:38.021 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:48:38.499 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:48:38.672 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:38.977 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:48:39.455 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:48:39.646 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:39.933 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:48:40.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:40.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:40.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:48:40.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:48:40.410 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:48:40.412 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:40.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:40.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:40.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:40.416 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:40.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:40.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:40.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:40.416 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:48:40.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:48:40.416 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:48:45.415 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:48:45.416 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:48:45.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:45.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:45.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:45.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:45.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:48:45.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:48:45.427 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:45.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:48:45.427 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:48:45.431 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:48:45.432 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:48:45.432 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:48:45.432 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:45.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:48:45.433 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:48:45.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:48:45.433 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:48:45.435 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:48:45.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:48:45.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:48:45.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:45.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:48:45.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:48:45.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:48:45.435 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:48:45.438 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:48:45.438 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:48:45.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:48:45.438 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:48:45.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:48:45.438 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:48:45.438 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:48:45.438 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:48:45.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:48:45.442 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:48:45.442 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:48:45.442 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:48:45.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:48:45.446 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:48:45.930 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:48:45.971 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:48:45.972 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:45.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:45.974 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:48:46.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:48:46.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:48:46.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:48:46.012 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:48:46.014 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:46.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:46.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:48:46.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:48:46.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:48:46.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:48:46.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:48:46.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:48:46.028 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:46.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:48:46.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:46.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:48:46.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:48:46.409 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:48:46.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:46.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:46.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:46.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:46.885 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:48:47.363 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:48:47.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:47.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:47.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:47.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:47.841 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:48:48.318 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:48:48.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:48.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:48.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:48.448 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:48.796 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:48:49.274 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:48:49.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:49.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:49.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:49.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:49.752 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:48:50.229 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:48:50.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:48:50.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:48:50.451 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:48:50.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:48:50.707 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:48:51.185 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:48:51.663 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:48:52.140 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:48:52.618 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:48:53.095 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:48:53.572 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:48:54.050 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:48:54.528 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:48:55.006 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:48:55.484 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:48:55.961 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:48:56.438 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:48:56.640 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:48:56.915 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:48:57.393 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:48:57.871 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:48:58.349 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:48:58.827 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:48:59.305 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:48:59.783 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:49:00.260 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:49:00.738 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:49:01.216 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:49:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:49:02.172 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:49:02.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:02.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:02.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:02.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:02.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:02.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:02.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:02.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:02.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:02.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:02.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:02.532 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:49:02.532 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:02.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:02.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:02.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:02.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:02.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:02.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:02.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:02.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:02.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:02.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3650 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:07.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:07.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:07.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:07.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:07.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:07.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:07.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:07.565 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:07.565 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:07.566 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:07.566 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:49:07.571 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:49:07.572 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:49:07.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:07.573 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:07.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:07.573 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:49:07.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:07.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:49:07.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:49:07.578 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:49:07.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:07.578 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:07.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:07.579 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:49:07.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:07.579 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:49:07.582 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:49:07.582 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:49:07.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:07.583 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:07.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:07.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:49:07.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:07.583 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:49:07.587 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:49:07.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:49:07.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:49:07.587 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:49:07.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:49:07.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:49:07.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:49:07.588 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:49:07.588 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:07.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:07.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:49:08.077 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:49:08.122 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:49:08.124 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:49:08.126 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:49:08.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:08.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:08.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:08.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:08.170 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:49:08.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:08.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:08.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:08.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:08.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:08.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:08.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:08.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:08.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:08.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:08.554 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:49:08.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:08.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:08.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:08.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:09.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:49:09.048 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:49:09.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:49:09.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:09.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:09.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:09.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:09.987 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:49:10.465 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:49:10.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:10.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:10.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:10.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:10.942 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:49:11.420 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:49:11.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:11.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:11.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:11.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:11.898 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:49:12.375 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:49:12.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:12.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:12.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:12.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:12.853 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:49:13.331 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:49:13.808 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:49:14.286 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:49:14.764 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:49:15.242 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:49:15.719 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:49:16.197 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:49:16.675 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:49:17.153 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:49:17.631 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:49:18.109 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:49:18.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:18.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:18.236 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:18.236 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:18.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:18.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:18.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:18.240 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:49:23.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:23.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:23.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:23.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:23.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:23.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:23.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:23.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:23.255 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:23.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:23.255 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:49:23.258 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:49:23.259 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:49:23.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:23.259 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:23.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:23.260 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:49:23.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:23.261 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:49:23.263 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:49:23.263 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:49:23.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:23.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:23.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:23.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:49:23.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:23.264 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:49:23.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:49:23.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:49:23.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:23.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:23.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:23.268 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:49:23.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:23.268 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:49:23.272 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:49:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:49:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:49:23.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:49:23.273 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:49:23.273 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:49:23.273 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:49:23.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:23.278 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:49:23.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:49:23.799 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:49:23.800 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:49:23.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:23.802 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:49:23.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:23.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:23.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:23.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:23.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:23.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:23.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:23.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:23.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:23.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:23.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:23.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:23.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:24.237 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:49:24.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:24.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:24.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:24.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:24.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:24.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:24.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:24.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:24.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:24.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:24.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:24.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:24.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:24.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:24.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:24.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:24.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:24.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:24.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:24.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:24.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:49:24.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:24.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:24.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:24.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:24.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:24.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:24.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:24.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:24.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:24.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:24.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:24.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:25.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:25.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:25.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:25.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:25.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:25.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:25.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:25.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:25.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:25.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:25.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:25.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:25.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:25.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:25.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:25.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:25.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:25.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:25.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:25.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:25.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:25.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:25.191 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:49:25.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:25.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:25.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:25.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:25.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:25.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:25.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:25.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:25.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:25.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:25.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:25.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:25.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:25.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:25.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:25.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:25.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:25.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:25.595 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:49:30.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:30.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:30.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:30.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:30.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:30.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:30.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:30.608 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:30.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:30.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:30.609 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:49:30.612 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:49:30.612 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:49:30.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:30.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:30.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:30.613 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:49:30.614 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:30.614 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:49:30.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:49:30.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:49:30.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:30.616 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:30.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:30.616 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:49:30.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:30.616 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:49:30.618 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:49:30.619 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:49:30.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:30.619 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:30.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:30.619 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:49:30.619 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:30.619 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.622 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:49:30.622 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:49:30.622 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:49:30.622 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:30.627 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:49:31.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:49:31.155 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:49:31.157 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:49:31.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:31.159 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:49:31.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:31.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:31.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:31.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:31.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:31.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:31.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:31.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:31.203 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:49:31.206 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 03:49:31.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:31.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:31.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:31.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:31.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:31.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:49:31.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:31.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:31.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:31.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:31.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:31.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:31.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:31.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:31.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:31.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:31.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:31.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:31.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:31.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:31.608 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:49:31.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:31.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:31.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:31.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:31.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:31.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:31.609 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:36.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:36.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:36.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:36.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:36.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:36.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:36.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:36.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:36.622 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:36.622 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:36.622 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:49:36.625 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:49:36.626 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:49:36.626 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:36.626 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:36.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:36.627 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:49:36.627 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:36.627 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:49:36.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:49:36.629 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:49:36.629 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:36.629 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:36.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:36.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:49:36.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:36.630 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:49:36.632 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:49:36.632 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:49:36.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:36.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:36.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:36.633 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:49:36.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:36.633 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:49:36.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:49:36.638 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:49:36.638 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.638 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:36.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:36.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:36.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:36.643 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:49:37.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:49:37.170 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:49:37.172 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:49:37.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:37.175 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:49:37.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:37.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:37.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:37.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:37.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:37.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:37.196 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:37.196 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:37.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:37.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:37.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:37.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:37.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:37.604 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:49:37.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:37.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:37.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:37.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:38.083 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:49:38.560 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:49:38.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:38.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:38.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:38.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:39.038 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:49:39.516 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:49:39.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:39.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:39.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:39.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:39.994 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:49:40.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:40.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:40.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:40.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:40.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:40.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:40.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:40.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:40.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:40.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:40.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:40.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:40.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:40.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:40.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:40.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:40.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:40.471 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:49:40.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:40.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:40.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:40.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:40.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:40.949 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:49:41.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:49:41.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:41.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:41.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:41.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:41.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:49:42.384 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:49:42.862 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:49:43.341 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:49:43.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:43.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:43.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:43.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:43.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:43.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:43.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:43.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:43.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:43.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:43.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:43.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:43.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:43.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:43.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:43.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:43.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:43.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:43.819 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:49:44.297 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:49:44.775 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:49:45.254 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:49:45.731 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:49:46.209 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:49:46.687 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:49:46.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:46.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:46.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:46.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:46.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:46.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:46.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:46.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:46.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:46.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:46.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:46.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:46.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:46.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:46.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:46.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:46.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:47.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:47.164 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:49:47.642 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:49:48.120 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:49:48.598 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:49:49.076 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:49:49.553 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:49:50.030 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:49:50.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:50.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:50.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:50.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:50.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:50.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:50.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:50.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:50.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:50.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:50.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:50.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:50.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:50.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:50.098 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:49:50.098 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:50.098 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:50.098 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:50.098 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:50.098 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:50.098 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:50.098 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:49:55.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:49:55.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:49:55.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:55.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:55.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:55.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:55.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:49:55.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:55.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:55.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:49:55.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:49:55.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:49:55.118 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:49:55.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:55.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:55.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:49:55.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:49:55.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:49:55.120 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:49:55.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:49:55.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:49:55.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:55.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:55.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:49:55.122 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:49:55.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:49:55.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:49:55.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:49:55.125 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:49:55.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:55.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:49:55.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:49:55.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:49:55.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:49:55.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:49:55.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:49:55.128 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:49:55.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:49:55.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:49:55.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:49:55.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:49:55.617 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:49:55.662 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:49:55.664 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:49:55.666 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:49:55.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:49:55.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:49:55.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:49:55.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:49:55.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:49:55.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:49:55.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:49:55.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:49:55.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:49:56.094 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:49:56.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:56.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:56.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:56.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:56.572 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:49:57.050 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:49:57.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:57.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:57.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:57.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:57.528 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:49:58.005 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:49:58.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:58.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:58.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:58.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:58.483 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:49:58.961 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:49:59.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:49:59.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:49:59.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:49:59.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:49:59.438 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:49:59.916 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:50:00.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:00.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:00.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:00.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:00.393 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:50:00.871 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:50:01.348 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:50:01.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:50:02.304 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:50:02.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:50:03.259 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:50:03.737 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:50:04.214 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:50:04.692 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:50:05.170 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:50:05.647 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:50:06.125 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:50:06.603 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:50:07.080 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:50:07.557 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:50:08.035 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:50:08.512 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:50:08.990 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:50:09.467 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:50:09.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:50:09.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:50:09.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:09.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:09.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:09.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:09.759 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:50:09.759 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:50:09.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:50:09.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:50:09.759 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:50:09.759 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:50:09.759 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:50:09.759 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:09.759 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:09.759 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:09.759 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:09.759 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:09.759 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:14.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:50:14.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:50:14.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:50:14.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:50:14.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:50:14.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:50:14.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:50:14.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:50:14.793 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:14.793 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:50:14.793 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:50:14.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:50:14.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:50:14.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:50:14.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:14.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:50:14.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:50:14.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:50:14.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:50:14.799 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:50:14.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:50:14.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:50:14.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:14.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:50:14.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:50:14.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:50:14.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:50:14.806 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:50:14.807 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:50:14.807 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:50:14.807 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:14.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:50:14.808 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:50:14.809 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:50:14.809 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:50:14.814 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:50:14.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:50:14.814 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:50:14.814 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:50:14.814 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:50:14.814 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.815 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:50:14.815 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:50:14.815 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:50:14.816 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:14.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:14.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:50:15.304 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:50:15.349 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:50:15.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:50:15.352 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:50:15.356 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:50:15.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:50:15.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:50:15.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:50:15.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:50:15.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:50:15.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:50:15.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:50:15.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:50:15.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:50:15.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:50:15.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:50:15.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:50:15.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:50:15.781 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:50:15.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:15.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:15.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:15.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:16.259 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:50:16.737 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:50:16.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:16.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:16.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:16.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:17.215 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:50:17.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:50:17.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:50:17.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:50:17.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:50:17.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:50:17.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:50:17.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:50:17.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:50:17.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:50:17.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:50:17.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:17.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:17.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:17.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:18.171 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:50:18.649 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:50:18.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:18.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:18.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:18.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:50:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:50:19.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:19.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:19.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:19.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:20.083 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:50:20.560 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:50:21.038 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:50:21.516 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:50:21.993 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:50:22.471 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:50:22.950 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:50:23.427 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:50:23.904 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:50:24.382 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:50:24.860 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:50:25.338 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:50:25.816 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:50:26.294 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:50:26.771 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:50:27.248 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:50:27.726 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:50:28.204 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:50:28.682 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:50:29.159 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:50:29.638 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:50:30.115 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:50:30.592 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:50:31.070 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:50:31.548 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:50:32.025 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:50:32.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:50:32.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:50:32.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:50:32.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:32.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:32.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:32.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:32.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:50:32.326 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:50:32.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:50:32.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:50:32.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:50:32.326 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:50:32.326 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:50:32.326 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:32.326 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:32.326 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:32.326 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:32.326 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:32.326 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:32.326 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:37.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:50:37.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:50:37.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:50:37.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:50:37.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:50:37.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:50:37.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:50:37.341 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:50:37.342 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:37.342 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:50:37.342 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:50:37.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:50:37.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:50:37.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:50:37.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:37.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:50:37.347 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:50:37.347 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:50:37.348 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:50:37.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:50:37.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:50:37.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:50:37.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:37.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:50:37.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:50:37.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:50:37.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:50:37.354 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:50:37.354 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:50:37.355 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:50:37.355 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:50:37.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:50:37.355 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:50:37.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:50:37.356 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:50:37.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:50:37.361 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:50:37.361 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:50:37.361 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:50:37.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:50:37.366 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:50:37.850 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:50:37.889 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:50:37.891 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:50:37.894 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:50:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:50:37.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:50:37.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:50:37.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:50:37.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:50:37.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:50:37.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:50:37.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:50:37.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:50:38.327 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:50:38.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:38.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:38.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:38.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:38.804 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:50:39.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:50:39.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:39.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:39.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:39.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:39.760 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:50:40.239 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:50:40.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:40.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:40.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:40.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:40.716 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:50:41.194 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:50:41.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:41.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:41.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:41.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:41.672 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:50:42.149 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:50:42.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:42.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:42.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:42.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:42.627 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:50:43.105 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:50:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:50:44.058 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:50:44.536 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:50:45.014 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:50:45.492 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:50:45.970 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:50:46.448 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:50:46.925 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:50:47.403 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:50:47.881 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:50:48.358 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:50:48.836 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:50:49.314 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:50:49.792 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:50:50.270 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:50:50.748 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:50:51.225 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:50:51.703 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:50:52.181 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:50:52.658 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:50:53.136 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:50:53.614 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:50:54.091 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:50:54.569 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:50:55.047 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:50:55.525 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:50:56.002 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:50:56.480 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:50:56.958 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:50:57.435 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:50:57.913 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:50:58.390 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:50:58.868 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:50:59.346 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:50:59.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:50:59.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:50:59.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:50:59.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:50:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:50:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:50:59.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:50:59.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:50:59.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:50:59.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:50:59.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:50:59.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:50:59.385 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:50:59.385 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4702 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:59.385 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4702 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:59.385 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4702 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:59.385 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4702 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:59.385 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4702 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:59.385 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4702 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:50:59.385 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4702 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:04.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:51:04.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:51:04.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:51:04.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:51:04.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:51:04.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:51:04.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:51:04.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:51:04.397 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:04.397 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:51:04.397 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:51:04.398 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:51:04.398 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:51:04.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:51:04.398 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:04.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:51:04.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:51:04.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:51:04.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:51:04.399 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:51:04.399 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:51:04.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:51:04.399 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:04.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:51:04.399 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:51:04.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:51:04.399 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:51:04.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:51:04.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:51:04.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:51:04.400 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:04.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:51:04.400 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:51:04.400 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:51:04.400 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:51:04.402 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:51:04.402 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:51:04.402 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:04.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:04.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:04.407 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:51:04.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:51:04.930 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:51:04.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:51:04.933 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:51:04.935 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:51:04.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:51:04.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:51:04.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:51:04.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:51:04.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:51:04.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:51:04.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:51:04.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:51:05.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:51:05.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:05.843 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:51:06.321 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:51:06.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:06.798 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:51:07.276 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:51:07.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:07.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:07.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:07.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:07.754 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:51:08.231 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:51:08.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:08.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:08.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:08.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:08.708 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:51:09.186 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:51:09.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:09.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:09.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:09.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:09.663 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:51:10.141 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:51:10.619 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:51:11.097 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:51:11.574 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:51:12.052 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:51:12.530 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:51:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:51:13.485 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:51:13.963 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:51:14.441 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:51:14.919 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:51:15.397 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:51:15.874 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:51:16.352 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:51:16.830 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:51:17.308 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:51:17.785 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:51:18.263 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:51:18.741 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:51:19.219 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:51:19.696 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:51:20.174 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:51:20.652 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:51:21.129 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:51:21.607 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:51:22.085 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:51:22.563 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:51:23.041 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:51:23.518 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:51:23.996 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:51:24.474 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:51:24.952 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:51:25.430 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:51:25.907 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:51:26.385 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:51:26.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:51:26.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:51:26.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:26.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:26.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:26.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:26.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:51:26.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:51:26.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:51:26.428 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:51:26.428 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4703 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:26.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:51:26.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:51:26.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:51:26.428 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4703 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:26.428 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4703 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:26.428 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4703 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:26.428 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4703 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:26.428 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4703 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:26.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4703 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:51:31.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:51:31.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:51:31.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:51:31.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:51:31.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:51:31.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:51:31.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:51:31.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:51:31.443 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:31.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:51:31.443 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:51:31.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:51:31.448 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:51:31.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:51:31.448 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:31.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:51:31.449 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:51:31.449 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:51:31.449 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:51:31.451 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:51:31.451 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:51:31.451 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:51:31.451 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:31.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:51:31.452 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:51:31.452 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:51:31.452 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:51:31.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:51:31.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:51:31.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:51:31.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:51:31.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:51:31.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:51:31.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:51:31.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:51:31.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:51:31.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:51:31.459 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:51:31.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:51:31.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:51:31.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:51:31.947 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:51:31.993 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:51:31.995 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:51:31.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:51:31.997 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:51:31.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:51:31.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:51:32.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:51:32.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:51:32.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:51:32.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:51:32.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:51:32.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:51:32.424 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:51:32.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:32.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:32.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:32.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:32.902 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:51:33.379 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:51:33.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:33.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:33.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:33.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:33.857 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:51:34.335 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:51:34.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:34.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:34.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:34.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:34.812 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:51:35.290 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:51:35.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:35.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:35.466 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:35.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:35.768 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:51:36.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:51:36.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:51:36.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:51:36.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:51:36.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:51:36.723 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:51:37.201 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:51:37.679 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:51:38.160 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:51:38.637 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:51:39.115 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:51:39.593 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:51:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:51:40.548 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:51:41.026 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:51:41.504 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:51:41.981 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:51:42.459 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:51:42.937 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:51:43.415 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:51:43.893 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:51:44.370 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:51:44.848 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:51:45.326 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:51:45.803 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:51:46.281 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:51:46.758 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:51:47.236 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:51:47.713 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:51:48.191 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:51:48.669 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:51:49.148 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:51:49.625 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:51:50.103 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:51:50.580 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:51:51.058 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:51:51.537 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:51:52.014 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:51:52.492 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:51:52.970 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:51:53.447 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:51:53.925 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:51:54.403 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:51:54.880 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:51:55.358 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:51:55.836 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:51:56.313 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:51:56.792 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:51:57.270 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:51:57.748 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:51:58.225 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:51:58.703 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:51:59.179 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:51:59.656 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:52:00.134 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:52:00.612 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:52:01.090 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:52:01.568 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:52:02.046 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:52:02.524 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:52:03.002 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:52:03.479 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:52:03.957 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:52:04.435 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:52:04.912 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:52:05.390 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:52:05.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:52:05.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:52:05.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:05.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:05.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:05.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:05.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:05.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:05.486 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:05.486 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:05.486 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:52:05.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:05.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:10.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:10.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:10.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:10.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:10.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:10.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:10.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:10.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:10.512 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:10.512 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:10.512 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:52:10.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:52:10.516 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:52:10.516 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:10.516 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:10.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:10.517 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:52:10.517 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:10.517 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:52:10.518 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:52:10.519 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:52:10.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:10.519 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:10.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:10.519 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:52:10.519 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:10.519 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:52:10.521 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:52:10.521 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:52:10.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:10.521 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:10.521 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:52:10.521 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:10.521 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:52:10.524 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:52:10.524 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:52:10.524 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:10.529 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:52:11.008 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:52:11.052 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:52:11.053 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:52:11.055 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:52:11.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:52:11.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:52:11.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:52:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:52:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:52:11.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:52:11.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:52:11.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:52:11.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:52:11.485 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:52:11.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:11.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:11.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:11.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:11.963 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:52:12.440 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:52:12.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:12.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:12.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:12.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:12.919 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:52:13.396 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:52:13.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:13.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:13.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:13.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:13.874 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:52:14.352 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:52:14.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:14.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:14.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:14.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:14.829 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:52:15.307 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:52:15.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:15.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:15.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:15.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:15.785 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:52:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:52:16.741 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:52:17.218 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:52:17.696 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:52:18.173 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:52:18.651 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:52:19.129 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:52:19.607 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:52:20.084 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:52:20.562 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:52:21.040 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:52:21.518 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:52:21.996 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:52:22.473 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:52:22.951 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:52:23.428 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:52:23.905 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:52:24.383 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:52:24.860 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:52:25.338 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:52:25.816 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:52:26.294 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:52:26.771 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:52:27.249 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:52:27.726 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:52:28.204 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:52:28.681 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:52:29.159 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:52:29.637 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:52:30.115 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:52:30.591 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:52:31.069 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:52:31.547 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:52:32.025 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:52:32.502 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:52:32.980 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:52:33.458 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:52:33.936 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:52:34.415 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:52:34.892 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:52:35.370 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:52:35.848 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:52:36.326 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:52:36.804 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:52:37.282 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:52:37.760 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:52:38.238 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:52:38.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:52:38.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:52:38.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:38.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:38.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:38.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:38.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:38.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:38.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:38.553 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:52:38.553 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:38.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:38.553 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:38.553 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.554 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.554 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.554 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.554 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.554 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.554 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:38.554 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5986 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:43.551 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:43.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:43.553 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:43.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:43.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:43.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:43.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:43.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:43.564 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:43.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:43.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:52:43.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:52:43.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:52:43.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:43.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:43.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:43.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:52:43.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:43.568 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:52:43.569 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:52:43.570 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:52:43.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:43.570 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:43.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:43.570 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:52:43.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:43.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:52:43.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:52:43.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:52:43.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:43.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:43.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:43.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:52:43.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:43.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:52:43.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:52:43.575 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:52:43.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:52:43.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:43.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:52:44.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:52:44.103 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:52:44.105 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:52:44.107 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:52:44.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:52:44.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:44.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:44.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:44.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:44.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:44.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:44.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:44.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:44.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:44.124 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:52:44.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.126 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.126 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.126 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.126 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.126 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:44.126 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:49.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:49.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:49.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:49.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:49.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:49.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:49.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:49.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:49.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:49.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:52:49.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:52:49.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:52:49.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:49.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:49.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:49.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:52:49.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:49.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:52:49.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:52:49.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:52:49.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:49.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:49.143 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:49.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:52:49.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:49.143 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:52:49.145 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:52:49.145 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:52:49.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:49.145 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:49.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:49.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:52:49.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:49.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:52:49.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:52:49.148 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:52:49.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:49.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:49.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:52:49.634 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:52:49.674 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:52:49.676 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:52:49.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:52:49.678 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:52:49.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:49.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:49.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:49.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:49.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:49.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:49.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:49.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:49.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:49.695 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:52:49.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:49.695 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.696 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.696 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.696 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.696 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.696 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.696 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:49.696 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:54.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:54.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:54.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:54.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:54.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:54.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:54.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:54.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:54.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:54.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:52:54.706 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:52:54.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:52:54.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:52:54.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:54.706 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:54.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:54.706 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:52:54.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:52:54.707 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:52:54.709 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:52:54.709 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:52:54.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:54.709 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:54.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:54.709 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:52:54.709 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:52:54.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:52:54.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:52:54.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:52:54.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:54.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:52:54.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:54.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:52:54.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:52:54.714 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:52:54.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:52:54.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:52:54.720 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:52:54.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:52:54.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:52:54.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:52:55.203 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:52:55.257 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:52:55.260 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:52:55.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:52:55.262 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:52:55.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:52:55.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:52:55.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:52:55.276 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:52:55.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:52:55.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:52:55.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:52:55.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:52:55.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:52:55.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:52:55.280 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:52:55.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:52:55.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:00.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:00.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:00.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:00.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:00.282 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:00.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:00.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:00.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:00.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:00.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:00.291 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:53:00.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:53:00.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:53:00.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:00.295 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:00.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:00.295 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:53:00.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:00.295 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:53:00.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:53:00.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:53:00.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:00.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:00.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:00.298 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:53:00.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:00.298 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:53:00.300 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:53:00.300 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:53:00.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:00.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:00.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:00.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:53:00.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:00.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:53:00.303 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:53:00.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:53:00.304 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:53:00.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:00.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:00.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:53:00.793 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:53:00.832 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:53:00.834 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:53:00.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:53:00.837 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:53:00.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:00.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:00.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:53:00.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:53:00.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:53:00.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:53:00.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:53:00.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:53:01.270 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:53:01.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:01.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:01.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:01.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:01.748 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:53:02.226 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:53:02.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:02.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:02.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:02.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:02.704 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:53:03.182 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:53:03.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:03.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:03.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:03.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:03.660 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:53:04.138 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:53:04.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:04.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:04.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:04.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:04.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:53:05.093 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:53:05.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:05.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:05.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:05.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:05.571 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:53:06.049 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:53:06.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:53:07.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:53:07.482 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:53:07.960 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:53:08.438 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:53:08.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:08.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:08.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:08.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:08.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:08.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:08.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:08.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:08.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:08.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:08.894 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:08.894 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:08.894 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:53:08.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:08.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:08.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:08.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:08.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:13.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:13.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:13.898 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:13.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:13.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:13.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:13.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:13.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:13.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:13.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:13.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:53:13.910 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:53:13.910 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:53:13.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:13.911 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:13.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:13.911 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:53:13.912 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:13.912 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:53:13.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:53:13.914 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:53:13.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:13.914 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:13.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:13.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:53:13.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:13.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:53:13.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:53:13.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:53:13.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:13.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:13.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:13.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:53:13.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:13.917 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:53:13.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:53:13.921 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:53:13.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:53:13.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:13.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:13.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:53:14.410 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:53:14.448 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:53:14.449 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:53:14.450 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:53:14.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:53:14.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:14.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:14.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:53:14.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:53:14.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:53:14.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:53:14.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:53:14.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:53:14.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:53:14.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:14.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:14.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:14.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:15.365 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:53:15.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:53:15.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:15.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:15.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:15.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:16.321 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:53:16.799 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:53:16.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:16.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:16.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:16.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:17.277 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:53:17.755 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:53:17.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:17.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:17.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:17.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:18.233 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:53:18.709 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:53:18.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:18.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:18.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:18.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:19.186 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:53:19.664 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:53:20.142 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:53:20.619 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:53:21.097 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:53:21.575 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:53:22.053 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:53:22.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:22.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:22.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:22.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:22.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:22.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:22.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:22.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:22.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:22.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:22.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:22.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:22.513 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:53:22.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:22.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:22.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:22.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:22.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:27.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:27.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:27.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:27.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:27.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:27.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:27.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:27.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:27.527 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:27.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:27.527 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:53:27.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:53:27.530 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:53:27.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:27.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:27.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:27.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:53:27.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:27.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:53:27.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:53:27.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:53:27.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:27.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:27.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:27.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:53:27.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:27.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:53:27.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:53:27.539 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:53:27.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:27.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:27.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:27.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:53:27.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:27.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:53:27.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.544 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:53:27.544 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:53:27.544 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:53:27.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:27.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:27.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:53:28.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:53:28.088 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:53:28.090 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:53:28.092 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:53:28.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:53:28.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:28.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:28.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:53:28.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:53:28.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:53:28.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:53:28.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:53:28.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:53:28.511 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:53:28.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:28.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:28.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:28.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:28.988 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:53:29.465 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:53:29.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:29.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:29.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:29.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:29.943 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:53:30.421 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:53:30.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:30.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:30.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:30.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:30.898 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:53:31.376 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:53:31.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:31.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:31.555 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:31.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:31.854 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:53:32.331 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:53:32.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:32.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:32.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:32.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:32.810 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:53:33.287 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:53:33.765 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:53:34.243 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:53:34.721 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:53:35.199 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:53:35.677 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:53:36.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:36.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:36.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:36.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:36.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:36.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:36.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:36.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:36.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:36.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:36.136 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:53:36.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:36.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:36.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:36.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:36.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:36.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:36.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:41.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:41.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:41.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:41.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:41.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:41.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:41.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:41.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:41.154 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:41.154 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:41.154 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:53:41.156 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:53:41.156 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:53:41.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:41.157 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:41.157 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:41.157 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:53:41.157 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:41.157 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:53:41.159 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:53:41.159 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:53:41.159 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:41.159 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:41.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:41.160 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:53:41.160 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:41.160 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:53:41.162 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:53:41.162 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:53:41.162 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:41.162 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:41.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:41.162 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:53:41.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:41.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:53:41.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:53:41.166 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:53:41.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:53:41.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:41.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:41.168 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:41.171 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:53:41.655 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:53:41.698 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:53:41.700 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:53:41.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:53:41.701 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:53:41.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:41.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:41.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:53:41.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:53:41.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:53:41.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:53:41.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:53:41.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:53:42.132 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:53:42.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:42.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:42.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:42.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:42.610 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:53:43.088 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:53:43.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:43.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:43.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:43.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:43.566 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:53:44.044 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:53:44.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:44.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:44.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:44.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:44.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:53:45.000 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:53:45.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:45.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:45.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:45.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:45.478 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:53:45.955 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:53:46.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:46.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:46.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:46.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:46.433 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:53:46.910 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:53:47.387 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:53:47.865 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:53:48.343 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:53:48.820 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:53:49.298 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:53:49.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:49.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:49.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:49.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:49.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:49.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:49.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:49.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:49.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:49.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:49.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:49.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:49.763 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:53:49.764 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:49.764 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:49.764 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:49.764 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:49.764 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:49.764 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:53:54.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:53:54.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:53:54.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:54.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:54.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:54.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:54.792 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:53:54.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:54.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:54.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:53:54.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:53:54.801 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:53:54.801 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:53:54.802 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:54.802 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:54.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:53:54.803 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:53:54.803 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:53:54.804 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:53:54.807 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:53:54.807 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:53:54.808 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:54.808 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:54.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:53:54.808 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:53:54.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:53:54.809 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:53:54.812 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:53:54.812 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:53:54.812 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:54.812 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:53:54.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:53:54.813 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:53:54.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:53:54.813 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:53:54.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:53:54.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:53:54.817 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:53:54.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:53:54.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:53:54.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:53:54.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:53:55.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:53:55.344 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:53:55.345 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:53:55.347 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:53:55.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:53:55.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:53:55.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:53:55.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:53:55.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:53:55.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:53:55.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:53:55.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:53:55.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:53:55.782 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:53:55.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:55.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:55.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:55.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:56.260 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:53:56.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:53:56.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:56.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:56.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:56.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:57.215 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:53:57.693 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:53:57.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:57.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:57.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:57.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:58.170 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:53:58.648 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:53:58.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:58.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:53:58.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:58.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:59.126 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:53:59.603 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:53:59.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:53:59.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:53:59.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:53:59.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:00.081 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:54:00.559 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:54:01.037 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:54:01.515 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:54:01.993 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:54:02.471 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:54:02.949 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:54:03.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:54:03.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:54:03.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:03.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:03.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:03.407 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:03.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:03.407 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:54:03.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:54:03.408 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:54:03.408 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:03.408 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:03.408 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:03.408 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:03.408 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:03.408 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:08.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:54:08.407 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:54:08.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:08.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:08.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:08.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:08.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:08.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:54:08.416 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:08.416 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:54:08.416 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:54:08.417 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:54:08.417 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:54:08.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:54:08.417 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:08.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:08.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:54:08.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:54:08.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:54:08.418 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:54:08.418 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:54:08.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:54:08.418 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:08.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:08.419 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:54:08.419 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:54:08.419 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:54:08.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:54:08.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:54:08.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:54:08.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:08.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:08.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:54:08.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:54:08.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:54:08.421 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:54:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:54:08.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:54:08.422 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:54:08.422 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:54:08.422 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:08.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:08.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:08.427 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:54:08.909 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:54:08.952 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:54:08.954 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:54:08.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:54:08.956 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:54:08.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:54:08.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:54:08.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:54:08.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:54:08.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:54:08.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:54:08.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:54:08.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:54:09.387 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:54:09.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:09.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:09.865 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:54:10.342 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:54:10.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:10.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:10.820 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:54:11.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:54:11.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:11.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:11.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:11.775 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:54:12.253 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:54:12.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:12.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:12.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:12.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:12.731 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:54:13.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:54:13.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:13.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:13.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:13.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:13.687 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:54:14.164 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:54:14.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:54:15.120 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:54:15.598 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:54:16.076 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:54:16.554 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:54:17.031 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:54:17.508 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:54:17.986 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:54:18.464 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:54:18.941 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:54:19.419 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:54:19.897 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:54:20.374 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:54:20.852 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:54:21.330 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:54:21.808 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:54:22.285 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:54:22.763 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:54:23.241 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:54:23.717 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:54:24.195 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:54:24.673 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:54:25.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:54:25.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:54:25.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:25.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:25.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:25.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:25.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:25.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:25.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:54:25.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:54:25.021 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:54:25.021 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3544 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:25.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:25.021 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3544 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:25.022 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:30.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:54:30.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:54:30.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:30.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:30.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:30.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:30.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:30.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:54:30.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:30.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:54:30.035 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:54:30.039 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:54:30.039 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:54:30.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:54:30.040 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:30.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:30.040 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:54:30.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:54:30.041 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:54:30.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:54:30.043 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:54:30.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:54:30.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:30.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:30.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:54:30.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:54:30.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:54:30.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:54:30.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:54:30.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:54:30.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:30.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:30.045 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:54:30.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:54:30.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:54:30.048 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:54:30.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:54:30.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:54:30.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:54:30.048 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:54:30.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:54:30.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:54:30.049 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:54:30.049 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:54:30.049 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:30.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:30.054 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:54:30.536 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:54:30.563 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:54:30.564 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:54:30.564 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:54:30.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:54:30.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:54:30.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:54:30.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:54:30.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:54:30.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:54:30.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:54:30.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:54:30.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:54:31.012 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:54:31.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:31.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:31.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:31.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:31.490 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:54:31.968 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:54:32.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:32.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:32.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:32.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:32.445 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:54:32.923 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:54:33.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:33.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:33.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:33.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:33.400 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:54:33.878 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:54:34.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:34.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:34.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:34.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:34.356 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:54:34.833 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:54:35.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:35.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:35.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:35.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:35.311 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:54:35.789 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:54:36.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:54:36.743 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:54:37.221 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:54:37.698 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:54:38.176 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:54:38.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:54:38.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:54:38.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:38.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:38.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:38.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:38.597 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:38.597 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:54:38.597 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:54:38.597 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1826 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:38.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:38.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1826 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:38.598 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1827 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:54:43.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:54:43.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:54:43.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:43.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:43.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:43.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:43.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:54:43.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:54:43.615 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:43.615 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:54:43.615 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:54:43.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:54:43.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:54:43.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:54:43.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:43.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:54:43.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:54:43.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:54:43.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:54:43.626 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:54:43.626 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:54:43.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:54:43.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:43.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:54:43.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:54:43.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:54:43.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:54:43.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:54:43.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:54:43.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:54:43.629 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:54:43.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:54:43.629 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:54:43.629 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:54:43.629 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:54:43.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:54:43.633 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:54:43.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:54:43.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:54:43.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:54:44.123 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:54:44.162 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:54:44.163 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:54:44.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:54:44.165 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:54:44.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:54:44.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:54:44.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:54:44.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:54:44.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:54:44.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:54:44.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:54:44.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:54:44.600 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:54:44.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:44.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:44.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:44.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:45.078 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:54:45.556 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:54:45.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:45.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:45.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:45.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:46.034 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:54:46.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:54:46.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:46.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:46.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:46.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:46.990 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:54:47.467 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:54:47.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:47.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:47.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:47.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:47.945 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:54:48.422 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:54:48.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:54:48.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:54:48.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:54:48.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:54:48.900 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:54:49.378 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:54:49.856 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:54:50.333 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:54:50.811 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:54:51.289 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:54:51.766 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:54:52.244 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:54:52.721 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:54:53.198 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:54:53.675 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:54:54.153 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:54:54.631 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:54:55.108 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:54:55.586 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:54:56.063 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:54:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:54:57.019 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:54:57.497 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:54:57.974 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:54:58.452 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:54:58.930 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:54:59.407 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:54:59.884 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:55:00.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:00.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:00.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:00.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:00.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:00.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:00.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:00.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:00.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:00.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:00.249 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:00.249 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:00.249 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3548 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3548 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3548 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3548 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3548 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:00.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3549 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:05.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:05.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:05.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:05.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:05.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:05.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:05.263 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:05.263 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:05.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:05.264 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:55:05.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:55:05.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:55:05.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:05.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:05.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:05.266 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:55:05.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:05.266 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:55:05.268 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:55:05.268 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:55:05.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:05.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:05.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:05.268 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:55:05.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:05.268 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:55:05.269 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:55:05.269 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:55:05.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:05.270 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:05.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:05.270 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:55:05.270 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:05.270 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:55:05.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:55:05.272 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:55:05.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:05.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:05.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:55:05.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:55:05.796 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:55:05.797 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:55:05.799 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:55:05.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:55:05.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:05.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:05.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:05.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:05.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:05.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:05.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:05.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:05.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:05.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:05.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:05.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:05.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:05.836 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:05.836 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:10.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:10.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:10.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:10.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:10.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:10.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:10.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:10.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:10.848 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:10.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:10.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:55:10.850 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:55:10.850 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:55:10.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:10.851 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:10.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:10.851 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:55:10.851 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:10.851 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:55:10.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:55:10.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:55:10.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:10.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:10.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:10.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:55:10.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:10.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:55:10.856 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:55:10.856 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:55:10.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:10.856 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:10.856 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:10.856 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:55:10.856 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:10.856 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:55:10.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:55:10.859 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:55:10.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:10.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:10.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:55:11.347 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:55:11.387 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:55:11.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:55:11.391 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:55:11.393 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:55:11.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:11.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:11.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:11.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:11.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:11.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:11.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:11.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:11.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:11.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:11.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:11.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:11.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:11.449 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:11.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:16.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:16.448 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:16.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:16.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:16.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:16.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:16.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:16.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:16.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:16.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:16.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:55:16.461 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:55:16.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:55:16.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:16.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:16.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:16.463 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:55:16.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:16.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:55:16.465 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:55:16.465 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:55:16.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:16.465 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:16.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:16.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:55:16.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:16.466 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:55:16.468 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:55:16.468 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:55:16.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:16.468 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:16.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:16.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:55:16.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:16.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.471 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:55:16.471 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:55:16.471 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:55:16.472 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:16.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:16.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:16.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:16.476 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:55:16.959 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:55:17.002 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:55:17.004 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:55:17.006 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:55:17.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:55:17.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:17.023 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:17.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:17.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:17.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:17.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:17.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:17.037 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:17.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:17.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:17.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:17.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:17.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:17.037 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.038 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:17.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:22.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:22.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:22.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:22.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:22.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:22.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:22.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:22.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:22.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:22.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:22.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:55:22.057 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:55:22.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:55:22.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:22.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:22.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:22.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:55:22.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:22.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:55:22.061 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:55:22.061 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:55:22.061 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:22.061 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:22.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:22.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:55:22.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:22.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:55:22.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:55:22.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:55:22.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:22.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:22.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:22.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:55:22.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:22.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:55:22.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:55:22.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:55:22.068 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:55:22.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:22.073 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:55:22.556 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:55:22.603 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:55:22.606 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:55:22.608 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:55:22.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:55:22.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:22.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:22.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:22.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:22.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:22.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:22.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:22.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:22.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:22.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:22.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:22.652 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:22.652 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:22.652 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:55:22.653 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:22.653 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:22.653 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:22.653 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:22.653 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:27.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:27.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:27.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:27.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:27.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:27.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:27.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:27.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:27.663 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:27.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:27.663 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:55:27.665 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:55:27.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:55:27.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:27.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:27.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:27.667 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:55:27.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:27.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:55:27.669 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:55:27.669 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:55:27.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:27.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:27.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:27.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:55:27.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:27.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:55:27.674 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:55:27.674 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:55:27.674 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:27.674 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:27.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:27.675 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:55:27.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:27.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:55:27.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:55:27.682 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:55:27.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:27.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:27.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:55:28.170 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:55:28.214 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:55:28.216 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:55:28.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:55:28.217 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:55:28.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:28.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:28.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:28.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:28.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:28.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:28.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:28.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:28.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:28.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:28.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:28.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:28.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:28.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:28.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:28.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:28.250 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:55:28.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:28.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:28.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:28.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:28.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:28.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:28.250 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:33.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:33.253 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:33.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:33.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:33.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:33.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:33.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:33.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:33.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:33.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:33.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:55:33.281 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:55:33.281 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:55:33.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:33.282 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:33.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:33.283 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:55:33.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:33.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:55:33.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:55:33.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:55:33.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:33.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:33.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:33.289 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:55:33.289 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:33.289 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:55:33.292 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:55:33.292 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:55:33.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:33.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:33.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:33.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:55:33.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:33.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:55:33.299 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:55:33.299 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:55:33.299 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:55:33.299 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.301 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:55:33.301 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:55:33.301 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:55:33.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:55:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:33.306 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:55:33.790 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:55:33.834 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:55:33.836 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:55:33.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:55:33.838 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:55:33.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:33.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:33.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:33.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:33.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:33.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:33.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:33.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:33.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:33.887 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:33.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:33.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:33.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:33.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:33.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:33.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:33.888 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:55:33.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:33.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:33.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:33.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:33.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:33.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:55:38.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:55:38.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:55:38.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:38.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:38.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:38.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:38.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:55:38.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:38.906 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:38.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:55:38.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:55:38.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:55:38.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:55:38.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:38.909 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:38.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:55:38.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:55:38.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:55:38.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:55:38.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:55:38.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:55:38.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:38.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:38.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:55:38.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:55:38.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:55:38.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:55:38.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:55:38.914 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:55:38.914 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:38.914 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:55:38.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:55:38.915 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:55:38.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:55:38.915 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:55:38.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:55:38.918 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:55:38.918 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:55:38.918 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:55:38.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:55:38.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:55:38.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:55:38.922 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:55:39.407 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:55:39.447 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:55:39.449 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:55:39.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:55:39.451 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:55:39.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:55:39.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:55:39.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:55:39.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:55:39.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:55:39.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:55:39.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:55:39.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:55:39.884 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:55:39.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:39.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:39.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:39.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:55:40.838 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:55:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:40.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:40.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:41.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:55:41.794 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:55:41.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:41.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:41.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:41.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:42.271 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:55:42.749 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:55:42.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:42.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:42.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:42.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:43.226 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:55:43.704 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:55:43.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:55:43.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:55:43.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:55:43.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:55:44.182 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:55:44.660 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:55:45.137 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:55:45.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:55:46.093 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:55:46.570 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:55:47.048 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:55:47.526 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:55:48.004 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:55:48.481 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 03:55:48.959 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 03:55:49.437 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 03:55:49.915 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 03:55:50.392 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 03:55:50.870 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 03:55:51.348 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 03:55:51.825 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 03:55:52.303 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 03:55:52.781 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 03:55:53.258 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 03:55:53.735 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 03:55:54.213 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 03:55:54.691 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 03:55:55.168 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 03:55:55.645 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 03:55:56.123 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 03:55:56.601 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 03:55:57.078 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 03:55:57.555 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 03:55:58.033 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 03:55:58.511 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 03:55:58.989 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 03:55:59.466 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 03:55:59.944 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 03:56:00.422 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 03:56:00.899 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 03:56:01.377 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 03:56:01.855 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 03:56:02.332 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 03:56:02.810 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 03:56:03.288 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 03:56:03.765 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 03:56:04.243 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 03:56:04.721 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 03:56:05.198 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 03:56:05.676 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 03:56:06.154 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 03:56:06.632 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 03:56:07.110 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 03:56:07.587 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 03:56:08.064 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 03:56:08.541 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 03:56:09.019 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 03:56:09.496 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 03:56:09.974 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 03:56:10.451 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 03:56:10.929 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 03:56:11.407 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 03:56:11.885 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 03:56:12.362 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 03:56:12.839 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 03:56:12.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:56:12.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:56:12.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:12.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:12.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:12.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:12.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:12.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:12.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:12.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:12.947 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:56:12.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:12.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:12.947 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:12.947 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:12.947 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:12.947 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:12.948 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:17.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:17.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:17.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:17.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:17.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:17.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:17.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:17.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:17.957 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:17.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:17.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:56:17.957 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:56:17.958 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:56:17.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:17.958 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:17.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:17.958 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:56:17.958 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:17.958 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:56:17.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:56:17.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:56:17.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:17.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:17.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:17.959 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:56:17.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:17.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:56:17.960 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:56:17.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:56:17.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:17.960 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:17.960 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:56:17.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:17.960 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:17.960 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:56:17.961 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:56:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:56:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:56:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:56:17.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:56:17.962 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:56:17.962 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:17.967 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:56:18.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:56:18.491 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:56:18.493 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:56:18.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:56:18.496 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:56:18.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:56:18.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:18.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:18.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:18.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:19.409 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:56:19.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:56:19.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:19.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:19.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:19.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:20.367 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:56:20.845 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:56:20.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:20.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:20.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:20.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:21.323 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:56:21.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:56:21.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:21.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:21.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:21.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:21.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:21.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:21.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:21.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:21.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:21.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:21.513 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=756 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:21.513 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=757 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:26.514 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:26.514 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:26.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:26.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:26.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:26.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:26.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:26.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:26.526 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:26.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:26.527 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:56:26.530 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:56:26.530 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:56:26.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:26.530 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:26.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:26.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:56:26.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:26.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:56:26.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:56:26.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:56:26.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:26.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:26.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:26.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:56:26.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:26.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:56:26.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:56:26.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:56:26.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:26.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:26.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:26.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:56:26.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:26.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.543 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:56:26.543 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:56:26.543 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:56:26.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:26.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:26.548 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:56:27.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:56:27.076 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:56:27.079 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:56:27.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:56:27.081 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:56:27.510 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:56:27.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:27.547 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:27.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:27.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:27.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:56:28.466 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:56:28.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:28.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:28.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:28.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:28.944 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:56:29.422 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:56:29.549 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:29.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:29.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:29.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:29.901 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:56:30.379 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:56:30.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:30.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:30.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:30.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:30.859 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:56:31.338 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:56:31.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:31.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:31.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:31.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:31.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:56:32.296 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:56:32.774 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:56:33.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:33.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:33.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:33.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:33.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:33.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:33.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:33.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:33.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:33.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:33.098 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:56:33.099 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:33.099 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:33.099 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:33.099 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:33.099 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:33.099 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:33.099 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:38.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:38.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:38.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:38.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:38.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:38.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:38.109 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:38.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:38.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:38.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:38.110 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:56:38.112 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:56:38.112 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:56:38.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:38.112 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:38.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:38.113 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:56:38.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:38.113 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:56:38.115 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:56:38.115 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:56:38.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:38.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:38.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:38.116 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:56:38.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:38.116 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:56:38.118 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:56:38.118 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:56:38.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:38.118 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:38.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:38.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:56:38.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:38.119 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:56:38.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:56:38.122 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:56:38.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:38.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:38.127 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:56:38.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:56:38.654 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:56:38.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:56:38.658 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:56:38.660 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:56:39.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:56:39.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:39.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:39.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:39.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:39.564 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:56:40.042 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:56:40.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:40.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:40.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:40.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:40.520 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:56:40.998 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:56:41.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:41.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:41.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:41.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:41.476 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:56:41.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:56:42.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:42.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:42.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:42.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:42.433 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:56:42.910 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:56:43.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:43.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:43.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:43.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:43.388 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:56:43.869 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:56:44.349 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:44.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:44.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:44.674 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:56:44.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:44.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:44.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:44.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:49.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:49.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:49.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:49.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:49.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:49.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:49.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:49.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:49.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:49.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:56:49.690 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:56:49.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:56:49.695 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:56:49.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:49.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:49.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:49.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:56:49.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:56:49.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:56:49.698 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:56:49.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:56:49.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:49.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:49.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:49.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:56:49.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:56:49.699 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:56:49.701 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:56:49.701 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:56:49.701 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:49.701 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:56:49.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:49.701 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:56:49.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:56:49.702 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:56:49.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:56:49.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:56:49.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:56:49.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:56:49.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:56:49.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:56:49.706 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:56:49.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:56:49.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:56:49.711 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:56:50.195 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:56:50.246 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:56:50.248 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:56:50.250 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:56:50.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:56:50.671 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:56:50.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:50.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:50.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:50.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:51.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:56:51.628 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:56:51.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:51.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:51.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:51.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:52.107 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:56:52.585 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:56:52.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:52.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:52.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:52.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:53.065 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:56:53.541 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:56:53.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:53.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:53.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:53.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:54.022 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:56:54.503 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:56:54.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:54.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:54.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:54.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:54.985 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:56:55.463 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:56:55.943 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:56:56.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:56:56.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:56:56.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:56:56.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:56:56.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:56:56.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:56:56.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:56:56.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:56:56.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:56:56.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:56:56.266 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:56:56.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:01.268 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:01.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:01.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:01.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:01.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:01.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:01.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:01.281 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:01.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:01.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:01.283 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:01.284 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:01.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:01.284 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:01.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:01.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:01.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:01.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:01.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:01.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:01.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:01.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:01.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:01.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:01.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:01.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:01.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:01.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:01.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:01.290 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:01.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:01.290 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:01.290 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:01.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.293 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:01.293 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:01.293 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:01.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:01.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:01.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:01.298 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:01.782 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:01.831 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:01.833 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:01.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:01.836 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:02.259 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:57:02.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:02.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:02.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:02.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:02.737 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:57:03.215 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:57:03.298 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:03.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:03.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:03.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:03.694 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:57:04.173 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:57:04.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:04.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:04.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:04.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:04.652 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:57:05.131 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:57:05.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:05.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:05.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:05.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:05.609 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:57:05.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:06.087 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:57:06.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:06.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:06.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:06.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:06.567 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:57:07.045 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:57:07.523 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:57:08.001 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:57:08.479 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:57:08.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:57:09.435 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:57:09.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:09.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:09.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:09.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:09.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:09.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:09.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:09.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:09.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:09.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:09.865 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:57:09.865 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:09.865 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:09.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:09.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:09.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:09.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:09.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:14.866 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:14.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:14.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:14.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:14.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:14.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:14.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:14.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:14.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:14.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:14.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:14.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:14.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:14.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:14.887 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:14.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:14.887 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:14.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:14.888 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:14.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:14.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:14.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:14.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:14.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:14.891 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:14.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:14.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:14.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:14.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:14.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:14.893 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:14.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:14.893 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:14.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:14.893 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:14.896 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:14.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:14.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:14.896 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:14.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:14.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:14.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:14.897 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:14.897 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:14.897 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:14.902 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:15.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:15.427 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:15.428 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:15.430 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:15.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:15.864 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:57:15.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:15.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:15.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:15.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:16.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:57:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:57:16.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:16.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:16.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:16.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:17.315 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:57:17.795 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:57:17.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:17.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:17.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:17.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:18.273 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:57:18.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:57:18.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:18.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:18.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:18.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:19.230 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:57:19.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:19.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:19.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:19.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:19.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:19.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:19.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:19.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:19.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:19.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:19.447 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:57:24.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:24.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:24.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:24.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:24.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:24.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:24.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:24.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:24.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:24.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:24.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:24.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:24.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:24.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:24.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:24.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:24.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:24.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:24.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:24.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:24.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:24.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:24.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:24.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:24.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:24.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:24.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:24.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:24.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:24.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:24.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:24.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:24.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:24.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:24.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:24.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:24.472 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:24.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:24.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:24.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:24.961 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:25.006 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:25.008 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:25.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:25.010 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:25.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:25.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:25.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:25.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:25.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:25.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:25.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:25.024 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:57:25.024 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:25.024 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:25.025 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:30.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:30.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:30.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:30.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:30.028 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:30.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:30.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:30.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:30.036 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:30.036 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:30.036 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:30.040 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:30.041 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:30.041 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:30.041 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:30.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:30.042 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:30.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:30.042 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:30.044 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:30.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:30.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:30.045 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:30.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:30.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:30.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:30.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:30.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:30.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:30.047 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:30.047 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:30.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:30.047 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:30.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:30.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:30.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:30.051 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:30.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:30.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:30.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:30.541 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:30.590 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:30.592 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:30.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:30.594 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:30.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:30.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:30.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:30.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:30.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:30.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:30.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:30.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:30.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:30.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:30.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:30.608 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:57:30.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:30.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:30.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:30.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:30.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:30.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:30.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:35.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:35.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:35.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:35.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:35.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:35.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:35.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:35.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:35.624 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:35.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:35.625 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:35.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:35.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:35.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:35.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:35.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:35.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:35.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:35.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:35.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:35.635 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:35.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:35.635 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:35.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:35.635 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:35.635 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:35.635 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:35.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:35.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:35.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:35.638 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:35.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:35.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:35.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:35.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:35.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:35.642 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:35.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:35.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:35.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:36.130 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:36.176 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:36.180 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:36.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:36.183 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:36.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:36.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:36.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:36.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:36.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:36.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:36.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:36.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:36.203 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:57:36.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:36.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:36.204 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:36.204 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:36.204 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:36.204 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:36.205 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:36.205 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:36.205 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:41.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:41.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:41.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:41.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:41.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:41.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:41.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:41.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:41.217 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:41.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:41.218 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:41.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:41.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:41.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:41.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:41.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:41.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:41.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:41.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:41.225 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:41.225 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:41.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:41.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:41.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:41.226 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:41.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:41.226 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:41.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:41.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:41.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:41.228 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:41.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:41.228 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:41.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:41.228 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:41.232 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:41.232 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:41.232 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:41.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:41.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:41.237 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:41.721 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:41.765 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:41.767 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:41.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:41.769 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:41.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:57:41.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:57:41.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:57:41.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:57:41.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:57:41.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:57:41.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:57:41.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:57:42.199 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:57:42.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:42.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:42.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:42.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:42.676 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:57:43.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:57:43.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:43.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:43.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:43.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:43.632 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:57:44.110 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:57:44.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:44.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:44.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:44.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:44.587 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:57:44.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:57:44.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:57:44.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:57:44.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:57:44.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:57:44.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:57:44.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:44.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:44.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:44.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:44.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:44.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:44.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:44.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:44.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:44.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:44.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:44.887 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:57:44.887 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:44.887 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:44.887 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:44.887 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:44.887 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:44.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:44.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:49.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:49.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:49.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:49.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:49.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:49.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:49.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:49.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:49.901 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:49.902 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:49.902 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:49.906 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:49.906 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:49.907 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:49.907 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:49.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:49.908 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:49.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:49.908 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:49.910 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:49.910 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:49.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:49.911 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:49.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:49.911 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:49.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:49.911 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:49.914 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:49.915 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:49.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:49.915 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:49.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:49.915 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:49.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:49.915 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:49.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:49.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:49.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:49.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:49.918 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:49.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:49.919 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:49.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:49.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:49.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:50.408 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:50.456 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:50.459 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:50.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:50.461 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:50.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:57:50.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:57:50.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:57:50.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:57:50.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:57:50.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:57:50.471 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:57:50.471 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:57:50.885 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:57:50.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:50.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:50.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:50.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:51.363 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:57:51.840 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:57:51.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:51.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:51.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:51.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:52.318 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:57:52.796 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:57:52.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:52.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:52.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:52.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:53.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:57:53.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:57:53.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:57:53.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:57:53.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:57:53.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:57:53.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:53.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:53.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:53.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:54.228 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:57:54.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:57:54.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:57:54.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:54.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:57:54.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:57:54.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:57:54.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:57:54.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:54.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:54.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:54.248 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:57:54.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:54.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:54.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:54.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:54.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:54.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:54.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:54.249 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:57:59.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:57:59.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:57:59.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:59.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:59.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:59.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:59.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:57:59.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:59.265 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:59.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:57:59.266 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:57:59.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:57:59.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:57:59.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:59.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:59.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:57:59.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:57:59.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:57:59.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:57:59.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:57:59.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:57:59.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:59.276 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:59.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:57:59.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:57:59.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:57:59.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:57:59.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:57:59.279 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:57:59.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:59.279 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:57:59.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:57:59.279 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:57:59.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:57:59.279 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:57:59.283 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:57:59.283 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:57:59.283 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:57:59.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:57:59.288 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:57:59.772 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:57:59.818 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:57:59.820 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:57:59.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:57:59.823 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:57:59.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:57:59.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:57:59.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:57:59.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:57:59.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:57:59.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:57:59.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:57:59.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:58:00.249 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:58:00.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:00.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:00.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:00.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:00.727 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:58:01.205 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:58:01.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:01.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:01.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:01.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:01.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:58:02.160 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:58:02.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:02.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:02.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:02.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:02.638 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:58:02.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:02.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:02.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:02.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:03.115 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:58:03.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:03.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:03.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:03.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:03.589 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:58:04.058 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:58:04.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:04.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:04.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:04.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:04.535 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:58:05.008 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:58:05.484 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:58:05.962 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:58:06.439 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:58:06.917 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:58:07.395 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:58:07.873 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:58:07.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:07.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:07.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:07.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:07.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:07.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:07.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:07.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:07.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:07.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:07.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:07.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:07.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:07.903 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:58:07.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:07.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:07.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:12.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:12.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:12.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:12.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:12.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:12.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:12.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:12.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:12.913 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:12.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:12.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:58:12.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:58:12.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:58:12.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:12.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:12.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:12.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:58:12.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:12.917 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:58:12.919 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:58:12.919 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:58:12.919 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:12.919 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:12.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:12.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:58:12.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:12.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:58:12.922 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:58:12.922 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:58:12.922 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:12.922 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:12.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:12.922 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:58:12.923 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:12.923 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.927 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:58:12.927 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:58:12.927 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:58:12.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:12.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:12.932 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:58:13.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:58:13.460 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:58:13.462 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:58:13.464 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:58:13.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:13.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:13.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:13.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:58:13.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:13.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:13.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:13.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:58:13.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:58:13.892 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:58:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:13.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:13.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:14.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:58:14.848 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:58:14.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:14.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:14.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:14.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:15.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:58:15.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:58:15.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:15.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:15.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:15.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:16.282 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:58:16.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:16.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:16.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:16.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:16.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:58:16.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:16.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:16.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:16.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:17.237 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:58:17.715 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:58:17.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:17.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:17.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:17.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:18.193 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:58:18.670 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:58:19.148 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:58:19.626 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:58:20.103 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:58:20.581 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:58:21.059 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:58:21.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:21.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:21.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:21.536 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:58:21.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:21.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:21.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:21.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:21.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:21.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:21.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:21.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:21.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:21.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:21.549 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:58:21.549 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:21.549 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:21.549 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:21.549 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:21.549 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:26.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:26.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:26.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:26.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:26.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:26.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:26.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:26.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:26.561 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:26.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:26.561 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:58:26.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:58:26.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:58:26.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:26.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:26.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:26.565 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:58:26.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:26.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:58:26.568 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:58:26.568 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:58:26.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:26.569 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:26.569 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:26.569 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:58:26.570 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:26.570 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:58:26.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:58:26.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:58:26.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:26.573 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:26.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:26.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:58:26.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:26.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:58:26.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:58:26.579 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:58:26.579 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:58:26.579 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:58:26.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:26.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:26.584 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:58:27.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:58:27.118 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:58:27.120 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:58:27.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:27.122 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:58:27.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:27.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:27.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:58:27.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:27.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:27.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:27.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:58:27.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:58:27.544 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:58:27.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:27.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:27.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:27.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:28.022 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:58:28.500 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:58:28.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:28.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:28.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:28.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:28.978 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:58:29.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:58:29.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:29.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:29.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:29.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:29.933 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:58:30.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:30.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:30.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:30.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:30.410 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:58:30.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:30.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:30.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:30.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:30.888 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:58:31.365 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:58:31.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:31.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:31.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:31.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:31.843 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:58:32.321 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:58:32.799 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:58:33.276 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:58:33.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:58:34.232 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:58:34.710 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:58:35.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:35.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:35.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:35.187 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:58:35.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:35.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:35.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:35.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:35.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:35.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:35.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:35.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:35.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:35.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:35.199 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:58:35.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:35.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:35.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:35.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:35.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:35.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:35.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:40.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:40.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:40.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:40.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:40.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:40.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:40.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:40.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:40.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:40.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:40.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:58:40.213 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:58:40.213 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:58:40.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:40.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:40.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:40.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:58:40.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:40.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:58:40.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:58:40.216 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:58:40.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:40.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:40.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:40.217 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:58:40.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:40.217 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:58:40.219 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:58:40.219 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:58:40.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:40.219 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:40.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:40.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:58:40.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:40.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:58:40.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:58:40.223 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:58:40.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:40.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:40.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:40.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:40.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:58:40.712 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:58:40.752 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:58:40.754 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:58:40.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:40.756 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:58:40.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:40.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:40.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:58:40.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:40.766 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:40.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:40.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:58:40.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:58:40.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:40.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:40.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:40.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:41.189 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:58:41.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:41.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:41.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:41.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:41.667 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:58:42.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:58:42.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:42.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:42.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:42.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:42.622 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:58:43.099 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:58:43.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:43.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:43.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:43.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:43.577 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:58:44.055 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:58:44.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:44.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:44.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:44.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:44.533 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:58:45.011 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:58:45.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:45.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:45.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:45.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:45.488 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:58:45.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:45.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:45.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:45.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:45.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:45.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:45.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:45.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:45.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:45.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:45.817 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:45.817 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:45.817 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:58:45.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1195 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:45.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1195 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:45.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1195 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:45.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1195 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:45.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1195 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:45.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1195 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:45.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1195 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:50.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:50.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:50.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:50.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:50.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:50.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:50.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:50.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:50.830 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:50.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:58:50.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:58:50.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:58:50.834 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:58:50.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:50.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:50.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:50.835 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:58:50.835 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:58:50.835 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:58:50.838 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:58:50.838 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:58:50.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:50.838 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:50.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:50.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:58:50.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:58:50.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:58:50.842 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:58:50.842 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:58:50.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:50.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:58:50.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:50.843 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:58:50.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:58:50.843 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:58:50.847 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.848 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:58:50.848 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:58:50.848 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:58:50.849 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:58:50.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:58:50.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:58:50.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:58:50.854 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:58:51.338 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:58:51.395 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:58:51.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:51.399 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:58:51.400 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:58:51.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:51.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:51.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:58:51.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:51.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:51.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:51.409 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:58:51.409 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:58:51.815 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:58:51.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:51.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:51.856 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:51.857 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:52.293 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:58:52.771 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:58:52.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:52.855 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:52.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:53.249 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:58:53.726 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:58:53.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:53.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:53.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:53.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:54.204 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:58:54.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:58:54.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:58:54.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:54.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:58:54.681 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:58:54.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:54.857 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:54.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:54.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:55.159 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:58:55.637 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:58:55.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:55.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:55.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:55.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:56.115 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:58:56.592 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:58:57.070 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:58:57.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:58:57.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:58:57.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:58:57.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:58:57.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:58:57.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:58:57.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:58:57.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:58:57.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:58:57.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:58:57.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:58:57.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:58:57.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:58:57.129 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:58:57.129 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1340 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:57.129 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1340 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:57.129 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1340 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:57.129 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1340 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:57.129 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1340 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:58:57.129 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1340 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:02.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:02.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:02.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:02.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:02.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:02.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:02.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:02.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:02.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:02.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:02.145 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:59:02.150 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:59:02.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:59:02.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:02.151 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:02.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:02.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:59:02.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:02.152 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:59:02.154 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:59:02.154 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:59:02.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:02.154 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:02.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:02.155 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:59:02.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:02.155 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:59:02.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:59:02.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:59:02.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:02.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:02.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:02.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:59:02.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:02.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:59:02.160 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:59:02.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:59:02.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:59:02.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:59:02.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:59:02.161 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:59:02.161 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:59:02.161 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:59:02.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:59:02.693 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:59:02.696 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:59:02.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:02.698 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:59:02.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:02.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:02.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:59:02.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:59:02.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:59:02.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:59:02.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:59:02.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:59:03.127 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:59:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:03.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:03.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:03.605 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:59:04.083 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:59:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:04.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:04.561 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:59:05.038 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:59:05.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:05.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:05.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:05.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:05.516 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:59:05.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:05.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:05.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:05.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:05.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:05.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:05.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:05.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:05.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:05.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:05.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:05.821 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:05.821 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:05.821 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:59:05.821 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:05.821 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:05.821 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:05.821 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:05.821 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:05.821 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:05.821 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:10.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:10.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:10.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:10.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:10.827 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:10.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:10.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:10.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:10.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:10.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:10.839 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:59:10.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:59:10.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:59:10.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:10.843 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:10.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:10.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:59:10.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:10.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:59:10.846 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:59:10.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:59:10.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:10.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:10.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:10.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:59:10.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:10.846 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:59:10.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:59:10.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:59:10.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:10.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:10.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:10.848 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:59:10.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:10.849 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.851 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:59:10.851 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:59:10.851 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:59:10.852 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:10.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:10.856 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:59:11.340 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:59:11.380 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:59:11.383 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:59:11.385 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:59:11.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:11.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:11.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:11.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:59:11.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:59:11.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:59:11.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:59:11.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:59:11.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:59:11.817 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:59:11.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:11.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:11.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:11.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:12.295 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:59:12.772 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:59:12.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:12.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:12.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:12.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:13.250 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:59:13.728 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:59:13.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:13.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:13.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:13.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:14.205 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:59:14.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:14.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:14.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:14.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:14.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:14.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:14.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:14.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:14.528 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:59:14.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:14.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:14.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:14.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:19.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:19.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:19.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:19.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:19.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:19.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:19.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:19.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:19.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:19.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:19.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:59:19.551 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:59:19.551 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:59:19.551 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:19.551 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:19.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:19.552 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:59:19.552 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:19.552 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:59:19.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:59:19.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:59:19.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:19.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:19.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:19.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:59:19.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:19.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:59:19.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:59:19.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:59:19.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:19.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:19.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:19.563 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:59:19.563 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:19.563 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:59:19.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:59:19.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:59:19.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:59:19.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:59:19.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:59:19.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:59:19.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:59:19.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:59:19.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:59:19.570 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:59:19.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:59:19.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:59:19.570 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:59:19.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:19.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:19.575 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:59:20.058 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:59:20.103 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:59:20.105 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:59:20.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:20.107 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:59:20.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:20.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:20.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:59:20.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:59:20.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:59:20.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:59:20.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:59:20.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:59:20.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:20.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:20.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:20.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:20.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:20.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:20.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:20.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:20.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:20.379 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:20.379 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:20.379 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:59:20.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:20.380 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:20.380 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:20.380 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:20.380 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:25.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:25.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:25.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:25.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:25.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:25.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:25.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:25.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:25.394 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:25.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:25.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:59:25.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:59:25.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:59:25.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:25.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:25.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:25.397 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:59:25.398 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:25.398 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:59:25.399 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:59:25.399 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:59:25.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:25.400 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:25.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:25.400 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:59:25.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:25.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:59:25.401 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:59:25.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:59:25.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:25.402 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:25.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:25.402 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:59:25.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:25.402 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:59:25.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:59:25.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:59:25.405 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:59:25.405 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:25.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:25.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:59:25.893 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:59:25.927 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:59:25.928 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:59:25.930 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:59:25.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:25.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:25.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:25.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:59:25.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:59:25.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:59:25.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:59:25.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:59:25.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:59:26.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:26.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:26.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:26.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:26.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:26.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:26.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:26.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:26.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:26.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:26.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:26.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:26.171 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=163 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=163 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=163 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=163 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:26.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:31.172 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:31.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:31.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:31.175 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:31.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:31.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:31.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:31.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:31.184 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:31.184 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:31.184 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:59:31.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:59:31.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:59:31.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:31.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:31.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:31.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:59:31.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:31.190 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:59:31.192 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:59:31.193 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:59:31.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:31.193 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:31.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:31.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:59:31.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:31.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:59:31.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:59:31.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:59:31.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:31.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:31.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:31.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:59:31.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:31.197 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:59:31.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:59:31.201 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:59:31.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:31.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:31.206 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:59:31.689 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:59:31.731 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:59:31.732 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:59:31.734 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:59:31.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:31.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:31.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:31.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:59:31.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:59:31.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:59:31.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:59:31.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:59:31.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:59:32.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:59:32.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:32.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:32.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:32.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:32.644 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:59:33.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:59:33.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:33.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:33.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:33.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:33.600 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:59:34.078 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:59:34.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:34.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:34.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:34.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:34.556 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:59:35.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:59:35.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:35.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:35.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:35.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:35.512 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:59:35.989 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:59:36.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:36.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:36.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:36.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:36.467 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:59:36.944 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:59:37.422 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:59:37.899 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:59:38.377 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:59:38.854 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:59:39.331 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:59:39.809 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:59:40.287 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:59:40.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:40.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:40.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:40.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:40.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:40.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:40.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:40.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:40.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:40.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:40.734 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:59:40.734 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2036 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:40.734 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2036 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:40.734 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2036 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:40.734 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2036 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:40.734 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2036 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:40.734 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2036 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:45.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:45.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:45.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:45.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:45.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:45.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:45.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:45.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:45.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:45.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 03:59:45.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 03:59:45.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 03:59:45.749 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 03:59:45.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:45.749 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:45.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:45.750 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 03:59:45.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 03:59:45.750 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 03:59:45.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 03:59:45.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 03:59:45.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:45.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:45.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:45.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 03:59:45.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 03:59:45.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 03:59:45.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 03:59:45.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 03:59:45.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:45.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 03:59:45.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:45.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 03:59:45.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 03:59:45.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 03:59:45.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 03:59:45.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 03:59:45.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 03:59:45.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 03:59:45.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 03:59:45.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 03:59:45.763 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 03:59:45.763 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 03:59:45.763 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 03:59:45.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 03:59:45.768 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 03:59:46.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 03:59:46.295 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 03:59:46.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 03:59:46.298 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 03:59:46.302 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 03:59:46.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:46.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:46.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 03:59:46.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 03:59:46.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 03:59:46.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 03:59:46.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 03:59:46.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 03:59:46.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 03:59:46.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:46.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:46.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:46.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:47.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 03:59:47.684 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 03:59:47.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:47.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:47.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:47.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:48.162 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 03:59:48.640 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 03:59:48.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:48.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:48.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:48.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:49.118 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 03:59:49.596 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 03:59:49.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:49.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:49.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:49.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:50.075 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 03:59:50.553 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 03:59:50.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:50.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:50.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:50.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:51.030 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 03:59:51.508 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 03:59:51.986 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 03:59:52.464 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 03:59:52.942 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 03:59:53.419 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 03:59:53.897 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 03:59:54.375 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 03:59:54.852 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 03:59:55.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 03:59:55.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 03:59:55.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 03:59:55.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 03:59:55.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 03:59:55.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 03:59:55.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 03:59:55.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 03:59:55.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 03:59:55.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 03:59:55.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 03:59:55.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 03:59:55.248 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 03:59:55.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2025 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:55.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2025 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:55.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2025 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:55.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2025 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:55.248 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2025 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 03:59:55.249 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2025 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:00.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:00.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:00.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:00.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:00.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:00.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:00.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:00.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:00.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:00.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:00.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:00:00.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:00:00.266 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:00:00.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:00.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:00.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:00.267 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:00:00.267 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:00.267 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:00:00.269 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:00:00.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:00:00.270 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:00.270 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:00.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:00.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:00:00.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:00.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:00:00.273 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:00:00.273 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:00:00.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:00.274 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:00.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:00.274 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:00:00.274 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:00.274 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:00:00.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:00:00.279 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:00:00.279 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:00:00.279 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:00:00.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:00.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:00.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:00.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:00.284 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:00:00.769 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:00:00.813 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:00:00.815 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:00:00.817 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:00.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:00.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:00:00.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:00:00.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:00:00.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:00:00.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:00:00.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:00:00.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:00:00.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:00:01.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:00:01.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:01.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:01.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:01.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:00:02.202 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:00:02.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:02.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:02.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:02.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:02.679 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:00:03.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:00:03.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:03.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:03.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:03.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:03.635 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:00:03.877 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:00:03.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:00:03.878 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:03.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:00:03.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:00:03.925 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:03.966 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.008 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.045 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.086 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.112 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:00:04.134 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.171 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.213 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.254 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:04.287 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:04.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:04.287 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:04.291 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.333 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.374 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:04.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:00:04.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:00:04.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:04.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:04.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:04.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:04.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:04.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:04.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:04.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:04.419 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:00:04.419 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=884 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:04.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:04.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:04.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:04.419 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=884 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:04.419 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=884 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:04.419 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=884 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:04.419 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=884 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:09.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:09.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:09.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:09.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:09.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:09.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:09.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:09.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:09.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:09.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:09.435 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:00:09.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:00:09.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:00:09.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:09.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:09.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:09.438 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:00:09.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:09.438 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:00:09.439 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:00:09.440 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:00:09.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:09.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:09.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:09.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:00:09.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:09.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:00:09.441 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:00:09.441 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:00:09.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:09.441 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:09.441 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:00:09.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:09.441 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:09.441 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:00:09.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:00:09.443 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:00:09.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:09.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:00:09.932 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:00:09.970 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:00:09.972 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:00:09.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:09.974 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:10.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:10.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:10.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:10.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:10.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:10.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:10.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:10.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:10.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:10.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:10.039 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:00:10.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:10.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:10.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:10.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:10.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:10.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:15.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:15.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:15.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:15.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:15.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:15.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:15.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:15.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:15.054 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:15.054 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:15.054 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:00:15.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:00:15.057 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:00:15.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:15.057 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:15.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:15.058 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:00:15.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:15.058 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:00:15.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:00:15.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:00:15.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:15.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:15.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:15.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:00:15.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:15.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:00:15.062 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:00:15.062 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:00:15.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:15.062 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:15.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:15.062 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:00:15.062 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:15.062 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.065 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:00:15.065 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:00:15.065 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:00:15.065 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:15.070 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:00:15.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:00:15.596 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:00:15.598 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:00:15.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:15.600 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:16.034 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:00:16.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:16.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:16.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:16.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:16.516 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:00:16.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:00:17.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:17.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:17.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:17.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:17.478 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:00:17.955 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:00:18.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:18.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:18.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:18.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:18.435 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:00:18.912 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:00:19.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:19.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:19.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:19.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:19.390 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:00:19.870 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:00:20.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:20.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:20.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:20.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:00:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:00:21.304 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:00:21.781 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:00:22.259 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:00:22.738 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:00:23.215 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:00:23.692 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:00:24.170 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:00:24.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:24.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:24.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:24.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:24.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:24.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:24.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:24.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:24.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:24.626 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:00:24.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2038 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:24.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:24.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:24.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2038 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:24.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2038 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:24.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2038 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:24.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2038 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:24.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2038 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:29.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:29.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:29.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:29.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:29.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:29.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:29.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:29.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:29.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:29.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:29.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:00:29.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:00:29.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:00:29.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:29.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:29.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:29.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:00:29.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:29.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:00:29.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:00:29.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:00:29.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:29.647 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:29.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:29.647 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:00:29.647 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:29.647 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:00:29.649 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:00:29.649 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:00:29.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:29.649 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:29.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:29.649 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:00:29.649 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:29.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:00:29.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:00:29.651 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:00:29.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:29.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:29.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:00:30.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:00:30.178 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:00:30.181 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:00:30.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:30.185 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:30.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:00:30.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:30.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:30.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:30.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:31.097 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:00:31.575 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:00:31.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:31.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:31.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:31.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:32.056 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:00:32.536 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:00:32.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:32.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:32.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:32.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:33.016 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:00:33.494 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:00:33.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:33.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:33.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:33.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:33.973 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:00:34.450 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:00:34.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:34.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:34.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:34.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:34.928 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:00:35.406 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:00:35.885 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:00:36.363 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:00:36.841 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:00:37.317 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:00:37.796 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:00:38.274 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:00:38.749 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:00:39.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:39.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:39.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:39.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:39.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:39.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:39.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:39.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:39.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:39.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:39.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:39.207 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:00:39.207 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2040 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:39.207 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2040 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:39.207 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2040 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:39.207 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2040 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:39.207 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2040 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:39.207 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2040 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:44.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:44.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:44.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:44.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:44.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:44.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:44.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:44.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:44.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:44.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:44.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:00:44.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:00:44.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:00:44.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:44.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:44.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:44.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:00:44.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:44.225 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:00:44.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:00:44.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:00:44.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:44.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:44.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:44.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:00:44.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:44.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:00:44.231 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:00:44.231 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:00:44.231 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:44.231 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:44.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:44.231 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:00:44.231 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:44.231 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:00:44.234 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:00:44.235 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:00:44.235 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:00:44.235 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:44.240 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:00:44.724 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:00:44.759 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:00:44.760 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:00:44.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:44.763 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:45.205 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:00:45.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:45.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:45.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:45.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:45.687 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:00:46.168 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:00:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:46.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:46.240 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:46.647 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:00:47.124 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:00:47.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:47.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:47.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:47.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:47.603 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:00:47.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:47.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:47.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:47.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:47.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:47.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:47.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:47.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:47.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:47.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:47.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:47.797 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:00:47.797 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:47.797 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:47.797 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:47.797 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:47.797 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:47.797 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:52.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:52.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:52.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:52.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:52.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:52.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:52.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:52.812 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:52.812 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:52.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:52.813 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:00:52.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:00:52.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:00:52.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:52.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:52.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:52.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:00:52.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:52.818 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:00:52.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:00:52.821 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:00:52.821 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:52.821 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:52.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:52.822 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:00:52.822 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:52.822 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:00:52.824 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:00:52.824 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:00:52.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:52.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:52.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:52.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:00:52.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:52.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:00:52.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:00:52.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:00:52.830 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:00:52.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:52.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:52.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:52.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:00:53.318 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:00:53.362 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:00:53.364 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:00:53.366 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:53.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:53.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:00:53.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:00:53.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:00:53.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:00:53.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:00:53.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:00:53.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:00:53.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:00:53.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:53.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:00:53.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:00:53.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:00:53.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:00:53.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:00:53.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:53.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:00:53.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:00:53.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:00:53.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:53.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:53.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:53.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:53.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:53.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:53.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:53.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:53.811 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:00:58.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:58.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:58.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:58.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:58.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:58.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:58.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:58.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:58.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:58.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:00:58.827 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:00:58.831 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:00:58.831 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:00:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:58.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:58.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:58.832 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:00:58.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:00:58.832 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:00:58.835 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:00:58.835 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:00:58.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:58.835 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:58.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:58.836 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:00:58.836 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:00:58.836 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:00:58.838 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:00:58.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:00:58.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:58.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:00:58.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:58.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:00:58.839 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:00:58.839 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:00:58.842 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:00:58.842 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:00:58.842 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:00:58.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:00:58.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:00:58.847 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:00:59.329 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:00:59.369 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:00:59.371 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:00:59.373 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:00:59.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:00:59.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:00:59.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:00:59.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:00:59.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:00:59.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:00:59.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:00:59.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:00:59.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:00:59.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:00:59.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:00:59.392 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:00:59.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:59.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:59.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:59.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:59.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:00:59.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:04.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:04.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:04.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:04.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:04.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:04.395 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:04.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:04.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:04.403 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:04.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:04.403 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:01:04.406 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:01:04.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:01:04.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:04.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:04.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:04.407 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:01:04.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:04.407 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:01:04.409 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:01:04.409 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:01:04.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:04.410 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:04.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:04.410 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:01:04.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:04.410 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:01:04.412 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:01:04.412 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:01:04.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:04.412 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:04.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:04.412 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:01:04.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:04.412 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:01:04.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:01:04.415 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:01:04.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:01:04.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:04.416 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:04.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:01:04.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:01:04.942 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:01:04.943 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:01:04.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:01:04.946 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:01:05.381 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:01:05.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:05.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:05.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:05.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:05.859 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:01:06.339 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:01:06.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:06.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:06.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:06.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:06.817 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:01:06.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:06.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:06.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:06.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:06.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:06.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:06.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:06.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:06.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:06.964 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:01:06.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:06.964 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:06.964 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:06.964 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:06.964 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:06.964 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:06.964 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:11.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:11.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:11.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:11.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:11.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:11.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:11.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:11.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:11.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:11.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:11.977 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:01:11.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:01:11.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:01:11.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:11.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:11.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:11.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:01:11.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:11.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:01:11.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:01:11.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:01:11.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:11.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:11.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:11.983 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:01:11.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:11.983 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:01:11.985 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:01:11.985 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:01:11.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:11.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:11.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:11.986 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:01:11.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:11.986 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:01:11.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:01:11.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:01:11.989 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:01:11.989 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:11.994 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:01:12.478 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:01:12.516 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:01:12.518 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:01:12.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:01:12.520 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:01:12.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:12.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:12.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:01:12.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:01:12.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:01:12.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:01:12.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:01:12.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:01:12.955 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:01:12.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:12.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:12.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:12.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:13.433 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:01:13.910 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:01:13.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:13.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:13.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:13.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:14.388 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:01:14.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:01:14.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:14.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:14.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:14.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:15.343 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:01:15.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:15.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:15.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:15.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:15.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:15.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:15.370 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:15.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:15.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:15.370 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:15.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:15.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:15.371 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:20.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:20.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:20.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:20.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:20.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:20.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:20.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:20.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:20.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:20.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:20.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:01:20.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:01:20.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:01:20.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:20.394 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:20.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:20.395 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:01:20.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:20.395 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:01:20.398 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:01:20.399 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:01:20.399 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:20.399 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:20.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:20.399 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:01:20.400 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:20.400 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:01:20.403 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:01:20.403 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:01:20.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:20.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:20.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:20.403 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:01:20.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:20.403 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:01:20.408 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:01:20.408 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:01:20.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:01:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:20.413 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:01:20.896 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:01:20.938 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:01:20.940 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:01:20.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:01:20.943 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:01:20.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:20.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:20.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:01:20.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:01:20.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:01:20.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:01:20.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:01:20.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:01:21.374 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:01:21.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:21.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:21.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:21.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:21.852 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:01:22.330 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:01:22.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:22.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:22.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:22.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:22.807 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:01:23.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:23.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:23.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:23.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:23.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:23.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:23.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:23.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:23.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:23.069 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:01:23.069 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:23.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:23.069 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:23.069 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:23.069 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:23.069 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:23.069 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:23.069 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:23.069 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:28.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:28.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:28.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:28.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:28.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:28.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:28.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:28.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:28.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:28.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:01:28.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:01:28.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:01:28.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:28.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:28.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:28.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:01:28.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:28.101 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:01:28.103 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:01:28.103 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:01:28.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:28.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:28.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:28.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:01:28.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:28.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:01:28.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:01:28.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:01:28.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:28.107 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:28.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:28.107 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:01:28.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:28.107 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:01:28.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:01:28.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:01:28.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:01:28.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:01:28.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:01:28.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:01:28.110 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:01:28.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:28.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:28.115 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:01:28.598 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:01:28.638 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:01:28.640 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:01:28.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:01:28.642 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:01:28.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:28.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:28.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:01:28.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:01:28.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:01:28.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:01:28.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:01:28.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:01:29.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:01:29.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:29.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:29.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:29.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:29.553 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:01:30.030 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:01:30.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:30.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:30.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:30.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:30.508 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:01:30.986 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:01:31.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:31.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:31.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:31.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:31.464 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:01:31.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:31.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:31.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:31.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:31.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:31.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:31.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:31.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:31.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:31.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:31.493 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:01:31.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:31.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:31.493 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:31.493 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:31.493 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:31.493 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:31.493 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:31.493 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:31.493 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:36.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:36.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:36.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:36.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:36.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:36.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:36.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:36.504 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:36.504 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:36.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:36.505 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:01:36.507 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:01:36.508 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:01:36.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:36.508 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:36.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:36.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:01:36.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:36.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:01:36.511 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:01:36.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:01:36.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:36.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:36.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:36.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:01:36.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:36.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:01:36.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:01:36.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:01:36.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:36.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:36.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:36.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:01:36.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:36.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:01:36.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:01:36.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:01:36.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:01:36.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:01:36.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:01:36.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:01:36.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:01:36.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:01:36.518 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:01:36.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:36.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:01:37.003 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:01:37.046 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:01:37.049 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:01:37.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:01:37.051 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:01:37.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:37.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:37.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:01:37.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:01:37.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:01:37.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:01:37.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:01:37.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:01:37.481 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:01:37.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:37.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:37.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:37.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:37.958 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:01:38.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:01:38.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:38.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:38.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:38.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:38.914 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:01:39.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:39.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:39.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:39.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:39.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:39.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:39.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:39.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:39.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:39.177 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:01:39.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:39.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:39.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:39.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:39.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:39.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:39.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:39.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:39.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:39.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:44.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:44.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:44.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:44.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:44.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:44.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:44.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:44.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:44.189 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:44.189 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:44.189 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:01:44.193 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:01:44.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:01:44.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:44.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:44.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:44.194 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:01:44.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:44.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:01:44.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:01:44.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:01:44.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:44.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:44.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:44.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:01:44.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:44.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:01:44.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:01:44.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:01:44.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:44.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:44.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:44.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:01:44.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:44.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:01:44.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:01:44.207 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:01:44.208 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:44.213 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:01:44.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:01:44.742 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:01:44.744 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:01:44.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:01:44.747 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:01:44.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:44.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:44.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:01:44.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:01:44.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:01:44.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:01:44.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:01:44.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:01:45.174 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:01:45.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:45.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:45.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:45.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:45.652 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:01:46.129 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:01:46.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:46.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:46.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:46.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:46.607 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:01:47.085 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:01:47.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:47.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:47.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:47.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:47.563 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:01:48.040 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:01:48.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:48.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:48.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:48.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:48.518 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:01:48.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:48.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:48.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:48.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:48.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:48.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:48.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:48.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:48.546 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:48.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:48.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:48.546 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:01:48.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:53.547 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:53.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:53.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:53.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:53.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:53.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:53.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:53.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:53.560 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:53.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:01:53.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:01:53.562 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:01:53.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:01:53.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:53.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:53.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:53.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:01:53.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:01:53.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:01:53.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:01:53.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:01:53.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:53.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:53.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:53.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:01:53.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:01:53.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:01:53.571 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:01:53.571 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:01:53.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:53.571 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:01:53.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:53.572 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:01:53.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:01:53.572 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:01:53.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.577 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:01:53.577 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:01:53.577 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:01:53.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:01:53.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:01:53.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:01:53.583 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:01:54.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:01:54.107 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:01:54.110 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:01:54.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:01:54.113 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:01:54.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:54.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:54.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:01:54.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:01:54.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:01:54.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:01:54.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:01:54.124 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:01:54.545 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:01:54.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:54.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:54.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:54.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:55.022 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:01:55.500 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:01:55.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:55.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:55.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:55.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:55.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:01:56.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:01:56.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:56.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:56.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:56.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:56.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:01:57.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:01:57.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:01:57.191 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:01:57.191 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:01:57.191 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:01:57.191 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=772 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:57.192 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=772 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:57.192 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=772 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:57.192 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=772 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:57.192 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=772 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:01:57.192 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=772 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:02.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:02.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:02.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:02.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:02.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:02.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:02.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:02.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:02.211 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:02.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:02.211 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:02.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:02.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:02.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:02.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:02.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:02.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:02.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:02.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:02.219 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:02.219 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:02.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:02.220 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:02.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:02.220 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:02.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:02.220 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:02.223 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:02.223 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:02.223 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:02.223 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:02.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:02.224 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:02.224 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:02.224 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:02.228 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:02.229 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:02.229 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:02.229 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:02.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:02.234 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:02.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:02.758 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:02.761 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:02.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:02.764 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:03.195 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:02:03.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:03.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:03.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:03.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:03.673 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:02:04.150 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:02:04.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:04.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:04.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:04.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:04.628 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:02:04.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:04.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:04.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:04.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:04.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:04.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:04.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:04.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:04.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:04.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:04.784 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:09.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:09.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:09.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:09.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:09.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:09.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:09.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:09.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:09.803 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:09.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:09.803 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:09.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:09.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:09.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:09.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:09.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:09.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:09.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:09.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:09.811 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:09.811 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:09.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:09.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:09.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:09.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:09.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:09.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:09.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:09.814 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:09.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:09.814 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:09.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:09.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:09.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:09.815 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:09.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:09.817 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:09.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:09.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:09.822 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:10.306 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:10.343 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:10.346 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:10.347 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:10.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:10.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:02:10.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:02:10.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:02:10.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:10.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:10.783 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:02:10.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:10.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:10.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:10.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:11.262 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:02:11.740 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:02:11.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:11.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:11.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:11.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:12.218 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:02:12.696 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:02:12.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:12.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:12.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:12.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:13.175 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:02:13.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:13.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:13.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:13.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:13.406 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:13.406 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=766 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:13.406 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=766 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:13.406 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=766 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:13.407 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=766 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:13.407 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=766 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:13.407 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=766 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:18.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:18.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:18.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:18.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:18.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:18.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:18.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:18.425 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:18.425 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:18.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:18.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:18.430 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:18.430 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:18.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:18.431 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:18.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:18.431 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:18.431 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:18.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:18.435 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:18.435 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:18.435 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:18.435 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:18.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:18.435 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:18.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:18.436 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:18.439 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:18.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:18.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:18.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:18.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:18.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:18.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:18.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:18.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:18.445 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:18.445 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:18.445 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:18.445 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:18.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:18.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:18.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:18.450 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:18.932 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:18.972 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:18.974 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:18.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:18.976 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:19.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:02:19.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:02:19.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:02:19.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:19.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:19.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:19.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:19.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:19.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:19.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:19.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:19.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:19.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:19.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:19.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:19.019 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:19.019 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:24.019 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:24.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:24.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:24.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:24.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:24.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:24.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:24.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:24.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:24.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:24.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:24.035 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:24.035 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:24.035 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:24.035 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:24.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:24.036 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:24.036 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:24.036 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:24.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:24.038 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:24.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:24.038 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:24.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:24.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:24.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:24.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:24.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:24.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:24.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:24.040 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:24.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:24.041 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:24.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:24.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:24.043 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:24.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:24.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:24.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:24.043 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:24.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:24.044 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:24.044 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:24.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:24.533 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:24.568 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:24.569 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:24.569 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:24.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:24.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:02:24.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:02:24.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:02:24.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:24.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:25.010 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:02:25.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:25.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:25.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:25.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:25.489 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:02:25.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:02:26.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:26.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:26.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:26.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:26.445 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:02:26.925 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:02:27.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:27.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:27.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:27.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:27.405 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:02:27.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:27.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:27.622 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:27.622 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:27.622 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:27.622 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:27.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:27.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:27.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:27.623 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:27.623 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=763 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:27.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:27.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:27.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:27.623 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=763 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:27.623 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=763 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:27.623 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:27.623 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:27.623 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:32.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:32.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:32.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:32.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:32.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:32.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:32.637 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:32.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:32.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:32.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:32.639 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:32.646 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:32.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:32.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:32.646 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:32.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:32.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:32.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:32.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:32.651 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:32.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:32.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:32.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:32.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:32.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:32.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:32.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:32.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:32.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:32.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:32.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:32.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:32.656 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:32.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:32.656 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:32.660 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:32.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:32.661 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:32.661 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:32.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:32.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:32.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:32.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:32.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:33.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:33.194 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:33.196 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:33.198 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:33.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:33.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:02:33.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:02:33.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:02:33.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:33.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:33.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:33.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:33.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:33.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:33.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:33.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:33.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:33.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:33.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:33.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:33.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:33.255 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:33.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:33.255 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:33.255 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:33.255 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:33.255 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:33.255 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:33.255 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:38.256 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:38.257 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:38.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:38.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:38.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:38.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:38.268 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:38.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:38.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:38.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:38.270 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:38.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:38.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:38.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:38.272 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:38.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:38.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:38.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:38.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:38.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:38.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:38.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:38.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:38.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:38.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:38.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:38.276 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:38.278 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:38.278 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:38.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:38.278 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:38.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:38.278 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:38.278 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:38.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:38.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:38.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:38.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:38.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:38.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:38.282 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:38.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:38.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:38.768 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:38.813 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:38.815 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:38.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:38.816 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:38.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:38.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:38.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:38.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:38.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:38.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:38.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:38.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:38.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:38.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:38.830 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:38.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:38.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:38.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:38.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:38.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:38.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:38.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:43.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:43.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:43.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:43.833 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:43.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:43.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:43.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:43.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:43.842 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:43.842 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:43.842 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:43.845 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:43.845 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:43.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:43.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:43.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:43.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:43.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:43.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:43.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:43.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:43.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:43.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:43.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:43.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:43.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:43.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:43.851 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:43.851 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:43.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:43.852 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:43.852 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:43.852 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:43.852 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:43.852 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:43.855 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:43.855 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:43.855 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:43.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:43.860 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:44.344 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:44.383 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:44.385 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:44.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:44.387 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:44.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:44.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:44.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:44.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:44.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:44.400 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:44.400 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:44.400 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:44.400 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:44.400 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:44.400 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:44.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:44.401 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:02:49.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:49.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:49.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:49.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:49.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:49.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:49.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:49.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:49.410 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:49.410 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:49.410 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:49.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:49.411 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:49.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:49.411 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:49.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:49.411 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:49.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:49.411 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:49.412 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:49.412 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:49.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:49.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:49.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:49.412 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:49.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:49.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:49.413 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:49.413 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:49.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:49.413 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:49.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:49.413 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:49.413 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:49.413 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:49.414 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:49.414 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:49.415 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:49.415 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:49.415 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:49.420 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:49.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:49.945 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:49.947 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:49.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:49.950 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:49.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:49.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:49.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:49.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:49.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:49.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:49.964 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:49.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:49.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:49.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:49.964 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:54.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:54.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:54.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:54.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:54.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:54.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:54.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:54.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:54.973 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:54.973 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:02:54.973 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:02:54.978 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:02:54.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:02:54.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:54.979 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:54.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:54.979 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:02:54.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:02:54.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:02:54.984 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:02:54.984 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:02:54.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:54.984 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:54.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:54.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:02:54.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:02:54.984 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:02:54.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:02:54.988 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:02:54.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:54.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:02:54.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:02:54.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:02:54.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:02:54.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:02:54.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:02:54.993 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:02:54.993 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:02:54.993 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:02:54.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:02:54.998 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:02:55.481 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:02:55.522 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:02:55.525 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:02:55.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:02:55.527 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:02:55.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:02:55.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:02:55.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:02:55.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:02:55.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:02:55.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:02:55.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:02:55.544 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:02:55.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:02:55.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:02:55.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:00.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:00.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:00.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:00.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:00.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:00.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:00.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:00.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:00.562 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:00.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:00.562 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:00.564 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:00.564 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:00.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:00.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:00.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:00.564 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:00.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:00.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:00.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:00.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:00.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:00.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:00.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:00.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:00.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:00.566 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:00.567 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:00.567 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:00.567 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:00.567 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:00.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:00.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:00.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:00.568 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:00.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:00.570 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:00.570 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:00.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:00.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:00.574 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:01.058 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:01.093 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:01.095 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:01.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:01.098 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:01.537 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:03:01.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:01.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:01.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:01.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:02.015 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:03:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:03:02.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:02.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:02.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:02.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:02.970 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:03:03.448 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:03:03.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:03.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:03.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:03.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:03.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:03:04.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:04.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:04.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:03:04.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:03:04.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:03:04.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:03:04.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:03:04.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:03:04.404 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:03:04.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:04.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:04.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:04.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:04.882 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:03:05.360 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:03:05.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:05.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:05.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:05.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:05.839 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:03:06.317 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:03:06.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:06.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:06.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:06.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:06.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:06.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:06.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:06.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:06.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:06.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:06.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:06.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:06.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:06.449 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:06.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:06.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:06.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:06.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:06.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:06.449 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:11.448 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:11.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:11.450 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:11.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:11.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:11.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:11.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:11.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:11.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:11.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:11.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:11.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:11.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:11.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:11.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:11.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:11.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:11.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:11.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:11.467 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:11.467 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:11.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:11.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:11.468 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:11.468 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:11.468 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:11.468 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:11.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:11.471 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:11.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:11.471 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:11.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:11.471 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:11.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:11.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.477 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:11.477 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:11.478 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:11.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:11.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:11.483 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:11.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:12.007 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:12.009 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:12.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:12.011 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:12.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:12.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:12.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:03:12.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:12.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:12.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:12.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:12.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:12.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:12.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:12.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:12.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:12.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:12.047 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:12.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:12.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:12.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:12.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:12.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:12.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:17.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:17.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:17.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:17.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:17.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:17.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:17.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:17.058 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:17.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:17.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:17.063 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:17.064 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:17.064 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:17.064 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:17.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:17.065 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:17.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:17.066 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:17.068 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:17.068 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:17.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:17.068 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:17.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:17.068 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:17.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:17.069 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:17.071 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:17.071 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:17.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:17.071 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:17.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:17.071 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:17.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:17.071 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.074 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:17.075 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:17.075 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:17.075 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:17.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:17.079 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:17.564 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:17.602 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:17.605 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:17.607 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:17.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:17.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:17.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:03:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:17.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:17.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:17.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:17.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:17.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:17.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:17.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:17.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:17.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:17.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:17.647 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:17.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:22.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:22.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:22.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:22.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:22.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:22.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:22.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:22.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:22.663 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:22.663 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:22.663 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:22.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:22.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:22.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:22.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:22.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:22.668 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:22.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:22.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:22.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:22.671 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:22.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:22.671 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:22.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:22.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:22.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:22.672 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:22.675 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:22.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:22.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:22.675 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:22.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:22.675 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:22.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:22.676 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:22.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:22.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:22.682 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:22.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:22.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:22.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:23.171 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:23.222 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:23.224 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:23.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:23.226 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:23.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:23.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:23.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:03:23.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:23.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:23.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:23.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:23.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:23.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:23.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:23.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:23.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:23.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:23.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:23.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:23.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:23.270 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:23.270 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:23.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:23.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:23.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:23.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:23.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:28.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:28.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:28.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:28.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:28.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:28.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:28.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:28.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:28.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:28.283 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:28.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:28.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:28.288 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:28.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:28.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:28.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:28.290 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:28.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:28.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:28.293 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:28.293 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:28.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:28.294 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:28.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:28.294 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:28.294 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:28.294 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:28.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:28.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:28.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:28.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:28.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:28.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:28.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:28.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:28.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:28.303 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:28.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:28.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:28.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:28.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:28.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.308 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:28.793 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:28.839 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:28.841 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:28.843 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:28.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:28.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:28.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:03:28.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:28.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:28.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:28.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:28.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:28.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:28.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:28.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:28.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:28.915 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:28.916 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:28.916 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:28.916 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:28.916 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:28.916 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:28.916 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:33.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:33.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:33.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:33.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:33.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:33.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:33.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:33.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:33.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:33.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:33.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:33.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:33.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:33.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:33.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:33.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:33.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:33.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:33.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:33.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:33.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:33.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:33.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:33.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:33.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:33.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:33.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:33.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:33.931 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:33.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:33.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:33.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:33.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:33.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:33.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:33.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:33.933 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:33.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:33.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:33.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:34.421 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:34.456 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:34.458 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:34.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:34.460 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:34.463 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 04:03:34.463 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 200
2026-02-19 04:03:34.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 04:03:34.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:34.898 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:03:35.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:35.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:35.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:35.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:35.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:35.378 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:03:35.856 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:03:35.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:36.098 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 04:03:36.098 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 0
2026-02-19 04:03:36.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 04:03:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:36.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:36.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:36.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:36.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:36.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:36.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:36.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:36.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:36.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:36.108 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:36.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:36.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:36.108 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:36.108 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=464 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:36.108 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=464 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:36.108 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=464 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:36.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=464 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:36.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=464 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:36.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=464 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:41.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:41.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:41.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:41.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:41.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:41.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:41.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:41.121 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:41.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:41.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:41.122 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:41.126 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:41.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:41.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:41.127 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:41.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:41.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:41.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:41.128 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:41.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:41.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:41.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:41.131 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:41.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:41.131 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:41.131 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:41.131 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:41.133 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:41.133 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:41.133 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:41.133 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:41.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:41.134 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:41.134 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:41.134 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.137 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:41.137 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:41.137 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:41.137 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:41.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:41.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:41.142 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:41.625 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:41.664 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:41.667 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:41.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:41.669 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:41.671 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 04:03:41.671 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 200
2026-02-19 04:03:41.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 04:03:41.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:42.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:42.102 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:03:42.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:42.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:42.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:42.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:42.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:42.580 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:03:42.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:42.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.058 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:03:43.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.304 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 04:03:43.304 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 0
2026-02-19 04:03:43.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 04:03:43.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:43.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:43.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:43.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:43.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:43.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:43.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:43.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:43.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:43.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:43.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:43.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:43.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:43.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:43.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:43.314 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:43.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:43.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:43.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:43.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:43.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:43.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:48.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:48.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:48.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:48.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:48.317 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:48.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:48.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:48.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:48.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:48.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:48.328 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:48.330 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:48.331 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:48.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:48.331 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:48.331 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:48.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:48.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:48.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:48.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:48.334 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:48.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:48.334 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:48.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:48.334 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:48.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:48.334 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:48.337 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:48.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:48.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:48.337 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:48.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:48.337 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:48.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:48.337 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.341 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:48.341 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:48.341 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:48.342 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:48.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:48.830 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:48.874 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:48.876 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:48.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:48.879 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:48.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:48.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:48.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:03:48.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:48.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:48.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:48.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:48.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:48.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:48.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:48.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:48.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:48.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:48.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:48.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:48.926 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:53.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:53.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:53.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:53.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:53.929 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:53.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:53.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:53.939 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:53.940 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:53.940 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:53.940 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:53.945 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:53.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:53.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:53.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:53.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:53.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:53.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:53.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:53.948 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:53.948 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:53.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:53.949 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:53.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:53.949 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:53.949 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:53.949 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:53.951 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:53.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:53.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:53.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:53.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:53.952 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:53.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:53.952 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:53.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:53.955 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:53.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:53.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:03:54.443 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:03:54.484 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:03:54.487 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:03:54.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:54.489 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:03:54.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:03:54.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:03:54.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:03:54.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:54.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:03:54.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:03:54.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:03:54.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:03:54.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:03:54.532 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:54.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:54.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:54.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:54.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:54.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:54.533 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:03:54.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:54.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:54.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:54.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:54.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:54.533 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:03:59.533 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:03:59.533 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:03:59.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:59.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:59.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:59.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:59.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:03:59.548 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:59.549 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:59.549 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:03:59.549 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:03:59.553 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:03:59.553 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:03:59.553 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:59.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:59.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:03:59.554 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:03:59.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:03:59.554 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:03:59.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:03:59.558 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:03:59.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:59.558 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:59.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:03:59.558 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:03:59.558 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:03:59.558 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:03:59.562 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:03:59.562 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:03:59.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:59.562 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:03:59.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:03:59.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:03:59.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:03:59.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:03:59.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:03:59.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:03:59.567 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:03:59.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:03:59.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:03:59.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:03:59.572 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:04:00.056 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:04:00.102 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:04:00.104 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:04:00.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:00.106 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:04:00.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:00.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:00.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:00.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:00.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:00.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:00.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:00.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:00.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:00.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:00.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:00.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:00.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:00.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:00.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:00.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:00.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:00.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:00.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:00.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:00.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:00.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:00.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:00.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:00.240 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:00.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:00.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:00.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:00.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:00.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:00.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:04:00.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:00.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:00.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:00.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:01.012 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:04:01.490 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:04:01.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:01.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:01.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:01.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:01.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:04:02.445 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:04:02.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:02.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:02.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:02.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:02.923 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:04:03.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:03.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:03.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:03.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:03.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:03.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:03.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:03.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:03.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:03.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:03.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:03.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:03.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:03.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:03.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:03.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:03.401 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:04:03.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:03.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:03.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:03.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:03.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:03.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:03.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:03.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:03.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:03.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:03.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:03.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:03.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:03.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:03.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:03.878 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:04:04.355 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:04:04.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:04.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:04.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:04.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:04.833 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:04:05.311 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:04:05.790 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:04:06.267 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:04:06.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:06.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:06.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:06.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:06.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:06.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:06.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:06.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:06.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:06.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:06.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:06.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:06.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:06.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:06.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:06.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:06.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:06.745 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:04:07.223 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:04:07.700 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:04:08.179 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:04:08.656 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:04:09.134 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:04:09.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:09.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:09.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:09.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:09.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:09.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:09.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:09.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:09.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:09.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:09.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:09.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:09.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:09.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:09.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:09.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:09.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:09.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:09.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:09.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:09.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:09.611 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:04:09.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:09.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:09.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:09.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:09.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:09.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:09.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:09.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:09.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:09.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:09.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:09.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:09.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.089 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:04:10.567 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:04:10.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:10.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:10.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:10.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:10.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:10.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:10.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:10.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:10.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:10.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:10.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:10.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:10.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:10.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:10.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:10.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:10.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:10.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:10.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:10.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:10.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:10.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:10.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:10.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:10.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:10.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:10.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:10.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:11.044 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:04:11.522 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:04:12.000 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:04:12.478 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:04:12.956 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:04:13.434 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:04:13.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:13.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:13.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:13.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:13.912 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:04:13.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:13.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:13.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:13.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:13.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:13.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:13.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:13.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:13.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:13.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:13.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:13.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:13.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:14.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:14.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:14.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:14.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:14.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:14.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:14.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:14.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:14.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:14.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:14.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:14.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:14.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:14.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:14.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:14.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:14.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:14.390 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:04:14.868 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:04:15.347 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:04:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:04:16.303 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:04:16.781 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:04:17.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:17.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:17.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:17.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:17.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:17.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:17.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:17.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:17.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:17.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:17.134 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:17.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:17.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:17.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:17.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:17.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:17.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:17.258 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:04:17.737 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:04:18.215 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:04:18.693 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:04:19.172 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:04:19.650 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:04:20.128 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:04:20.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:20.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:20.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:20.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:20.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:20.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:20.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:20.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:20.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:20.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:20.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:20.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:20.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:20.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:20.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:20.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:20.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:20.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:20.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:20.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:20.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:20.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:20.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:20.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:20.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:20.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:20.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:20.604 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:04:21.083 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:04:21.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:21.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:21.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:21.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:21.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:21.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:21.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:21.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:21.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:21.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:21.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:21.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:21.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:21.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:21.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:21.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:21.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:21.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:21.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:21.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:21.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:21.560 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:04:21.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:21.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:21.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:21.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:21.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:21.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:21.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:21.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:21.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:21.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:21.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:21.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:21.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:22.037 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:04:22.515 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:04:22.993 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:04:23.470 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:04:23.948 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:04:24.426 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:04:24.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:24.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:24.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:24.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:24.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:24.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:24.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:24.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:24.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:24.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:24.641 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:24.641 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:24.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:24.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:24.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:24.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:24.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:24.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:24.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:24.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:24.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:24.902 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:04:24.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:24.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:24.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:24.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:24.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:24.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:24.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:24.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:24.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:24.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:24.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:24.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:24.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:25.379 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:04:25.857 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:04:26.335 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:04:26.813 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:04:27.290 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:04:27.768 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:04:27.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:27.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:27.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:27.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:27.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:27.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:27.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:27.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:27.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:27.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:27.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:27.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:28.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:28.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:28.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:28.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:28.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:28.246 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:04:28.723 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:04:29.202 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:04:29.680 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:04:30.158 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:04:30.635 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:04:31.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:31.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:31.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:31.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:31.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:31.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:31.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:31.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:31.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:31.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:31.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:31.062 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:31.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:31.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:31.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:31.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:31.112 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:04:31.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:31.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:31.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:31.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:31.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:31.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:31.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:31.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:31.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:31.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:31.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:31.587 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:04:32.065 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:04:32.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:32.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:32.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:32.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:32.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:32.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:32.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:32.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:32.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:32.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:32.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:32.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:32.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:32.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:32.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:32.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:32.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:32.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:32.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:32.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:32.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:32.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:32.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:32.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:32.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:32.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:32.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:32.542 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:04:33.020 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:04:33.498 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:04:33.976 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:04:34.455 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:04:34.932 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:04:35.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:35.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:35.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:35.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:35.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:35.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:35.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:35.341 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:35.341 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:35.341 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:35.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:35.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:35.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:35.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.410 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:04:35.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:35.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:35.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:35.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:35.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:35.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:35.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:35.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:35.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:35.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:35.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:35.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:35.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:35.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:35.887 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:04:36.365 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:04:36.842 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:04:37.319 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:04:37.798 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:04:38.276 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:04:38.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:38.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:38.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:38.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:38.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:38.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:38.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:38.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:38.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:38.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:38.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:38.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:38.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:38.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:38.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:38.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:38.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:38.753 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:04:39.231 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:04:39.708 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:04:40.186 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:04:40.663 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:04:41.141 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:04:41.620 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:04:41.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:41.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:41.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:41.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:41.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:41.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:41.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:41.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:41.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:41.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:41.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:41.690 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:41.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:41.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:41.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:41.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:41.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:41.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:41.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:41.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:41.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:41.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:41.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:41.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:41.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:41.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:41.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:41.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:41.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:41.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:41.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:41.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:41.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:41.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:42.097 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:04:42.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:42.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:42.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:42.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:42.574 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:04:42.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:42.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:42.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:42.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:42.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:04:42.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:04:42.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:04:42.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:04:42.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:04:42.580 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:04:42.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:04:47.579 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:04:47.579 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:04:47.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:04:47.582 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:04:47.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:04:47.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:04:47.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:04:47.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:04:47.592 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:47.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:04:47.592 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:04:47.595 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:04:47.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:04:47.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:04:47.596 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:47.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:04:47.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:04:47.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:04:47.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:04:47.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:04:47.600 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:04:47.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:04:47.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:47.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:04:47.600 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:04:47.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:04:47.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:04:47.603 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:04:47.603 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:04:47.603 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:04:47.603 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:47.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:04:47.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:04:47.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:04:47.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.608 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:04:47.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:04:47.608 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:04:47.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.609 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:47.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:47.613 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:04:48.096 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:04:48.142 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:04:48.144 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:04:48.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.146 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:04:48.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:48.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:48.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:48.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:48.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:48.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:48.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.440 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.440 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:48.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:48.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:48.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.573 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:04:48.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:48.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:48.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:48.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:48.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:48.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:48.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:48.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:48.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:48.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:48.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:48.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:48.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:48.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:48.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:48.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:48.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:48.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:04:48.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:04:48.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:04:48.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:04:48.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:04:48.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:04:48.909 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:04:48.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:48.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:48.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:48.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:48.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:48.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:53.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:04:53.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:04:53.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:04:53.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:04:53.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:04:53.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:04:53.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:04:53.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:04:53.922 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:53.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:04:53.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:04:53.927 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:04:53.927 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:04:53.928 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:04:53.928 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:53.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:04:53.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:04:53.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:04:53.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:04:53.932 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:04:53.933 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:04:53.933 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:04:53.933 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:53.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:04:53.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:04:53.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:04:53.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:04:53.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:04:53.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:04:53.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:04:53.938 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:04:53.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:04:53.939 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:04:53.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:04:53.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:04:53.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:04:53.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:04:53.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:04:53.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:04:53.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:04:53.946 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:04:53.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:04:53.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:04:53.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:04:53.951 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:04:54.435 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:04:54.484 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:04:54.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:54.485 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:04:54.486 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:04:54.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:54.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:54.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:54.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:54.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:54.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:54.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:54.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:54.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:54.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:54.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:54.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:54.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:54.912 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:04:54.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:54.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:54.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:54.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:55.390 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:04:55.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:55.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:55.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:55.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:55.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:55.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:55.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:55.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:55.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:55.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:55.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:55.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:55.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:55.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:55.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:55.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:55.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:55.867 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:04:55.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:55.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:55.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:55.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:56.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:56.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:56.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:56.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:56.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:56.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:56.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:56.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:56.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:56.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:56.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:56.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:56.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:56.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:56.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:56.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:56.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:56.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:04:56.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:56.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:56.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:04:56.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:04:56.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:56.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:04:56.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:04:56.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.343 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:04:56.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:04:56.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:04:56.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:04:56.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:04:56.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:04:56.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:04:56.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:04:56.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:04:56.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:04:56.751 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:04:56.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:04:56.751 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:04:56.751 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=599 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:04:56.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:04:56.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=599 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=599 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=599 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=599 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=599 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:04:56.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:01.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:01.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:01.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:01.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:01.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:01.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:01.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:01.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:01.764 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:01.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:01.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:05:01.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:05:01.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:05:01.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:01.768 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:01.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:01.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:05:01.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:01.769 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:05:01.770 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:05:01.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:05:01.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:01.771 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:01.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:01.771 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:05:01.771 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:01.771 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:05:01.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:05:01.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:05:01.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:01.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:01.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:01.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:05:01.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:01.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:05:01.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:05:01.776 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:05:01.777 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:01.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:01.781 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:05:02.265 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:05:02.305 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:05:02.306 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:05:02.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:02.308 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:05:02.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:02.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:02.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:02.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.321 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:02.321 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:02.321 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:02.321 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:02.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:02.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:02.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:02.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:02.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:02.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:02.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:02.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:02.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:02.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:02.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:02.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:02.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:02.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:02.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:02.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:02.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.742 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:05:02.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:02.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:02.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:02.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:02.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:02.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:02.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:02.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:02.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:02.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:02.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:02.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:02.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:02.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:02.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:02.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:02.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:02.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:02.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:03.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:03.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:03.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:03.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:03.220 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:05:03.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:03.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:03.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:03.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:03.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:03.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:03.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:03.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:03.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:03.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:03.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:03.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:03.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:03.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:03.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:03.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:03.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:03.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:03.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:03.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:03.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:03.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:03.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:03.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:03.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:03.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:03.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:03.624 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:05:03.624 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.624 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.624 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.624 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.624 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:03.625 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:08.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:08.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:08.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:08.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:08.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:08.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:08.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:08.635 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:08.635 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:08.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:08.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:05:08.640 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:05:08.640 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:05:08.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:08.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:08.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:08.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:05:08.641 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:08.641 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:05:08.645 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:05:08.645 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:05:08.645 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:08.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:08.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:08.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:05:08.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:08.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:05:08.651 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:05:08.651 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:05:08.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:08.651 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:08.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:08.651 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:05:08.651 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:08.652 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:05:08.656 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:05:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:05:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:05:08.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:05:08.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:05:08.657 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:05:08.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:08.662 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:05:09.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:05:09.187 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:05:09.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:09.191 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:05:09.193 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:05:09.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:09.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:09.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:09.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:09.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:09.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:09.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:09.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:09.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:09.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:09.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:09.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:09.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:09.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:09.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:09.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:09.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:09.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:09.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:09.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:09.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:09.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:09.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:09.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.622 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:05:09.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:09.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:09.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:09.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:09.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:09.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:09.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:09.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:09.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:09.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:09.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:09.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:09.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:09.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:09.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:09.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:09.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:09.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:09.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:10.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:10.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:10.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:10.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:10.099 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:05:10.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:10.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:10.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:10.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:10.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:10.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:10.105 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:10.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:10.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:10.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:10.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:10.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:10.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:10.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:10.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:10.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:10.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:10.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:10.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:10.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:10.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:10.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:10.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:10.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:10.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:10.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:10.506 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:05:10.506 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:10.506 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:10.506 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:10.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:10.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:10.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:10.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:15.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:15.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:15.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:15.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:15.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:15.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:15.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:15.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:15.519 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:15.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:15.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:05:15.523 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:05:15.523 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:05:15.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:15.524 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:15.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:15.524 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:05:15.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:15.525 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:05:15.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:05:15.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:05:15.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:15.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:15.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:15.527 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:05:15.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:15.527 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:05:15.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:05:15.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:05:15.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:15.530 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:15.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:15.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:05:15.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:15.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.533 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:05:15.533 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:05:15.533 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:05:15.534 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:15.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:15.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:15.538 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:05:16.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:05:16.066 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:05:16.068 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:05:16.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:16.070 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:05:16.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:16.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:16.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:16.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:16.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:16.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:16.098 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:16.098 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:16.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:16.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:16.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:16.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:16.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:16.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:05:16.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:16.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:16.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:16.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:16.978 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:05:17.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:05:17.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:17.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:17.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:17.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:17.933 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:05:17.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:17.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:17.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:17.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:18.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:18.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:18.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:18.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:18.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:18.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:18.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:18.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:18.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:18.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:18.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:18.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:18.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:18.411 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:05:18.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:18.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:18.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:18.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:18.889 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:05:19.367 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:05:19.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:19.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:19.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:19.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:19.845 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:05:20.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:20.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:20.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:20.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:20.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:20.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:20.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:20.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:20.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:20.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:20.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:20.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:20.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:20.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:20.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:20.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:20.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:20.323 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:05:20.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:20.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:20.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:20.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:20.800 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:05:21.278 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:05:21.756 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:05:21.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:21.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:21.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:21.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:21.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:21.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:21.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:21.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:21.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:21.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:21.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:21.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:21.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:21.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:21.855 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:21.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:21.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:22.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:05:22.711 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:05:23.188 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:05:23.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:23.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:23.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:23.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:23.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:23.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:23.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:23.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:23.665 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:05:23.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:23.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:23.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:23.669 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:05:23.669 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:23.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:23.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:23.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:23.669 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:28.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:28.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:28.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:28.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:28.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:28.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:28.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:28.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:28.680 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:28.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:28.681 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:05:28.684 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:05:28.684 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:05:28.684 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:28.684 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:28.685 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:28.685 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:05:28.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:28.685 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:05:28.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:05:28.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:05:28.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:28.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:28.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:28.687 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:05:28.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:28.688 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:05:28.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:05:28.689 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:05:28.689 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:28.689 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:28.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:28.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:05:28.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:28.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:05:28.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:05:28.693 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:05:28.693 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:28.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:28.698 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:05:29.182 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:05:29.222 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:05:29.224 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:05:29.226 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:05:29.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:29.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:29.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:29.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:29.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:29.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:29.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:29.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:29.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:29.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:29.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:29.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:29.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:29.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:29.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:05:29.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:29.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:29.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:29.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:30.137 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:05:30.614 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:05:30.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:30.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:30.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:30.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:31.092 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:05:31.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:31.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:31.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:31.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:31.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:31.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:31.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:31.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:31.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:31.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:31.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:31.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:31.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:31.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:31.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:31.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:31.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:31.570 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:05:31.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:31.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:31.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:31.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:32.048 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:05:32.525 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:05:32.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:32.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:32.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:32.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:33.003 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:05:33.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:33.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:33.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:33.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:33.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:33.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:33.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:33.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:33.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:33.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:33.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:33.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:33.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:33.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:33.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:33.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:33.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:33.480 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:05:33.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:33.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:33.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:33.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:33.958 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:05:34.436 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:05:34.914 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:05:34.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:34.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:34.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:34.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:34.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:34.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:34.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:34.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:34.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:34.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:34.976 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:34.976 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:35.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:35.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:35.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:35.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:35.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:35.391 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:05:35.869 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:05:36.347 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:05:36.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:36.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:36.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:36.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:36.824 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:05:36.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:36.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:36.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:36.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:36.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:36.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:36.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:36.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:36.830 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:05:36.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:36.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:36.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:36.830 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:36.831 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:36.831 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:36.831 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:05:41.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:05:41.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:05:41.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:41.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:41.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:41.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:41.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:05:41.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:41.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:41.844 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:05:41.844 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:05:41.848 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:05:41.848 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:05:41.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:41.849 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:41.849 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:05:41.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:05:41.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:05:41.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:05:41.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:05:41.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:05:41.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:41.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:05:41.854 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:05:41.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:05:41.854 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:05:41.857 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:05:41.857 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:05:41.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:41.857 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:05:41.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:05:41.857 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:05:41.857 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:05:41.857 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:05:41.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:05:41.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:05:41.863 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:05:41.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:05:41.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:05:41.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:05:41.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:05:42.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:05:42.394 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:05:42.396 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:05:42.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:42.398 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:05:42.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:42.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:42.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:42.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:42.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:42.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:42.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:42.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:42.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:42.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:42.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:42.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:42.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:42.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:42.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:42.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:42.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:42.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:42.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:42.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:42.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:42.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:42.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:42.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:42.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:42.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:42.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:42.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:42.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:42.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:42.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:05:42.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:42.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:42.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:42.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:43.307 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:05:43.785 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:05:43.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:43.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:43.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:43.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:44.262 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:05:44.740 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:05:44.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:44.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:44.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:44.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:44.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:44.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:44.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:44.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:44.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:44.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:44.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:44.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:44.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:44.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:44.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:44.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:44.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:44.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:44.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:44.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:44.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:45.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:45.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:45.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:45.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:45.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:45.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:45.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:45.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:45.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:45.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:45.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:45.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:45.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:45.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:45.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:45.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:45.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:45.216 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:05:45.694 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:05:45.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:45.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:45.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:45.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:46.172 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:05:46.649 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:05:46.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:05:46.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:05:46.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:05:46.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:05:47.126 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:05:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:47.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:47.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:47.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:47.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:47.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:47.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:47.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:47.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:47.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:47.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:47.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:47.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:47.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:47.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:47.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:47.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:47.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:47.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:47.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:47.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:47.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:47.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:47.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:47.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:47.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:47.603 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:05:48.080 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:05:48.559 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:05:49.036 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:05:49.514 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:05:49.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:49.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:49.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:49.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:49.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:49.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:49.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:49.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:49.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:49.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:49.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:49.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:49.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:49.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:49.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:49.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:49.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:49.990 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:05:50.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:50.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:50.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:50.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:50.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:50.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:50.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:50.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:50.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:50.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:50.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:50.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:50.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:50.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:50.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:50.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:50.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:50.468 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:05:50.946 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:05:51.424 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:05:51.902 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:05:52.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:52.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:52.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:52.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:52.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:52.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:52.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:52.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:52.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:52.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:52.348 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:52.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:52.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:52.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:52.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:52.379 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:05:52.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:52.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:52.857 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:05:53.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:53.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:53.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:53.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:53.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:53.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:53.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:53.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:53.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:53.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:53.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:53.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:53.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:53.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:53.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:53.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:53.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:53.335 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:05:53.812 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:05:54.290 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:05:54.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:54.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:54.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:54.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:54.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:54.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:54.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:54.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:54.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:54.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:54.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:54.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:54.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:54.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:54.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:54.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:54.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:54.767 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:05:55.245 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:05:55.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:55.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:55.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:55.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:55.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:55.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:55.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:55.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:55.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:55.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:55.411 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:55.411 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:55.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:55.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:55.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:55.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:55.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:55.721 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:05:56.199 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:05:56.676 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:05:57.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:57.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:57.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:57.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:57.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:57.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:57.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:57.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:57.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:57.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:57.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:57.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:57.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:57.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:57.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:57.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:57.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:57.154 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:05:57.632 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:05:57.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:57.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:57.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:57.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:57.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:57.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:57.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:57.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:57.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:57.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:57.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:57.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:57.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:57.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:57.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:57.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:57.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:58.110 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:05:58.588 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:05:59.066 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:05:59.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:59.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:59.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:59.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:59.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:05:59.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:05:59.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:05:59.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:59.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:59.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:59.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:05:59.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:05:59.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:05:59.544 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:05:59.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:05:59.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:05:59.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:05:59.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:00.022 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:06:00.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:00.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:00.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:00.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:00.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:00.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:00.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:00.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:00.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:00.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:00.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:00.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:00.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:00.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:00.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:00.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:00.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:00.500 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:06:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:06:01.456 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:06:01.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:01.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:01.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:01.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:01.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:01.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:01.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:01.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:01.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:01.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:01.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:01.865 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:01.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:01.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:01.865 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:01.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4272 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:01.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4272 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:01.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4272 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:01.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4272 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:01.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4272 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:01.866 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4272 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:06.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:06.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:06.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:06.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:06.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:06.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:06.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:06.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:06.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:06.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:06.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:06:06.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:06:06.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:06:06.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:06.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:06.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:06.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:06:06.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:06.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:06:06.885 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:06:06.885 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:06:06.886 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:06.886 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:06.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:06.886 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:06:06.887 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:06.887 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:06:06.889 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:06:06.890 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:06:06.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:06.890 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:06.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:06.890 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:06:06.890 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:06.890 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:06:06.895 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.897 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:06:06.897 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:06:06.897 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:06:06.897 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:06:06.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:06:06.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:06.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:06.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:06.902 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:06:07.381 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:06:07.431 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:06:07.434 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:06:07.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.435 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:06:07.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:07.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:07.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:07.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:07.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:07.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:07.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:07.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:07.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:07.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:07.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:07.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:07.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:07.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:07.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:06:07.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:07.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:07.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:07.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:07.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:07.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:07.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:07.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:07.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:07.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:07.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:07.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:07.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:07.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:07.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:08.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:08.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:08.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:08.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:08.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:08.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.334 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:06:08.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:08.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:08.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:08.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:08.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:08.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:08.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:08.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:08.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.809 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:06:08.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:08.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:08.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:08.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:08.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:08.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:08.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:08.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:08.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:08.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:08.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:08.904 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:08.905 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:08.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:08.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:08.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:08.905 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:08.906 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:08.906 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:08.906 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:08.906 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:08.906 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:13.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:13.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:13.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:13.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:13.906 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:13.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:13.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:13.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:13.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:13.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:13.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:06:13.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:06:13.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:06:13.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:13.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:13.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:13.920 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:06:13.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:13.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:06:13.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:06:13.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:06:13.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:13.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:13.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:13.923 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:06:13.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:13.923 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:06:13.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:06:13.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:06:13.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:13.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:13.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:13.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:06:13.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:13.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:06:13.929 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:06:13.929 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:06:13.929 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:13.934 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:06:14.418 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:06:14.457 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:06:14.460 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:06:14.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:14.462 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:06:14.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:14.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:14.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:14.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:14.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:14.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:14.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:14.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:14.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:14.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:14.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:14.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:14.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:14.895 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:06:14.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:14.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:14.933 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:14.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:15.373 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:06:15.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:15.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:15.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:15.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:15.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:15.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:15.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:15.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:15.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:15.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:15.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:15.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:15.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:15.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:15.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:15.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:15.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:15.851 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:06:15.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:15.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:15.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:15.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:15.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:15.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:15.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:15.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:15.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:15.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:15.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:15.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:15.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:15.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:15.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:15.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:15.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:15.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:15.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:15.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:15.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:16.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:06:16.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:16.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:16.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:16.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:16.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:16.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:16.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:16.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:16.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:16.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:16.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:16.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:16.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:16.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:16.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:16.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:16.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:16.806 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:06:16.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:16.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:16.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:16.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:17.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:17.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:17.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:17.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:17.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:17.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:17.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:17.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:17.114 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:17.114 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:17.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:17.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:17.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:17.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:17.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:17.282 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:06:17.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:17.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:17.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:17.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:17.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:17.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:17.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:17.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:17.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:17.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:17.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:17.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:17.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:17.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:17.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:17.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:17.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:17.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:17.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:17.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:17.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:17.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:17.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:17.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:17.759 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:06:17.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:17.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:17.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:17.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:18.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:18.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:18.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:18.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:18.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:18.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:18.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:18.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:18.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:18.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:18.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:18.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:18.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:18.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:18.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:18.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:18.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:18.236 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:06:18.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:18.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:18.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:18.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:18.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:18.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:18.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:18.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:18.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:18.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:18.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:18.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:18.648 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:18.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:18.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:23.648 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:23.648 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:23.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:23.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:23.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:23.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:23.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:23.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:23.659 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:23.659 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:23.659 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:06:23.660 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:06:23.660 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:06:23.660 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:23.660 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:23.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:23.661 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:06:23.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:23.661 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:06:23.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:06:23.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:06:23.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:23.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:23.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:23.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:06:23.664 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:23.664 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:06:23.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:06:23.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:06:23.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:23.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:23.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:23.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:06:23.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:23.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:06:23.669 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:06:23.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:06:23.670 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:06:23.670 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:06:23.670 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:23.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:23.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:23.675 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:06:24.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:06:24.198 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:06:24.200 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:06:24.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.203 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:06:24.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:24.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:24.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:24.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:24.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.337 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.337 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:24.337 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:24.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:24.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.419 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.419 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:24.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:24.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:24.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:24.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:24.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.635 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:06:24.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:24.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:24.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:24.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:24.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:24.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:24.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:24.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.737 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:24.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:24.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:24.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:24.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:24.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:24.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:24.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:24.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:24.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:25.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:25.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:25.113 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:06:25.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:25.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:25.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:25.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:25.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:25.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:25.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:25.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:25.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:25.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:25.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:25.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:25.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:25.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:25.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:25.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:25.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:25.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:25.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:25.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:25.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:25.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:25.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:25.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:25.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:25.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:25.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:25.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:25.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:25.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:25.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:25.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:25.519 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:25.519 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:25.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:25.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:25.520 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:25.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:25.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:30.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:30.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:30.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:30.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:30.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:30.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:30.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:30.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:30.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:30.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:30.531 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:06:30.533 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:06:30.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:06:30.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:30.534 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:30.534 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:30.534 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:06:30.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:30.535 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:06:30.536 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:06:30.536 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:06:30.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:30.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:30.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:30.537 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:06:30.537 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:30.537 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:06:30.539 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:06:30.539 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:06:30.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:30.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:30.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:30.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:06:30.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:30.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:06:30.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:06:30.542 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:06:30.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:30.547 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:06:31.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:06:31.077 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:06:31.079 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:06:31.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:31.082 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:06:31.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:31.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:31.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:31.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:31.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:31.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:31.110 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:31.110 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:31.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:31.135 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:31.135 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:31.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:31.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:31.509 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:06:31.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:31.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:31.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:31.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:31.986 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:06:32.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:32.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:32.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:32.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:32.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:32.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:32.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:32.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:32.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:32.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:32.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:32.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:32.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:32.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:32.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:32.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:32.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:32.463 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:06:32.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:32.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:32.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:32.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:32.941 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:06:32.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:32.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:32.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:32.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:32.984 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=521 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:33.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:33.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:33.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:33.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:33.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:33.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:33.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:33.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:33.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:33.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:33.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:33.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:33.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:33.418 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:06:33.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:33.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:33.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:33.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:33.897 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:06:34.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:34.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:34.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:34.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:34.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:34.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:34.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:34.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:34.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:34.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:34.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:34.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:34.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:34.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:34.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:34.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:34.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:34.374 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:06:34.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:34.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:34.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:34.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:34.852 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:06:35.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:35.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:35.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:35.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:35.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:35.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:35.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:35.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:35.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:35.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:35.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:35.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:35.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:35.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:35.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:35.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:35.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:35.330 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:06:35.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:35.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:35.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:35.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:35.807 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:06:35.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:35.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:35.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:35.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:35.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:35.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:35.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:35.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:35.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:35.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:35.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:35.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:35.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:35.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:35.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:35.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:35.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:36.285 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:06:36.762 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:06:36.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:36.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:36.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:36.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:36.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:36.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:36.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:36.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:36.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:36.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:36.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:36.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:36.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:36.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:36.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:36.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:36.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:37.239 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:06:37.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:37.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:37.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:37.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:37.718 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:06:37.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:37.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:37.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:37.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:37.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:37.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:37.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:37.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:37.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:37.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:37.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:37.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:37.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:38.195 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:06:38.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:38.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:38.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:38.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:38.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:38.673 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:06:38.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:38.673 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:38.673 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:38.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:38.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:38.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:38.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:38.677 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:38.677 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:38.677 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:38.678 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:38.678 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:38.678 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:38.678 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:38.678 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:38.678 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:43.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:43.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:43.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:43.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:43.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:43.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:43.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:43.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:43.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:43.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:43.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:06:43.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:06:43.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:06:43.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:43.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:43.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:43.692 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:06:43.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:43.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:06:43.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:06:43.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:06:43.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:43.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:43.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:43.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:06:43.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:43.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:06:43.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:06:43.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:06:43.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:43.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:43.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:43.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:06:43.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:43.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:06:43.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:06:43.700 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:06:43.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:43.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:43.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:43.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:06:44.190 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:06:44.227 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:06:44.228 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:06:44.230 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:06:44.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:44.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:44.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:44.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:44.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:44.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.412 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:44.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:44.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:44.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:44.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:44.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:44.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:44.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:44.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:44.665 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:06:44.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:44.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:44.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:44.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:44.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:44.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:44.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:44.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:44.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:44.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:44.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:44.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:44.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:44.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:44.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:44.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:44.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:44.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:44.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:44.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:45.142 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:06:45.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:45.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:45.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:45.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:45.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:45.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:45.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:45.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:45.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:45.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:45.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:45.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:45.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:45.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:45.313 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.315 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.315 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.315 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.315 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.315 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:45.315 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:50.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:50.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:50.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:50.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:50.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:50.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:50.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:50.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:50.333 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:50.333 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:50.333 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:06:50.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:06:50.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:06:50.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:50.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:50.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:50.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:06:50.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:50.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:06:50.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:06:50.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:06:50.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:50.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:50.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:50.342 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:06:50.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:50.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:06:50.344 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:06:50.344 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:06:50.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:50.344 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:50.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:50.344 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:06:50.344 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:50.344 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:06:50.347 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:06:50.347 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:06:50.347 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.347 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:50.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:50.352 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:06:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:06:50.872 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:06:50.873 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:06:50.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:50.875 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:06:50.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:50.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:50.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:50.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:50.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:50.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:50.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:50.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:50.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:50.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:50.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:50.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:50.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:51.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:51.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:51.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:51.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:51.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:51.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:51.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:51.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:51.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:51.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:51.075 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:51.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:51.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:51.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:51.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:51.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:51.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:51.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:51.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:51.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:51.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:51.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:51.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:51.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:51.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:51.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.312 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:06:51.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:51.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:51.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:51.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:51.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:51.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:51.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:51.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:51.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:51.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:51.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:51.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:51.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:51.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:51.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:51.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:51.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:51.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.790 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:06:51.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:51.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:51.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:51.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:51.956 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:51.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:51.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:51.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:51.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:51.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:51.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:51.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:51.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:51.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:51.959 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:51.959 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:51.959 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:51.959 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:51.959 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:51.959 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:51.959 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:56.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:56.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:56.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:56.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:56.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:56.962 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:56.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:56.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:56.970 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:56.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:06:56.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:06:56.974 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:06:56.974 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:06:56.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:56.975 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:56.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:56.975 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:06:56.975 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:06:56.975 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:06:56.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:06:56.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:06:56.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:56.980 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:56.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:56.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:06:56.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:06:56.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:06:56.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:06:56.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:06:56.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:56.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:06:56.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:56.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:06:56.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:06:56.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:06:56.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:06:56.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:06:56.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:06:56.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:06:56.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:06:56.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:06:56.990 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:06:56.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:06:56.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:06:56.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:06:57.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:06:57.520 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:06:57.522 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:06:57.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:57.524 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:06:57.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:57.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:57.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:57.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:57.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:57.553 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:57.553 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:57.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:57.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:57.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:57.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:57.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:57.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:57.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:57.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:57.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:57.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:57.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:57.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:57.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:57.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:57.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:57.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:57.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:57.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:57.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:57.956 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:06:57.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:57.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:57.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:57.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:57.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:57.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:57.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:57.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:57.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:57.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:57.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:57.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:58.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:58.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:58.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:58.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:58.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:58.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:58.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:58.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:58.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:58.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:58.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:58.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:06:58.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:58.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:58.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:58.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:06:58.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:06:58.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:58.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:06:58.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:06:58.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:58.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:58.433 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:06:58.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:06:58.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:06:58.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:06:58.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:06:58.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:06:58.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:06:58.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:06:58.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:06:58.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:06:58.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:06:58.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:06:58.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:06:58.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:06:58.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:06:58.605 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:06:58.605 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:58.605 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:58.605 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:58.605 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:58.605 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:06:58.605 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:03.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:03.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:03.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:03.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:03.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:03.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:03.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:03.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:03.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:03.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:03.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:03.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:03.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:03.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:03.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:03.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:03.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:03.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:03.616 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:03.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:03.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:03.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:03.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:03.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:03.618 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:03.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:03.618 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:03.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:03.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:03.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:03.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:03.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:03.620 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:03.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:03.620 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:03.622 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:03.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:03.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:03.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:03.622 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:03.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:03.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:03.623 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:03.623 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:03.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:03.628 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:04.110 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:04.150 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:04.152 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:04.153 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:04.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:04.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:04.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:04.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:04.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:04.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:04.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:04.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:04.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:04.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:04.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:04.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:04.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:04.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:04.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:07:04.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:04.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:04.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:04.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:04.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:04.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:04.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:04.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:04.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:04.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:04.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:04.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:04.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:04.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:04.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:04.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:04.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:04.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:04.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:04.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:04.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:05.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:07:05.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:05.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:05.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:05.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:05.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:05.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:05.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:05.231 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:05.234 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:05.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:05.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:05.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:05.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:05.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:05.234 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:05.235 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:05.235 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:05.235 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:05.235 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:05.235 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:05.235 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:10.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:10.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:10.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:10.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:10.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:10.238 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:10.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:10.247 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:10.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:10.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:10.248 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:10.251 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:10.251 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:10.252 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:10.252 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:10.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:10.253 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:10.253 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:10.253 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:10.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:10.257 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:10.257 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:10.257 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:10.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:10.258 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:10.258 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:10.258 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:10.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:10.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:10.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:10.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:10.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:10.263 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:10.263 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:10.263 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:10.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:10.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:10.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:10.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:10.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:10.270 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:10.270 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:10.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:10.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:10.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:10.758 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:10.805 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:10.807 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:10.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:10.810 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:10.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:10.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:10.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:10.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:10.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:10.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:10.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:10.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:10.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:10.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:10.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:10.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:11.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:11.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:11.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:11.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:11.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:11.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:11.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:11.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:11.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:11.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:11.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:11.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:11.236 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:07:11.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:11.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:11.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:11.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:11.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:07:11.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:11.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:11.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:11.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:11.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:11.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:11.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:11.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:11.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:11.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:11.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:11.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:11.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:11.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:11.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:12.192 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:07:12.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:12.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:12.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:12.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:12.669 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:07:12.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:12.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:12.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:12.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:12.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:12.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:12.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:12.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:12.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:12.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:12.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:12.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:12.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:12.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:12.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:12.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:12.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:13.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:07:13.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:13.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:13.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:13.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:13.623 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:07:13.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:13.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:13.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:13.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:13.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:13.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:13.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:13.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:13.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:13.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:13.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:13.951 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:13.951 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:13.951 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:13.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:13.951 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:13.951 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:13.951 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:13.951 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:13.951 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:13.951 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:13.951 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:18.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:18.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:18.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:18.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:18.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:18.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:18.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:18.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:18.966 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:18.966 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:18.967 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:18.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:18.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:18.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:18.970 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:18.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:18.971 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:18.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:18.972 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:18.975 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:18.975 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:18.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:18.976 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:18.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:18.976 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:18.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:18.977 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:18.980 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:18.980 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:18.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:18.980 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:18.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:18.980 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:18.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:18.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:18.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:18.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:18.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:18.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:18.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:18.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.987 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:18.987 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:18.987 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:18.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:18.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:18.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:18.992 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:19.476 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:19.516 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:19.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:19.519 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:19.522 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:19.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:19.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:19.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:19.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:19.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:19.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:19.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:19.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:19.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:19.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:19.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:19.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:19.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:19.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:19.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:19.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:19.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:19.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:19.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:19.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:19.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:19.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:19.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:19.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:19.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:19.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:19.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:07:19.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:19.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:19.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:19.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:19.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:19.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:19.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:19.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:20.431 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:07:20.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:20.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:20.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:20.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:20.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:20.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:20.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:20.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:20.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:20.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:20.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:20.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:20.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:20.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:20.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:20.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:20.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:20.909 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:07:20.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:20.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:20.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:20.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:21.386 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:07:21.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:21.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:21.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:21.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:21.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:21.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:21.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:21.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:21.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:21.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:21.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:21.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:21.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:21.572 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:21.572 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:21.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:21.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:21.863 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:07:21.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:21.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:21.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:21.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:22.341 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:07:22.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:22.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:22.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:22.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:22.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:22.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:22.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:22.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:22.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:22.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:22.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:22.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:22.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:22.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:22.670 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:22.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:22.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:22.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:22.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:22.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:27.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:27.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:27.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:27.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:27.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:27.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:27.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:27.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:27.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:27.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:27.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:27.688 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:27.688 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:27.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:27.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:27.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:27.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:27.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:27.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:27.691 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:27.691 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:27.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:27.691 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:27.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:27.691 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:27.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:27.691 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:27.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:27.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:27.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:27.693 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:27.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:27.693 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:27.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:27.693 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:27.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:27.696 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:27.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:27.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:28.186 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:28.229 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:28.231 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:28.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:28.233 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:28.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:28.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:28.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:28.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:28.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:28.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:28.267 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:28.267 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:28.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:28.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:28.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:28.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:28.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:28.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:28.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:28.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:28.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:28.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:28.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:28.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:28.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:28.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:28.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:28.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:28.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:28.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:28.663 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:07:28.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:28.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:28.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:28.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:28.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:28.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:28.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:28.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:29.142 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:07:29.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:29.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:29.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:29.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:29.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:29.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:29.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:29.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:29.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:29.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:29.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:29.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:29.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:29.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:29.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:29.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:29.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:29.619 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:07:29.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:29.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:29.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:29.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:30.096 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:07:30.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:30.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:30.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:30.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:30.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:30.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:30.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:30.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:30.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:30.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:30.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:30.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:30.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:30.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:30.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:30.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:30.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:30.574 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:07:30.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:30.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:30.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:30.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:31.051 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:07:31.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:31.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:31.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:31.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:31.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:31.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:31.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:31.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:31.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:31.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:31.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:31.381 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:31.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:31.381 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:31.381 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:31.381 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:36.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:36.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:36.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:36.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:36.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:36.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:36.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:36.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:36.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:36.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:36.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:36.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:36.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:36.405 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:36.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:36.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:36.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:36.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:36.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:36.411 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:36.411 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:36.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:36.411 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:36.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:36.411 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:36.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:36.411 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:36.415 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:36.416 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:36.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:36.416 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:36.416 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:36.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:36.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:36.416 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:36.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:36.426 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:36.426 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:36.426 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:36.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:36.431 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:36.915 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:36.965 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:36.967 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:36.969 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:36.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:36.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:36.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:36.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:36.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:36.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:36.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:36.999 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:36.999 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:37.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:37.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:37.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:37.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:37.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:37.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:37.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:37.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:37.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:37.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:37.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:37.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:37.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:37.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:37.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:37.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:07:37.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:37.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:37.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:37.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:37.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:37.871 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:07:37.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:37.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:37.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:37.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:37.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:37.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:37.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:37.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:37.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:37.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:37.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:37.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:37.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:37.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:37.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:38.348 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:07:38.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:38.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:38.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:38.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:38.825 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:07:38.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:38.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:38.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:38.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:38.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:38.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:38.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:39.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:39.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:39.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:39.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:07:39.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:07:39.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:39.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:07:39.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:07:39.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:39.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:39.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:07:39.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:39.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:39.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:39.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:39.779 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:07:40.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:40.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:07:40.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:40.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:40.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:40.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:40.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:40.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:40.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:40.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:40.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:40.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:40.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:40.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:40.107 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:40.107 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:40.107 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:40.107 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:40.107 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:40.107 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:40.107 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.109 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:45.110 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:45.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:45.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:45.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:45.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:45.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:45.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:45.119 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:45.120 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:45.120 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:45.123 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:45.123 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:45.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:45.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:45.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:45.124 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:45.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:45.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:45.127 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:45.127 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:45.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:45.128 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:45.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:45.128 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:45.128 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:45.128 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:45.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:45.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:45.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:45.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:45.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:45.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:45.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:45.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:45.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:45.139 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:45.139 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:45.139 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:45.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:45.144 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:45.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:45.669 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:45.671 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:45.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:45.673 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:45.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:45.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:45.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:45.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:45.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:45.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:45.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:45.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:45.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:45.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:45.714 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:45.714 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:45.714 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:45.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:45.714 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:50.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:50.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:50.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:50.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:50.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:50.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:50.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:50.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:50.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:50.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:50.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:50.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:50.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:50.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:50.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:50.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:50.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:50.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:50.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:50.743 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:50.743 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:50.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:50.743 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:50.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:50.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:50.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:50.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:50.746 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:50.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:50.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:50.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:50.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:50.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:50.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:50.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:50.750 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:50.750 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:50.750 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:50.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:50.755 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:51.238 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:51.275 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:51.277 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:51.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:51.278 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:51.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:51.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:51.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:51.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:51.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:51.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:51.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:51.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:51.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:51.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:51.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:51.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:51.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:51.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:51.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:51.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:51.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:51.338 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:56.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:56.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:56.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:56.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:56.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:56.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:56.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:56.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:56.352 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:56.352 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:07:56.352 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:07:56.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:07:56.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:07:56.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:56.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:56.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:56.358 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:07:56.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:07:56.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:07:56.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:07:56.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:07:56.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:56.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:56.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:56.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:07:56.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:07:56.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:07:56.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:07:56.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:07:56.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:56.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:07:56.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:56.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:07:56.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:07:56.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:07:56.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:07:56.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:07:56.367 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:07:56.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:07:56.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:07:56.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:07:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:07:56.893 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:07:56.895 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:07:56.897 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:07:56.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:07:56.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:07:56.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:07:56.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:07:56.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:07:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:07:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:07:56.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:07:56.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:07:56.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:07:56.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:07:56.938 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:07:56.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:56.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:07:56.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:07:56.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:07:56.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:56.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:56.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:56.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:56.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:07:56.938 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:01.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:08:01.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:08:01.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:01.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:01.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:01.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:01.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:01.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:01.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:01.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:01.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:08:01.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:08:01.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:08:01.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:01.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:01.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:01.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:08:01.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:01.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:08:01.968 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:08:01.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:08:01.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:01.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:01.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:01.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:08:01.969 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:01.969 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:08:01.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:08:01.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:08:01.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:01.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:01.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:01.972 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:08:01.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:01.972 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:08:01.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:08:01.977 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:08:01.978 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:08:01.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:08:01.980 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:08:01.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:06.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:08:06.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:08:06.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:06.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:06.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:06.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:06.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:06.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:06.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:06.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:06.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:08:06.999 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:08:07.000 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:08:07.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:07.000 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:07.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:07.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:08:07.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:07.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:08:07.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:08:07.004 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:08:07.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:07.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:07.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:07.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:08:07.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:07.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:08:07.008 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:08:07.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:08:07.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:07.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:07.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:07.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:08:07.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:07.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:08:07.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:08:07.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:08:07.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:08:07.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:08:07.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:08:07.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:08:07.013 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:08:07.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:07.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:08:07.502 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:08:07.541 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:08:07.543 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:08:07.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:07.546 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:08:07.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:07.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:07.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:07.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:07.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:07.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:07.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:07.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:07.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:07.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:07.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:07.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:07.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:07.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:08:08.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:08.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:08.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:08.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:08.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:08:08.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:08.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:08.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:08.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:08.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:08.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:08.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:08.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:08.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:08.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:08.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:08.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:08.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:08.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:08.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:08.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:08.935 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:08:09.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:09.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:09.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:09.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:09.413 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:08:09.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:09.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:09.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:09.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:09.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:09.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:09.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:09.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:09.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:09.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:09.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:09.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:09.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:09.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:09.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:09.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:09.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:09.890 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:08:10.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:10.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:10.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:10.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:10.368 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:08:10.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:10.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:10.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:10.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:10.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:10.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:10.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:10.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:10.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:10.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:10.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:10.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:10.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:10.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:10.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:10.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:10.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:10.845 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:08:11.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:11.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:11.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:11.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:11.322 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:08:11.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:11.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:11.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:11.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:11.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:11.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:11.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:11.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:11.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:11.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:11.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:11.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:11.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:11.568 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:11.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:11.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:11.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:11.800 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:08:12.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:12.020 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:12.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:12.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:12.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:12.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:12.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:12.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:12.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:12.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:12.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:12.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:12.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:12.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:12.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:12.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:12.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:12.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:12.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:12.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:12.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:12.278 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:08:12.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:12.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:12.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:12.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:12.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:12.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:12.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:12.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:12.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:12.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:12.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:12.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:12.755 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:08:12.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:12.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:12.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:12.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:12.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:13.233 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:08:13.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:13.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:13.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:13.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:13.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:13.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:13.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:13.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:13.379 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:13.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:13.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:13.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:13.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:13.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:13.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:13.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:13.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:13.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:13.710 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:08:14.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:14.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:14.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:14.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:14.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:14.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:14.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:14.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:14.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:14.046 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:14.046 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:14.046 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:14.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:14.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:14.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:14.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:14.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:14.188 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:08:14.666 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:08:14.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:14.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:14.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:14.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:14.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:14.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:14.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:14.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:14.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:14.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:14.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:14.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:14.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:14.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:14.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:14.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:14.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:14.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:15.144 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:08:15.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:15.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:15.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:15.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:15.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:15.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:15.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:15.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:15.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:15.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:15.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:15.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:15.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:15.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:15.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:15.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:15.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:15.622 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:08:15.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:15.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:15.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:15.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:15.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:15.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:15.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:15.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:15.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:15.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:15.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:15.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:16.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:16.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:16.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:16.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:16.099 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:08:16.577 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:08:16.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:16.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:16.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:16.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:16.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:16.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:16.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:16.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:16.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:16.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:16.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:16.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:16.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:16.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:16.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:16.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:16.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:17.055 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:08:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:08:17.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:17.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:17.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:17.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:17.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:17.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:17.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:17.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:17.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:17.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:17.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:17.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:17.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:17.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:17.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:17.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:17.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:18.010 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:08:18.487 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:08:18.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:18.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:18.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:18.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:18.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:18.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:18.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:18.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:18.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:18.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:18.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:18.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:18.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:18.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:18.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:18.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:18.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:18.965 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:08:19.443 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:08:19.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:19.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:19.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:19.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:19.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:19.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:19.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:19.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:19.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:19.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:19.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:19.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:19.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:19.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:19.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:19.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:19.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:19.920 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:08:20.398 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:08:20.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:20.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:20.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:20.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:20.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:20.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:20.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:20.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:20.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:20.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:20.487 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:20.487 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:20.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:20.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:20.546 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:20.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:20.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:20.875 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:08:21.353 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:08:21.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:21.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:21.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:21.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:21.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:21.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:21.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:21.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:21.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:21.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:21.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:21.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:21.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:21.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:21.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:21.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:21.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:21.832 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:08:22.309 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:08:22.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:22.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:22.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:22.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:22.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:22.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:22.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:22.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:22.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:22.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:22.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:22.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:22.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:22.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:22.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:22.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:22.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:22.786 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:08:23.264 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:08:23.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:23.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:23.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:23.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:23.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:23.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:23.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:23.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:23.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:23.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:23.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:23.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:23.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:23.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:23.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:23.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:23.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:23.742 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:08:24.219 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:08:24.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:24.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:24.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:24.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:24.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:24.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:24.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:24.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:24.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:24.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:24.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:08:24.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:08:24.372 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3706 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3706 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:24.372 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:29.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:08:29.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:08:29.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:29.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:29.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:29.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:29.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:29.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:29.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:29.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:29.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:08:29.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:08:29.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:08:29.391 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:29.391 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:29.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:29.392 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:08:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:29.392 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:08:29.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:08:29.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:08:29.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:29.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:29.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:29.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:08:29.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:29.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:08:29.397 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:08:29.397 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:08:29.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:29.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:29.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:29.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:08:29.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:29.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.400 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:08:29.400 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:08:29.400 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:08:29.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:29.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:29.405 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:08:29.890 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:08:29.931 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:08:29.934 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:08:29.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:29.936 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:08:29.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:29.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:29.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:29.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:29.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:29.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:29.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:29.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:29.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:29.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:29.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:29.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:29.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:30.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:30.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:30.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:30.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:30.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:30.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:30.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:30.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:30.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:30.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:30.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:30.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:30.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.367 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:08:30.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:30.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:30.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:30.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:30.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:30.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:30.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:30.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:30.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:30.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:30.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:30.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:30.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:30.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:30.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:30.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:30.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:30.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:30.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:30.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:30.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:30.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:08:30.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:30.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:30.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:08:30.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:08:30.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:30.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:08:30.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:08:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:30.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:08:31.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:08:31.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:08:31.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:08:31.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:08:31.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:08:31.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:08:31.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:08:31.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:08:31.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:31.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:31.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:31.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:31.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:08:31.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:08:31.030 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:08:31.030 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:31.030 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:31.030 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:31.030 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:31.030 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:31.030 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:31.030 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:08:36.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:08:36.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:08:36.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:36.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:36.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:36.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:36.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:08:36.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:36.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:36.046 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:08:36.046 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:08:36.049 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:08:36.049 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:08:36.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:36.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:36.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:08:36.050 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:08:36.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:08:36.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:08:36.052 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:08:36.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:08:36.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:36.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:36.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:08:36.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:08:36.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:08:36.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:08:36.056 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:08:36.056 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:08:36.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:36.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:08:36.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:08:36.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:08:36.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:08:36.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:08:36.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:08:36.061 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:08:36.061 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:08:36.061 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:08:36.066 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:08:36.551 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:08:37.030 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:08:37.508 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:08:37.989 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:08:38.466 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:08:38.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:08:39.426 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:08:39.904 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:08:40.382 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:08:40.859 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:08:41.338 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:08:41.815 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:08:42.294 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:08:42.771 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:08:43.249 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:08:43.727 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:08:44.204 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:08:44.682 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:08:45.160 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:08:45.639 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:08:46.117 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:08:46.596 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:08:47.074 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:08:47.552 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:08:48.029 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:08:48.507 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:08:48.987 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:08:49.469 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:08:49.946 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:08:50.424 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:08:50.902 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:08:51.379 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:08:51.857 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:08:52.335 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:08:52.813 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:08:53.291 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:08:53.769 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:08:54.249 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:08:54.728 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:08:55.207 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:08:55.683 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:08:56.163 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:08:56.641 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:08:57.119 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:08:57.597 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:08:58.077 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:08:58.555 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:08:59.033 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:08:59.510 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:08:59.987 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:09:00.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:09:00.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:09:00.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:09:00.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:09:00.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:09:00.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:09:00.084 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:00.085 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:09:05.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:09:05.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:09:05.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:09:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:09:05.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:09:05.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:09:05.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:09:05.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:09:05.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:05.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:09:05.089 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:09:05.090 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:09:05.090 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:09:05.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:09:05.091 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:09:05.091 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:09:05.091 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:09:05.092 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:09:05.092 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:09:05.092 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:09:05.092 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:09:05.092 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:05.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:09:05.093 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:09:05.093 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:09:05.093 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:09:05.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:09:05.094 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:09:05.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:09:05.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:05.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:09:05.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:09:06.041 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:09:06.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:09:06.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:09:07.456 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:09:07.928 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:09:08.399 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:09:08.870 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:09:09.341 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:09:09.811 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:09:10.285 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:09:10.762 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:09:11.234 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:09:11.709 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:09:12.182 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:09:12.652 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:09:13.127 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:09:13.604 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:09:14.081 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:09:14.559 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:09:15.036 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:09:15.512 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:09:15.989 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:09:16.466 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:09:16.940 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:09:17.417 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:09:17.893 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:09:18.369 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:09:18.846 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:09:19.322 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:09:19.793 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:09:20.263 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:09:20.736 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:09:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:09:21.673 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:09:22.143 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:09:22.618 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:09:23.093 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:09:23.563 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:09:24.032 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:09:24.502 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:09:24.974 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:09:25.443 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:09:25.912 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:09:26.383 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:09:26.851 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:09:27.328 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:09:27.806 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:09:28.275 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:09:28.744 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:09:29.214 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:09:29.690 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:09:30.160 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:09:30.631 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:09:31.103 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:09:31.574 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:09:32.043 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:09:32.516 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:09:32.988 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:09:33.459 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:09:33.929 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:09:34.406 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:09:34.880 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:09:35.358 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:09:35.829 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:09:36.301 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:09:36.773 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:09:37.245 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:09:37.724 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:09:38.203 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:09:38.676 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:09:39.146 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:09:39.618 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:09:40.091 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:09:40.562 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:09:41.033 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:09:41.504 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:09:41.974 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:09:42.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:42.446 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:09:42.920 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:09:43.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:43.393 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:09:43.867 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:09:44.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:44.339 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:09:44.811 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:09:45.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:45.288 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:09:45.764 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:09:46.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:46.234 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:09:46.706 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:09:47.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:47.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:09:47.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:09:47.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:09:47.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:09:47.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:09:47.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:09:47.127 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:09:52.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:09:52.128 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:09:52.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:09:52.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:09:52.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:09:52.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:09:52.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:09:52.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:09:52.146 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:52.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:09:52.146 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:09:52.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:09:52.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:09:52.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:09:52.148 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:52.148 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:09:52.148 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:09:52.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:09:52.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:09:52.150 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:09:52.150 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:09:52.150 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:09:52.150 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:52.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:09:52.150 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:09:52.151 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:09:52.151 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:09:52.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:09:52.152 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:09:52.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:09:52.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:09:52.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:09:52.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:09:52.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:09:52.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:09:52.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:09:52.155 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:09:52.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:09:52.633 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:09:52.669 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:09:52.670 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:09:52.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:09:52.670 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:09:52.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:09:52.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:09:52.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:09:52.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:09:52.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:09:52.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:09:52.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:09:52.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:09:52.722 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:09:52.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:09:52.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:09:52.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:09:52.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:09:52.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:09:53.107 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:09:53.109 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:09:53.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:53.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:09:53.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:09:53.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:09:53.581 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:09:54.055 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:09:54.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:09:54.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:54.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:09:54.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:09:54.531 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:09:55.006 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:09:55.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:09:55.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:55.159 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:09:55.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:09:55.480 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:09:55.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:09:56.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:56.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:09:56.160 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:09:56.160 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:09:56.427 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:09:56.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:09:56.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:09:56.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:09:56.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:09:56.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:09:56.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:09:56.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:09:56.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:09:56.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:09:56.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:09:56.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:09:56.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:09:56.516 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:09:56.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:09:56.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:09:56.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:09:56.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:09:56.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:09:56.900 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:09:57.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:09:57.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:09:57.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:09:57.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:09:57.219 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:09:57.377 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:09:57.853 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:09:58.327 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:09:58.799 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:09:59.271 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:09:59.746 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:10:00.221 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:10:00.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:00.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:00.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:00.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:00.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:00.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:00.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:00.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:00.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:00.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:00.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:00.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:00.640 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:00.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:00.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:00.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:00.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:00.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:00.695 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:10:01.129 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:01.171 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:10:01.644 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:10:02.120 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:10:02.593 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:10:03.066 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:10:03.541 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:10:04.018 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:10:04.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:04.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:04.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:04.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:04.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:04.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:04.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:04.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:04.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:04.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:04.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:04.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:04.485 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:04.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:04.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:04.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:04.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:04.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:04.495 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:10:04.886 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:04.972 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:10:05.362 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:05.450 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:10:05.927 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:10:06.317 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:06.406 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:10:06.883 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:10:07.360 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:10:07.839 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:10:08.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:08.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:08.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:08.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:08.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:08.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:08.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:08.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:08.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:10:08.246 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:10:08.246 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:10:08.246 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:08.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:10:08.246 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:10:08.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:08.246 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:13.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:10:13.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:10:13.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:10:13.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:10:13.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:10:13.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:10:13.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:10:13.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:10:13.249 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:13.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:10:13.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:10:13.250 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:10:13.250 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:10:13.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:10:13.250 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:13.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:10:13.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:10:13.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:10:13.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:10:13.251 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:10:13.251 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:10:13.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:10:13.251 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:13.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:10:13.251 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:10:13.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:10:13.251 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:10:13.252 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:10:13.252 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:10:13.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:10:13.252 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:13.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:10:13.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:10:13.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:10:13.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:10:13.253 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:10:13.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:10:13.254 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:10:13.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:13.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:13.258 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:10:13.733 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:10:13.784 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:10:13.786 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:13.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:13.788 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:10:13.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:13.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:13.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:13.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:13.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:13.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:13.829 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:13.829 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:13.873 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:13.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:13.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:13.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:13.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:13.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:14.206 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:10:14.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:14.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:14.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:14.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:14.682 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:10:14.698 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:14.700 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:15.157 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:10:15.178 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:15.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:15.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:15.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:15.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:10:15.665 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:16.105 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:10:16.145 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:16.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:16.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:16.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:16.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:16.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:10:16.632 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:17.054 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:10:17.112 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:17.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:17.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:17.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:17.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:17.529 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:10:17.600 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:18.004 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:10:18.080 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:18.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:18.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:18.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:18.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:18.479 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:10:18.569 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:18.953 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:10:19.049 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:19.425 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:10:19.528 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:19.900 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:10:20.016 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:20.375 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:10:20.497 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:20.848 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:10:20.982 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:21.323 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:10:21.464 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:21.797 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:10:21.950 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:21.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:21.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:21.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:21.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:21.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:21.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:21.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:21.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:21.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:21.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:21.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:21.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:21.978 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:21.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:21.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:21.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:21.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:21.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:22.271 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:10:22.672 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:22.675 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:22.746 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:10:23.159 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:23.219 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:10:23.639 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:23.693 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:10:24.125 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:24.169 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:10:24.610 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:24.644 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:10:25.090 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:25.119 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:10:25.579 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:25.594 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:10:26.059 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:26.069 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:10:26.537 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:10:26.541 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:27.009 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:10:27.021 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:27.483 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:10:27.506 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:27.957 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:10:27.986 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:28.432 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:10:28.475 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:28.907 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:10:28.955 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:29.382 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:10:29.443 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:29.856 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:10:29.923 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:29.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:29.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:29.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:29.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:29.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:29.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:29.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:29.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:29.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:29.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:29.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:29.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:29.942 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:29.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:29.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:29.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:29.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:29.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:30.288 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:30.288 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:30.330 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:10:30.764 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:30.803 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:10:31.237 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:31.279 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:10:31.715 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:31.752 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:10:32.186 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:32.227 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:10:32.663 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:32.701 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:10:33.133 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:33.176 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:10:33.612 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:33.651 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:10:34.083 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:34.126 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:10:34.561 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:34.601 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:10:35.032 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:35.076 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:10:35.512 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:35.551 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:10:35.983 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:36.024 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:10:36.460 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:36.500 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:10:36.931 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:36.977 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:10:37.412 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:37.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:37.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:37.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:37.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:37.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:37.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:37.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:37.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:37.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:37.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:37.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:37.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:37.444 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:37.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:37.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:37.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:37.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:37.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:10:37.841 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:37.842 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:37.927 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:10:38.311 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:38.312 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:38.403 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:10:38.793 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:38.876 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:10:39.263 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:39.266 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:10:39.352 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:10:39.742 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:39.830 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:10:40.220 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:40.307 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:10:40.697 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:40.786 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:10:41.176 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:10:41.654 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:41.741 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:10:42.131 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:42.219 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:10:42.609 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:42.698 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:10:43.088 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:43.176 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:10:43.566 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:43.654 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:10:44.044 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:44.130 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:10:44.521 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:44.608 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:10:44.998 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:45.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:45.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:45.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:45.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:45.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:45.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:45.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:45.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:45.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:10:45.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:10:45.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:10:45.014 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:10:45.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:10:45.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:45.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:50.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:10:50.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:10:50.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:10:50.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:10:50.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:10:50.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:10:50.028 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:10:50.029 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:10:50.029 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:50.030 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:10:50.030 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:10:50.033 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:10:50.033 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:10:50.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:10:50.034 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:50.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:10:50.034 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:10:50.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:10:50.034 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:10:50.037 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:10:50.037 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:10:50.037 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:10:50.037 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:50.037 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:10:50.038 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:10:50.038 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:10:50.038 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:10:50.040 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:10:50.040 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:10:50.040 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:10:50.040 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:10:50.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:10:50.040 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:10:50.041 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:10:50.041 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:10:50.044 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:10:50.044 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:10:50.044 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:10:50.045 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:10:50.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:10:50.049 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:10:50.532 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:10:50.573 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:10:50.575 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:10:50.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:50.576 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:10:50.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:50.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:50.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:50.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:50.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:50.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:50.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:50.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:50.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:50.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:50.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:50.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:50.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:51.010 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:10:51.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:51.488 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:10:51.965 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:10:52.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:52.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:52.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:52.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:52.444 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:10:52.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:52.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:52.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:52.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:52.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:52.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:52.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:52.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:52.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:52.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:52.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:52.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:52.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:52.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:52.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:52.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:52.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:52.921 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:10:53.049 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:53.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:53.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:53.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:53.399 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:10:53.876 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:10:54.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:54.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:54.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:54.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:54.354 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:10:54.832 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:10:54.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:54.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:54.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:54.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:54.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:54.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:54.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:10:54.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:54.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:54.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:54.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:10:54.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:10:54.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:54.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:10:54.932 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:10:54.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:54.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:55.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:55.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:55.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:55.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:55.310 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:10:55.788 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:10:56.266 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:10:56.744 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:10:57.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:10:57.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:10:57.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:10:57.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:10:57.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:10:57.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:10:57.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:10:57.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:10:57.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:10:57.041 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:10:57.041 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:10:57.041 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:10:57.041 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1494 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:57.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:10:57.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:10:57.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:10:57.041 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:57.041 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:57.041 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:10:57.041 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:02.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:02.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:02.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:02.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:02.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:02.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:02.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:02.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:02.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:02.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:02.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:11:02.051 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:11:02.051 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:11:02.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:02.051 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:02.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:02.052 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:11:02.052 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:02.052 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:11:02.055 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:11:02.055 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:11:02.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:02.055 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:02.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:02.055 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:11:02.055 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:02.055 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:11:02.058 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:11:02.058 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:11:02.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:02.058 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:02.058 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:02.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:11:02.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:02.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:11:02.063 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:11:02.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:11:02.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:11:02.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:11:02.063 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:11:02.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:11:02.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:11:02.064 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:11:02.064 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:11:02.064 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:02.065 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:02.066 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:02.069 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:11:02.552 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:11:02.602 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:11:02.604 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:11:02.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:02.607 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:11:02.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:02.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:02.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:02.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:02.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:02.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:02.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:02.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:02.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:02.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:02.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:02.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:02.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:03.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:11:03.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:03.069 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:03.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:03.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:03.507 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:11:03.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:11:04.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:04.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:04.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:04.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:04.463 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:11:04.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:04.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:04.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:04.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:04.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:04.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:04.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:04.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:04.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:04.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:04.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:04.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:04.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:04.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:04.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:04.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:04.941 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:11:05.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:05.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:05.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:05.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:05.419 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:11:05.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:11:06.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:06.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:06.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:06.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:06.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:11:06.852 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:11:06.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:06.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:06.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:06.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:06.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:06.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:06.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:06.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:06.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:06.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:06.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:06.908 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:11:06.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:06.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:06.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:06.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:06.910 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1034 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:11.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:11.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:11.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:11.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:11.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:11.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:11.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:11.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:11.916 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:11.916 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:11.916 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:11:11.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:11:11.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:11:11.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:11.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:11.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:11.920 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:11:11.920 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:11.920 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:11:11.923 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:11:11.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:11:11.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:11.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:11.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:11.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:11:11.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:11.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:11:11.927 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:11:11.927 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:11:11.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:11.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:11.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:11.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:11:11.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:11.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:11:11.931 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:11:11.932 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:11:11.932 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:11:11.932 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:11.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:11.937 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:11:12.417 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:11:12.466 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:11:12.468 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:11:12.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:12.470 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:11:12.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:12.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:12.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:12.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:12.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:12.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:12.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:12.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:12.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:12.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:12.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:12.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:12.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:12.894 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:11:12.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:12.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:12.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:12.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:13.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:11:13.849 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:11:13.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:13.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:13.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:13.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:14.327 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:11:14.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:14.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:14.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:14.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:14.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:14.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:14.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:14.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:14.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:14.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:14.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:14.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:14.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:14.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:14.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:14.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:14.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:14.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:11:14.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:14.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:14.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:14.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:15.282 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:11:15.760 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:11:15.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:15.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:15.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:15.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:16.238 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:11:16.716 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:11:16.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:16.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:16.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:16.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:16.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:16.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:16.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:16.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:16.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:16.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:16.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:16.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:16.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:16.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:16.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:16.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:16.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:16.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:16.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:17.193 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:11:17.671 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:11:18.149 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:11:18.627 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:11:18.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:18.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:18.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:18.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:18.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:18.902 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:18.902 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:18.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:18.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:18.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:18.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:18.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:18.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:18.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:18.904 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1489 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1489 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1489 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1489 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1489 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:18.904 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1490 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:23.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:23.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:23.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:23.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:23.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:23.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:23.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:23.924 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:23.924 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:23.924 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:23.924 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:11:23.926 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:11:23.927 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:11:23.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:23.927 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:23.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:23.927 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:11:23.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:23.927 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:11:23.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:11:23.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:11:23.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:23.929 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:23.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:23.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:11:23.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:23.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:11:23.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:11:23.932 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:11:23.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:23.932 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:23.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:23.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:11:23.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:23.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:11:23.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:11:23.936 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:11:23.936 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:11:23.936 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:23.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:11:24.425 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:11:24.470 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:11:24.472 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:11:24.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:24.475 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:11:24.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:24.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:24.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:24.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:24.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:24.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:24.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:24.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:24.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:24.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:24.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:24.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:24.902 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:11:24.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:24.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:24.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:24.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:25.380 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:11:25.858 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:11:25.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:25.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:25.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:25.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:26.336 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:11:26.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:26.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:26.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:26.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:26.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:26.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:26.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:26.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:26.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:26.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:26.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:26.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:26.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:26.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:26.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:26.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:26.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:26.813 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:11:26.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:26.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:26.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:26.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:27.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:11:27.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:11:27.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:27.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:27.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:27.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:28.247 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:11:28.725 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:11:28.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:28.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:28.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:28.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:28.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:28.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:28.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:28.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:28.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:28.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:28.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:28.780 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:11:28.780 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1033 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:28.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:28.781 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1033 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:33.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:33.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:33.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:33.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:33.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:33.785 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:33.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:33.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:33.796 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:33.796 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:33.796 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:11:33.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:11:33.799 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:11:33.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:33.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:33.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:33.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:11:33.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:33.800 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:11:33.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:11:33.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:11:33.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:33.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:33.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:33.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:11:33.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:33.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:11:33.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:11:33.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:11:33.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:33.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:33.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:33.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:11:33.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:33.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:11:33.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:11:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:11:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:11:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:11:33.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:11:33.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:11:33.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:11:33.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:11:33.809 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:11:33.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:33.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:33.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:11:34.297 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:11:34.342 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:11:34.343 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:11:34.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:34.344 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:11:34.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:34.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:34.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:34.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:34.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:34.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:34.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:34.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:34.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:34.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:34.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:34.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:34.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:34.775 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:11:34.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:34.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:34.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:34.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:35.253 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:11:35.731 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:11:35.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:35.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:35.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:35.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:36.209 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:11:36.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:36.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:36.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:36.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:36.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:36.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:36.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:36.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:36.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:36.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:36.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:36.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:36.601 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:11:36.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:36.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:36.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:11:41.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:41.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:41.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:41.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:41.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:41.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:41.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:41.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:41.609 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:41.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:41.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:11:41.612 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:11:41.612 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:11:41.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:41.613 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:41.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:41.613 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:11:41.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:41.613 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:11:41.615 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:11:41.615 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:11:41.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:41.615 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:41.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:41.616 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:11:41.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:41.616 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:11:41.617 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:11:41.617 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:11:41.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:41.618 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:41.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:41.618 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:11:41.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:41.618 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:11:41.621 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:11:41.621 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:11:41.621 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:41.626 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:11:42.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:11:42.154 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:11:42.156 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:11:42.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:42.158 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:11:42.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:42.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:42.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:42.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:42.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:42.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:42.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:42.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:42.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:42.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:42.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:42.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:42.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:42.586 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:11:42.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:42.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:42.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:42.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:43.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:11:43.542 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:11:43.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:43.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:43.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:43.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:44.020 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:11:44.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:44.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:44.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:44.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:44.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:44.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:44.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:44.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:44.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:44.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:44.402 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:44.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:44.402 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:44.402 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:44.402 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:11:49.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:49.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:49.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:49.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:49.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:49.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:49.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:49.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:49.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:49.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:49.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:11:49.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:11:49.424 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:11:49.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:49.424 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:49.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:49.424 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:11:49.424 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:49.425 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:11:49.426 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:11:49.426 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:11:49.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:49.426 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:49.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:49.426 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:11:49.426 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:49.426 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:11:49.427 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:11:49.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:11:49.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:49.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:49.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:49.428 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:11:49.428 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:49.428 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:11:49.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:11:49.430 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:11:49.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:49.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:49.435 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:11:49.919 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:11:49.958 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:11:49.960 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:11:49.962 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:11:49.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:49.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:49.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:49.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:50.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:50.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:50.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:50.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:50.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:50.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:50.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:50.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.396 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:11:50.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:50.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:50.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:50.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:50.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:50.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:50.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:50.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:50.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:50.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:50.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:50.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:50.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:50.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:50.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:50.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:50.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:50.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:50.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:50.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:50.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:50.873 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:11:50.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:50.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:50.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:50.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:50.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:50.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:50.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:50.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:50.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:50.882 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:11:50.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:55.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:55.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:55.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:55.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:55.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:55.889 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:55.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:55.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:55.898 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:55.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:11:55.898 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:11:55.900 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:11:55.900 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:11:55.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:55.901 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:55.901 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:55.901 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:11:55.901 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:11:55.901 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:11:55.903 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:11:55.903 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:11:55.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:55.903 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:55.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:55.903 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:11:55.903 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:11:55.903 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:11:55.904 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:11:55.905 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:11:55.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:55.905 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:11:55.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:11:55.905 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:11:55.905 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:11:55.905 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:11:55.907 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:11:55.907 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:11:55.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:11:55.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:11:55.912 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:11:56.391 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:11:56.435 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:11:56.438 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:11:56.440 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:11:56.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:56.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:56.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:56.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:56.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:56.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:56.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:56.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:56.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:56.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:56.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:56.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:56.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:56.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:56.868 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:11:56.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:56.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:56.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:56.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:56.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:56.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:56.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:56.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:56.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:56.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:11:56.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:56.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:56.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:56.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:11:56.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:11:56.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:56.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:11:56.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:11:56.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:56.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:57.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:11:57.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:11:57.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:11:57.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:11:57.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:11:57.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:11:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:11:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:11:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:11:57.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:11:57.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:11:57.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:11:57.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:11:57.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:11:57.348 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:11:57.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:02.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:02.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:02.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:02.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:02.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:02.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:02.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:02.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:02.365 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:02.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:02.365 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:02.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:02.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:02.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:02.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:02.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:02.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:02.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:02.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:02.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:02.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:02.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:02.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:02.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:02.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:02.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:02.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:02.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:02.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:02.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:02.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:02.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:02.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:02.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:02.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:02.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:02.382 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:02.382 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:02.382 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:02.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:02.387 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:02.871 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:02.914 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:02.916 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:02.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:02.918 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:02.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:02.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:02.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:02.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:02.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:02.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:02.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:02.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:03.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:03.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:03.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:03.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:03.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:03.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:03.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:03.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:03.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:03.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:03.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:03.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:03.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:03.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:03.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:03.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:03.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:03.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:03.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:03.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:03.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:03.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:03.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:03.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:03.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:03.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:03.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:12:03.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:03.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:03.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:03.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:03.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:03.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:03.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:03.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:03.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:03.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:03.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:03.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:03.941 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:03.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:03.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=332 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=332 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=332 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=332 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=332 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:03.941 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=333 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:08.941 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:08.941 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:08.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:08.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:08.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:08.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:08.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:08.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:08.954 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:08.954 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:08.954 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:08.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:08.956 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:08.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:08.956 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:08.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:08.956 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:08.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:08.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:08.959 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:08.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:08.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:08.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:08.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:08.959 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:08.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:08.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:08.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:08.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:08.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:08.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:08.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:08.962 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:08.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:08.962 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:08.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:08.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:08.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:08.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:08.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:08.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:08.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:08.966 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:08.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:08.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:09.455 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:09.498 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:09.500 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:09.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:09.503 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:09.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:09.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:09.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:09.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:09.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:09.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:09.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:09.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:09.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:09.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:09.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:09.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:09.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:09.933 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:09.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:09.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:09.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:09.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:10.410 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:12:10.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:12:10.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:10.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:10.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:10.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:11.366 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:12:11.844 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:12:11.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:11.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:11.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:11.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:12.322 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:12:12.800 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:12:12.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:12.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:12.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:12.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:13.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:12:13.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:13.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:13.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:13.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:13.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:13.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:13.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:13.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:13.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:13.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:13.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:13.609 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:13.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:18.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:18.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:18.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:18.615 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:18.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:18.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:18.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:18.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:18.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:18.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:18.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:18.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:18.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:18.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:18.630 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:18.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:18.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:18.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:18.631 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:18.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:18.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:18.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:18.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:18.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:18.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:18.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:18.635 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:18.637 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:18.637 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:18.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:18.637 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:18.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:18.637 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:18.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:18.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.640 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:18.640 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:18.640 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.640 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:18.645 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:19.183 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:19.184 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:19.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:19.188 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:19.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:19.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:19.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:19.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:19.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:19.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:19.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:19.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:19.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:19.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:19.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:19.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:19.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:19.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:19.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:19.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:19.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:19.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:19.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:19.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:19.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:19.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:19.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:19.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:19.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:19.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:19.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:19.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:19.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:19.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:19.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:19.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:19.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:19.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:19.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:19.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:19.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:19.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:19.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:19.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:19.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:19.786 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:19.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:19.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:19.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:19.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:19.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:19.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:24.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:24.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:24.789 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:24.790 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:24.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:24.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:24.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:24.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:24.803 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:24.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:24.803 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:24.807 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:24.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:24.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:24.808 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:24.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:24.809 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:24.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:24.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:24.812 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:24.812 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:24.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:24.812 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:24.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:24.813 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:24.813 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:24.813 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:24.815 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:24.815 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:24.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:24.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:24.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:24.816 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:24.816 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:24.816 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:24.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:24.820 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:24.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:24.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:24.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:24.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:25.308 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:25.352 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:25.354 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:25.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:25.355 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:25.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:25.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:25.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:25.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:25.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:25.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:25.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:25.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:25.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:25.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:25.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:25.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:25.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:25.785 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:25.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:25.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:25.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:25.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:26.264 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:12:26.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:12:26.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:26.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:26.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:26.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:27.220 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:12:27.699 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:12:27.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:27.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:27.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:27.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:28.176 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:12:28.654 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:12:28.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:28.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:28.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:28.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:29.132 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:12:29.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:29.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:29.465 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:29.465 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:29.465 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:34.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:34.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:34.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:34.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:34.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:34.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:34.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:34.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:34.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:34.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:34.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:34.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:34.507 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:34.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:34.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:34.508 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:34.508 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:34.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:34.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:34.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:34.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:34.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:34.513 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:34.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:34.513 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:34.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:34.513 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:34.516 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:34.517 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:34.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:34.517 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:34.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:34.517 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:34.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:34.518 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:34.521 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:34.522 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:34.522 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:34.522 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.522 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:34.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:34.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:34.527 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:35.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:35.057 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:35.059 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:35.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:35.061 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:35.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:35.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:35.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:35.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:35.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:35.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:35.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:35.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:35.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:35.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:35.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:35.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:35.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:35.488 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:35.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:35.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:35.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:35.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:35.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:35.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:35.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:35.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:35.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:35.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:35.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:35.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:35.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:35.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:35.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:35.895 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:35.896 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:35.896 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:35.896 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:35.896 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:35.896 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:35.896 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:35.896 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:40.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:40.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:40.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:40.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:40.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:40.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:40.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:40.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:40.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:40.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:40.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:40.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:40.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:40.917 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:40.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:40.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:40.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:40.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:40.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:40.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:40.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:40.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:40.922 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:40.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:40.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:40.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:40.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:40.924 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:40.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:40.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:40.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:40.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:40.925 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:40.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:40.925 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:40.928 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:40.928 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:40.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.928 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.929 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:40.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:40.933 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:41.412 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:41.446 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:41.446 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:41.447 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:41.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:41.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:41.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:41.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:41.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:41.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:41.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:41.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:41.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:41.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:41.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:41.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:41.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:41.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:41.890 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:41.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:41.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:41.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:41.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:42.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:42.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:42.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:42.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:42.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:42.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:42.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:42.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:42.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:42.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:42.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:42.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:42.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:42.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:42.300 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:42.300 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:42.300 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:42.300 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:42.300 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:42.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:42.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:47.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:47.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:47.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:47.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:47.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:47.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:47.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:47.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:47.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:47.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:47.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:47.312 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:47.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:47.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:47.313 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:47.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:47.313 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:47.313 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:47.313 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:47.315 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:47.315 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:47.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:47.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:47.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:47.316 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:47.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:47.316 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:47.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:47.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:47.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:47.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:47.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:47.318 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:47.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:47.318 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:47.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:47.323 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:47.323 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:47.323 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:47.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:47.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:47.328 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:47.808 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:47.851 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:47.853 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:47.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:47.855 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:47.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:47.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:47.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:47.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:47.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:47.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:47.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:47.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:47.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:47.955 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:47.955 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:47.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:47.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:48.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:48.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:48.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:48.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:48.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:48.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:48.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:48.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:48.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:48.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:48.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:48.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:48.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:48.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:48.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:48.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:48.693 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:48.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:53.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:53.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:53.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:53.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:53.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:53.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:53.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:53.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:53.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:53.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:12:53.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:12:53.706 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:12:53.707 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:12:53.707 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:53.707 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:53.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:53.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:12:53.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:12:53.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:12:53.710 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:12:53.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:12:53.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:53.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:53.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:53.711 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:12:53.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:12:53.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:12:53.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:12:53.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:12:53.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:53.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:12:53.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:12:53.713 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:12:53.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:12:53.713 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:12:53.716 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:12:53.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:12:53.717 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:12:53.717 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:12:53.717 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.717 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:12:53.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:12:53.722 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:12:54.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:12:54.246 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:12:54.248 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:12:54.250 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:12:54.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:54.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:54.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:54.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:12:54.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:54.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:54.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:54.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:12:54.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:12:54.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:54.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:12:54.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:12:54.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:54.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:54.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:12:54.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:54.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:54.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:54.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:55.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:12:55.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:12:55.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:12:55.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:12:55.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:12:55.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:12:55.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:12:55.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:12:55.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:12:55.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:12:55.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:12:55.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:12:55.230 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:12:55.230 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:12:55.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:12:55.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:12:55.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:00.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:00.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:00.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:00.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:00.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:00.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:00.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:00.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:00.245 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:00.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:00.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:13:00.248 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:13:00.248 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:13:00.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:00.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:00.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:00.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:13:00.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:00.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:13:00.250 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:13:00.250 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:13:00.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:00.250 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:00.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:00.251 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:13:00.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:00.251 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:13:00.252 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:13:00.253 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:13:00.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:00.253 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:00.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:00.253 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:13:00.253 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:00.253 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:13:00.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:13:00.256 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:13:00.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:00.261 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:13:00.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:13:00.788 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:13:00.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:00.791 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:13:00.793 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:13:00.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:00.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:00.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:13:00.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:00.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:00.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:00.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:13:00.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:13:00.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:00.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:00.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:00.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:00.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:01.222 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:13:01.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:01.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:01.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:01.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:01.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:01.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:01.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:01.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:01.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:01.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:01.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:01.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:01.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:01.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:01.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:01.628 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:13:01.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:01.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:01.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:01.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=293 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:01.629 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:06.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:06.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:06.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:06.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:06.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:06.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:06.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:06.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:06.647 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:06.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:06.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:13:06.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:13:06.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:13:06.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:06.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:06.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:06.649 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:13:06.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:06.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:13:06.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:13:06.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:13:06.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:06.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:06.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:06.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:13:06.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:06.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:13:06.651 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:13:06.651 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:13:06.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:06.652 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:06.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:06.652 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:13:06.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:06.652 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.653 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:13:06.653 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:13:06.653 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:13:06.654 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:06.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:06.658 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:13:07.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:13:07.174 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:13:07.174 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:13:07.175 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:13:07.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:07.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:07.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:07.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:13:07.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:07.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:07.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:07.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:13:07.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:13:07.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:07.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:07.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:07.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:07.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:07.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:13:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:07.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:07.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:07.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:08.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:13:08.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:08.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:08.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:08.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:08.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:08.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:08.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:08.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:08.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:08.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:08.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:08.166 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:13:08.166 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=322 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:08.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:08.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=322 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=322 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=322 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.167 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:08.168 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:13.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:13.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:13.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:13.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:13.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:13.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:13.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:13.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:13.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:13.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:13.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:13:13.176 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:13:13.176 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:13:13.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:13.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:13.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:13.177 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:13:13.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:13.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:13:13.180 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:13:13.180 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:13:13.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:13.180 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:13.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:13.180 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:13:13.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:13.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:13:13.183 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:13:13.183 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:13:13.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:13.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:13.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:13.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:13:13.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:13.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:13:13.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:13:13.187 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:13:13.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:13.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:13.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:13:13.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:13:13.722 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:13:13.724 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:13:13.726 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:13:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:13.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:13.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:13.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:13:13.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:13.757 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:13.757 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:13.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:13:13.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:13:14.153 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:13:14.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:14.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:14.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:14.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:14.630 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:13:14.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:14.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:14.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:14.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:14.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:14.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:14.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:13:14.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:14.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:14.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:14.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:13:14.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:13:15.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:13:15.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:15.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:15.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:15.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:15.586 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:13:15.971 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:13:16.063 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:13:16.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:13:16.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:16.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:16.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:16.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:16.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:16.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:16.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:16.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:16.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:16.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:16.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:16.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:16.117 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:13:16.118 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:16.118 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:16.118 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:16.118 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:16.118 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:21.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:21.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:21.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:21.118 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:21.118 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:21.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:21.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:21.126 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:21.127 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:21.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:21.127 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:13:21.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:13:21.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:13:21.130 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:21.130 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:21.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:21.130 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:13:21.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:21.131 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:13:21.132 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:13:21.132 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:13:21.132 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:21.132 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:21.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:21.132 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:13:21.133 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:21.133 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:13:21.134 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:13:21.135 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:13:21.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:21.135 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:21.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:21.135 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:13:21.135 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:21.135 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:13:21.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:13:21.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:13:21.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:13:21.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:13:21.137 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:13:21.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:13:21.138 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:13:21.138 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:21.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:21.143 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:13:21.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:13:21.669 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:13:21.671 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:13:21.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:21.674 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:13:21.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:21.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:21.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:13:21.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:21.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:21.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:21.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:13:21.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:13:22.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:13:22.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:22.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:22.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:22.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:22.582 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:13:23.059 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:13:23.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:23.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:23.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:23.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:23.536 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:13:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:13:24.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:24.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:24.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:24.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:24.491 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:13:24.968 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:13:25.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:25.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:25.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:25.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:25.446 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:13:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:13:26.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:26.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:26.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:26.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:26.401 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:13:26.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:13:26.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:26.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:26.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:26.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:26.879 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:13:27.358 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:13:27.837 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:13:28.315 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:13:28.792 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:13:29.270 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:13:29.748 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:13:30.226 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:13:30.705 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:13:31.183 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:13:31.661 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:13:32.139 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:13:32.617 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:13:33.095 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:13:33.574 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:13:34.054 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:13:34.533 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:13:35.011 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:13:35.489 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:13:35.967 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:13:36.446 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:13:36.925 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:13:37.402 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:13:37.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:13:37.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:37.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:37.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:37.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:37.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:37.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:37.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:37.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:37.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:37.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:37.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:37.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:37.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:37.664 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:13:37.665 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3526 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:37.665 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3526 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:37.665 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3526 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:37.665 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3526 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:37.665 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3526 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:37.665 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3526 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:42.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:42.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:42.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:42.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:42.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:42.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:42.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:42.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:42.684 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:42.684 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:42.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:13:42.690 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:13:42.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:13:42.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:42.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:42.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:42.691 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:13:42.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:42.692 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:13:42.694 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:13:42.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:13:42.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:42.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:42.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:42.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:13:42.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:42.696 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:13:42.698 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:13:42.698 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:13:42.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:42.698 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:42.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:42.698 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:13:42.698 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:42.698 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:13:42.702 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:13:42.702 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:13:42.702 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:42.707 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:13:43.190 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:13:43.231 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:13:43.233 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:13:43.234 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:13:43.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:43.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:43.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:43.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:13:43.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:43.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:43.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:43.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:13:43.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:13:43.668 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:13:43.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:43.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:43.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:43.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:44.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:13:44.622 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:13:44.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:44.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:44.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:44.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:45.100 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:13:45.578 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:13:45.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:45.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:45.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:45.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:46.055 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:13:46.533 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:13:46.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:46.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:46.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:46.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:47.011 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:13:47.489 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:13:47.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:47.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:47.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:47.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:47.967 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:13:47.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:13:47.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:47.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:47.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:47.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:48.445 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:13:48.924 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:13:49.403 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:13:49.881 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:13:50.359 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:13:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:13:51.314 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:13:51.792 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:13:52.270 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:13:52.764 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:13:53.242 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:13:53.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:13:53.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:53.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:53.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:53.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:53.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:53.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:53.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:53.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:53.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:53.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:53.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:53.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:53.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:53.391 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:13:53.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2278 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:53.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:53.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:53.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:53.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:53.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:53.392 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:13:58.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:13:58.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:13:58.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:58.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:58.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:58.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:58.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:13:58.406 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:58.406 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:58.406 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:13:58.407 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:13:58.411 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:13:58.412 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:13:58.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:58.412 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:58.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:13:58.413 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:13:58.413 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:13:58.413 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:13:58.416 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:13:58.416 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:13:58.416 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:58.416 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:58.416 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:13:58.417 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:13:58.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:13:58.417 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:13:58.419 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:13:58.419 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:13:58.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:58.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:13:58.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:13:58.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:13:58.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:13:58.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:13:58.423 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:13:58.423 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:13:58.423 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:13:58.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:13:58.428 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:13:58.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:13:58.953 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:13:58.955 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:13:58.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:13:58.957 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:13:58.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:13:58.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:13:58.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:13:58.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:13:58.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:13:58.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:13:58.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:13:58.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:13:59.388 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:13:59.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:13:59.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:13:59.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:13:59.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:13:59.866 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:14:00.343 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:14:00.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:00.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:00.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:00.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:00.821 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:14:01.298 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:14:01.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:01.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:01.776 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:14:02.254 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:14:02.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:02.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:02.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:02.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:02.731 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:14:03.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:14:03.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:03.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:03.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:03.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:03.687 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:14:03.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:14:03.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:14:03.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:14:03.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:03.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:04.165 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:14:04.643 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:14:05.121 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:14:05.599 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:14:06.077 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:14:06.556 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:14:07.034 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:14:07.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:14:07.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:07.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:14:07.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:14:07.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:07.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:07.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:07.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:07.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:07.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:07.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:07.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:07.142 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:14:07.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:07.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:12.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:12.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:12.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:12.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:12.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:12.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:12.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:12.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:12.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:12.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:12.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:14:12.164 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:14:12.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:14:12.165 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:12.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:12.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:12.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:14:12.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:12.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:14:12.173 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:14:12.173 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:14:12.173 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:12.174 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:12.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:12.174 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:14:12.174 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:12.174 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:14:12.179 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:14:12.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:14:12.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:12.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:12.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:12.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:14:12.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:12.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:14:12.183 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:14:12.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:14:12.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:14:12.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:14:12.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:14:12.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:14:12.184 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:14:12.184 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:14:12.184 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:12.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:12.189 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:14:12.672 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:14:12.721 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:14:12.723 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:14:12.725 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:14:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:14:12.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:14:12.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:14:12.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:14:12.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:12.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:14:12.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:14:12.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:14:12.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:14:13.149 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:14:13.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:13.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:13.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:13.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:13.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:14:14.104 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:14:14.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:14.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:14.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:14.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:14.582 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:14:15.060 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:14:15.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:15.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:15.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:15.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:15.537 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:14:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:14:16.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:16.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:16.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:16.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:16.492 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:14:16.970 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:14:17.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:17.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:17.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:17.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:17.447 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:14:17.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:14:17.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:14:17.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:14:17.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:17.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:17.925 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:14:18.403 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:14:18.882 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:14:19.360 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:14:19.838 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:14:20.316 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:14:20.795 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:14:20.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:14:20.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:20.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:14:20.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:14:20.903 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:20.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:20.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:20.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:20.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:20.906 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:20.906 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:20.906 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:20.906 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:20.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:20.907 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:25.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:25.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:25.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:25.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:25.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:25.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:25.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:25.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:25.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:25.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:25.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:14:25.920 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:14:25.921 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:14:25.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:25.921 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:25.921 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:25.921 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:14:25.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:25.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:14:25.926 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:14:25.926 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:14:25.926 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:25.926 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:25.926 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:25.927 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:14:25.927 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:25.927 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:14:25.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:14:25.931 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:14:25.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:25.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:25.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:25.931 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:14:25.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:25.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:14:25.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:14:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:14:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.938 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:14:25.938 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:14:25.938 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:14:25.938 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:25.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:25.943 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:14:26.427 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:14:26.474 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:14:26.476 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:14:26.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:14:26.478 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:14:26.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:14:26.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:14:26.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:14:26.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:26.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:14:26.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:14:26.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:14:26.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:14:26.904 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:14:26.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:26.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:26.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:26.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:27.382 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:14:27.859 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:14:27.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:27.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:27.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:27.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:28.337 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:14:28.815 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:14:28.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:28.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:28.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:28.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:29.293 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:14:29.770 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:14:29.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:29.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:29.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:29.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:30.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:14:30.726 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:14:30.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:30.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:30.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:30.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:31.204 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:14:31.229 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:14:31.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:14:31.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:14:31.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:31.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:31.681 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:14:32.160 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:14:32.637 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:14:33.116 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:14:33.588 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:14:34.067 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:14:34.545 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:14:34.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:14:34.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:14:34.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:14:34.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:14:34.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:34.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:34.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:34.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:34.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:34.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:34.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:34.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:34.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:34.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:34.659 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:14:34.659 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:34.659 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:14:39.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:39.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:39.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:39.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:39.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:39.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:39.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:39.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:39.670 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:39.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:39.670 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:14:39.673 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:14:39.673 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:14:39.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:39.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:39.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:39.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:14:39.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:39.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:14:39.676 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:14:39.676 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:14:39.676 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:39.676 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:39.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:39.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:14:39.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:39.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:14:39.679 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:14:39.679 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:14:39.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:39.679 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:39.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:39.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:14:39.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:39.680 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.684 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:14:39.684 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:14:39.684 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:14:39.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.685 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:39.689 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:14:40.173 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:14:40.220 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:14:40.222 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:14:40.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:14:40.225 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:14:40.654 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:14:40.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:40.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:40.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:40.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:41.132 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:14:41.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:14:41.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:41.691 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:41.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:41.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:42.088 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:14:42.566 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:14:42.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:42.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:42.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:42.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:43.045 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:14:43.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:14:43.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:43.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:43.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:43.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:44.002 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:14:44.480 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:14:44.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:44.696 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:44.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:44.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:44.958 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:14:45.438 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:14:45.916 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:14:46.395 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:14:46.876 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:14:47.354 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:14:47.833 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:14:48.314 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:14:48.794 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:14:49.272 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:14:49.751 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:14:50.232 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:14:50.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:14:50.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:14:50.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:14:50.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:14:50.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:50.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:50.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:50.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:50.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:50.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:50.242 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:14:55.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:55.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:55.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:55.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:55.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:55.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:55.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:55.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:55.255 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:55.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:14:55.256 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:14:55.261 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:14:55.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:14:55.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:55.262 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:55.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:55.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:14:55.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:14:55.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:14:55.265 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:14:55.266 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:14:55.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:55.266 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:55.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:55.266 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:14:55.266 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:14:55.266 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:14:55.268 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:14:55.268 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:14:55.268 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:55.269 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:14:55.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:14:55.269 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:14:55.269 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:14:55.269 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:14:55.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:14:55.272 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:14:55.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:14:55.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:14:55.274 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:14:55.274 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:00.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:00.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:00.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:00.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:00.282 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:00.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:00.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:00.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:00.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:00.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:15:00.293 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:15:00.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:15:00.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:00.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:00.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:00.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:15:00.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:00.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:15:00.297 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:15:00.297 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:15:00.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:00.297 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:00.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:00.297 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:15:00.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:00.298 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:15:00.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:15:00.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:15:00.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:00.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:00.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:00.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:15:00.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:00.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:15:00.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:15:00.307 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:15:00.307 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:15:00.307 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:00.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:00.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:00.312 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:15:00.796 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:15:00.842 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:15:00.844 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:15:00.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:15:00.846 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:15:00.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:15:00.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:15:00.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:15:00.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:15:00.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:15:00.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:15:00.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:15:00.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:15:01.273 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:15:01.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:01.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:01.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:01.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:01.750 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:15:02.228 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:15:02.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:02.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:02.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:02.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:02.705 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:15:03.183 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:15:03.312 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:03.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:03.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:03.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:03.660 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:15:04.138 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:15:04.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:04.314 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:04.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:04.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:04.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:15:05.092 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:15:05.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:05.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:05.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:05.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:05.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:15:06.047 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:15:06.525 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:15:07.002 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:15:07.480 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:15:07.958 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:15:08.434 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:15:08.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:15:08.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:15:08.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:08.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:08.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:08.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:08.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:08.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:08.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:08.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:08.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:08.895 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:15:08.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:13.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:13.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:13.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:13.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:13.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:13.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:13.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:13.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:13.910 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:13.910 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:13.910 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:15:13.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:15:13.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:15:13.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:13.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:13.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:13.917 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:15:13.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:13.918 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:15:13.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:15:13.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:15:13.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:13.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:13.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:13.922 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:15:13.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:13.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:15:13.925 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:15:13.925 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:15:13.925 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:13.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:13.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:13.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:15:13.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:13.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:15:13.934 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:15:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:15:13.935 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:15:13.935 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:15:13.935 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:15:13.935 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:15:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:13.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:13.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:13.939 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:15:13.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:18.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:18.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:18.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:18.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:18.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:18.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:18.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:18.963 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:18.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:18.964 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:15:18.969 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:15:18.969 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:15:18.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:18.970 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:18.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:18.970 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:15:18.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:18.971 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:15:18.973 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:15:18.973 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:15:18.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:18.974 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:18.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:18.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:15:18.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:18.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:15:18.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:15:18.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:15:18.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:18.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:18.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:18.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:15:18.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:18.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:15:18.982 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:15:18.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:15:18.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:15:18.983 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:15:18.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:18.988 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:15:19.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:15:19.522 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:15:19.524 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:15:19.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:15:19.526 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:15:19.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:15:19.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:15:19.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:15:19.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:15:19.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:15:19.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:15:19.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:15:19.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:15:19.948 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:15:19.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:19.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:20.426 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:15:20.903 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:15:20.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:20.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:20.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:20.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:21.381 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:15:21.859 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:15:21.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:21.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:21.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:21.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:22.337 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:15:22.814 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:15:22.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:22.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:22.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:22.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:23.292 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:15:23.770 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:15:23.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:23.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:24.247 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:15:24.724 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:15:25.202 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:15:25.680 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:15:26.158 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:15:26.636 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:15:27.113 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:15:27.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:15:27.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:15:27.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:27.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:27.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:27.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:27.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:27.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:27.574 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:27.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:27.574 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:27.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:27.574 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:15:27.575 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.575 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.575 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.575 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.575 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.575 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.575 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.576 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.576 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.576 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.576 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:27.576 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:15:32.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:32.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:32.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:32.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:32.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:32.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:32.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:32.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:32.587 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:32.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:32.588 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:15:32.592 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:15:32.592 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:15:32.592 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:32.593 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:32.593 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:32.593 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:15:32.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:32.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:15:32.595 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:15:32.595 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:15:32.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:32.596 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:32.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:32.596 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:15:32.596 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:32.596 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:15:32.598 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:15:32.598 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:15:32.598 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:32.599 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:32.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:32.599 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:15:32.599 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:32.599 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:15:32.601 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:15:32.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:15:32.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:15:32.601 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:15:32.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:15:32.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:15:32.602 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:15:32.602 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:15:32.602 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:32.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:32.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:32.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:32.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:32.604 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:15:32.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:32.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:37.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:37.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:37.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:37.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:37.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:37.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:37.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:37.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:37.620 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:37.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:37.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:15:37.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:15:37.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:15:37.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:37.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:37.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:37.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:15:37.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:37.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:15:37.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:15:37.627 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:15:37.627 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:37.627 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:37.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:37.627 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:15:37.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:37.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:15:37.630 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:15:37.630 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:15:37.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:37.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:37.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:37.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:15:37.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:37.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:15:37.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:15:37.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:15:37.634 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:15:37.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:37.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:37.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:15:38.121 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:15:38.160 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:15:38.163 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:15:38.164 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:15:38.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:15:38.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:15:38.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:15:38.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:15:38.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:15:38.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:15:38.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:15:38.168 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:15:38.168 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:15:38.599 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:15:38.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:38.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:39.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:15:39.554 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:15:39.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:39.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:39.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:39.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:40.032 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:15:40.510 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:15:40.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:40.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:40.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:40.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:40.987 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:15:41.464 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:15:41.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:41.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:41.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:41.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:41.942 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:15:42.420 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:15:42.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:42.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:42.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:42.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:42.897 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:15:43.374 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:15:43.852 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:15:44.330 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:15:44.808 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:15:45.285 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:15:45.762 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:15:46.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:15:46.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:15:46.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:46.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:46.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:46.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:46.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:46.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:46.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:46.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:46.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:46.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:46.221 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:15:51.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:51.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:51.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:51.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:51.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:51.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:51.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:51.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:51.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:51.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:51.235 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:15:51.238 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:15:51.238 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:15:51.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:51.238 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:51.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:51.239 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:15:51.239 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:51.239 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:15:51.241 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:15:51.241 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:15:51.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:51.241 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:51.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:51.241 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:15:51.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:51.242 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:15:51.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:15:51.244 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:15:51.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:51.244 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:51.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:51.244 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:15:51.244 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:51.244 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:15:51.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:15:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:15:51.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:15:51.247 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:15:51.247 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:15:51.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:51.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:51.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:51.248 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:15:51.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:15:56.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:15:56.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:56.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:56.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:56.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:56.264 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:15:56.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:56.267 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:56.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:15:56.267 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:15:56.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:15:56.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:15:56.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:56.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:56.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:15:56.274 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:15:56.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:15:56.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:15:56.276 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:15:56.277 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:15:56.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:56.277 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:56.278 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:15:56.278 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:15:56.278 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:15:56.278 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:15:56.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:15:56.281 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:15:56.281 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:56.281 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:15:56.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:15:56.282 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:15:56.282 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:15:56.282 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:15:56.285 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:15:56.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:15:56.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:15:56.285 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:15:56.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:15:56.286 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:15:56.286 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:15:56.286 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:15:56.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:15:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:15:56.291 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:15:56.775 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:15:56.813 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:15:56.816 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:15:56.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:15:56.818 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:15:56.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:15:56.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:15:56.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:15:56.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:15:56.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:15:56.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:15:56.822 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:15:56.822 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:15:57.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:15:57.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:57.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:57.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:57.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:57.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:15:58.206 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:15:58.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:58.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:58.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:58.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:58.683 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:15:59.160 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:15:59.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:15:59.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:15:59.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:15:59.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:15:59.637 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:16:00.115 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:16:00.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:00.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:00.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:00.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:00.593 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:16:01.070 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:16:01.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:01.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:01.547 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:16:02.025 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:16:02.503 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:16:02.980 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:16:03.458 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:16:03.957 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:16:04.435 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:16:04.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:16:04.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:16:04.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:04.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:04.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:04.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:04.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:04.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:04.876 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:04.876 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:04.876 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:16:04.876 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1831 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:04.876 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1831 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:04.876 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1831 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:04.876 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1831 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:04.876 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1831 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:04.876 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1831 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:09.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:09.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:09.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:09.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:09.880 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:09.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:09.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:09.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:09.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:09.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:09.889 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:16:09.892 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:16:09.892 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:16:09.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:09.892 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:09.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:09.893 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:16:09.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:09.893 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:16:09.896 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:16:09.896 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:16:09.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:09.896 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:09.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:09.896 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:16:09.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:09.896 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:16:09.898 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:16:09.898 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:16:09.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:09.898 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:09.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:09.899 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:16:09.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:09.899 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:16:09.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:16:09.902 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:09.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:09.904 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:16:09.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:14.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:14.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:14.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:14.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:14.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:14.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:14.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:14.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:14.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:14.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:14.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:16:14.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:16:14.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:16:14.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:14.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:14.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:14.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:16:14.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:14.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:16:14.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:16:14.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:16:14.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:14.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:14.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:14.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:16:14.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:14.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:16:14.923 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:16:14.924 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:16:14.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:14.924 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:14.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:14.924 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:16:14.924 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:14.924 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:16:14.927 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:16:14.927 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:16:14.927 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.927 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:14.932 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:16:15.415 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:16:15.458 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:16:15.459 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:16:15.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:16:15.461 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:16:15.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:16:15.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:16:15.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:16:15.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:16:15.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:16:15.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:16:15.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:16:15.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:16:15.892 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:16:15.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:15.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:15.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:15.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:16.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:16:16.847 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:16:16.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:16.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:16.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:16.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:17.326 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:16:17.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:16:17.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:17.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:17.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:17.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:18.281 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:16:18.759 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:16:18.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:18.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:18.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:18.934 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:19.236 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:16:19.714 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:16:19.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:19.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:19.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:19.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:20.191 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:16:20.669 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:16:21.147 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:16:21.625 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:16:22.102 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:16:22.580 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:16:23.058 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:16:23.535 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:16:24.013 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:16:24.491 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:16:24.968 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:16:25.446 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:16:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:16:26.400 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:16:26.874 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:16:27.352 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:16:27.830 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:16:28.307 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:16:28.784 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:16:29.262 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:16:29.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:16:29.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:16:29.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:29.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:29.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:29.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:29.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:29.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:29.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:29.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:29.517 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:16:29.517 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:29.517 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:29.517 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:29.517 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:29.517 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:29.517 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:34.517 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:34.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:34.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:34.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:34.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:34.522 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:34.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:34.538 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:34.538 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:34.539 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:34.539 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:16:34.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:16:34.544 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:16:34.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:34.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:34.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:34.545 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:16:34.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:34.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:16:34.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:16:34.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:16:34.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:34.548 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:34.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:34.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:16:34.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:34.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:16:34.550 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:16:34.550 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:16:34.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:34.550 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:34.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:34.550 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:16:34.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:34.551 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:16:34.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:16:34.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:16:34.554 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:16:34.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:34.556 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:34.556 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:34.556 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:39.558 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:39.559 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:39.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:39.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:39.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:39.563 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:39.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:39.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:39.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:39.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:39.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:16:39.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:16:39.574 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:16:39.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:39.574 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:39.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:39.575 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:16:39.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:39.575 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:16:39.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:16:39.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:16:39.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:39.578 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:39.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:39.578 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:16:39.578 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:39.578 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:16:39.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:16:39.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:16:39.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:39.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:39.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:39.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:16:39.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:39.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:16:39.583 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:16:39.583 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:16:39.583 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.583 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:39.588 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:16:40.073 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:16:40.112 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:16:40.112 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:16:40.114 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:16:40.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:16:40.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:16:40.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:16:40.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:16:40.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:16:40.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:16:40.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:16:40.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:16:40.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:16:40.550 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:16:40.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:40.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:40.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:40.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:41.028 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:16:41.505 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:16:41.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:41.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:41.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:41.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:41.983 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:16:42.461 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:16:42.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:42.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:42.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:42.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:42.939 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:16:43.417 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:16:43.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:43.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:43.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:43.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:43.894 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:16:44.372 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:16:44.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:44.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:44.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:44.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:44.850 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:16:45.327 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:16:45.805 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:16:46.283 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:16:46.761 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:16:47.239 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:16:47.717 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:16:48.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:16:48.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:16:48.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:48.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:48.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:48.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:48.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:48.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:48.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:48.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:48.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:48.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:48.177 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:16:48.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:48.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:48.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:48.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:48.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:48.177 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:16:53.176 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:53.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:53.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:53.179 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:53.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:53.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:53.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:53.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:53.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:53.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:53.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:16:53.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:16:53.195 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:16:53.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:53.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:53.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:53.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:16:53.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:53.197 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:16:53.198 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:16:53.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:16:53.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:53.199 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:53.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:53.199 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:16:53.199 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:53.199 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:16:53.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:16:53.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:16:53.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:53.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:53.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:53.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:16:53.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:53.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:16:53.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:16:53.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:16:53.205 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:16:53.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:53.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:53.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:53.206 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:16:53.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:58.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:16:58.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:16:58.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:58.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:58.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:58.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:58.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:16:58.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:58.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:58.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:16:58.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:16:58.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:16:58.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:16:58.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:58.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:58.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:16:58.225 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:16:58.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:16:58.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:16:58.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:16:58.227 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:16:58.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:58.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:58.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:16:58.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:16:58.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:16:58.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:16:58.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:16:58.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:16:58.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:58.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:16:58.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:16:58.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:16:58.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:16:58.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.233 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:16:58.233 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:16:58.233 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:16:58.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:16:58.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:16:58.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:16:58.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:16:58.238 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:16:58.722 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:16:58.762 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:16:58.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:16:58.766 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:16:58.768 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:16:58.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:16:58.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:16:58.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:16:58.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:16:58.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:16:58.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:16:58.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:16:58.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:16:59.199 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:16:59.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:16:59.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:16:59.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:16:59.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:16:59.677 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:17:00.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:17:00.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:00.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:00.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:00.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:00.633 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:17:01.110 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:17:01.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:01.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:01.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:01.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:01.588 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:17:02.066 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:17:02.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:02.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:02.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:02.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:02.543 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:17:03.021 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:17:03.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:03.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:03.499 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:17:03.976 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:17:04.454 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:17:04.931 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:17:05.409 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:17:05.888 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:17:06.365 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:17:06.843 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:17:07.321 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:17:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:17:08.276 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:17:08.753 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:17:08.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:17:08.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:08.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:08.823 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:08.824 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:17:08.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:13.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:13.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:13.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:13.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:13.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:13.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:13.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:13.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:13.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:13.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:13.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:17:13.829 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:17:13.829 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:17:13.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:13.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:13.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:13.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:17:13.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:13.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:17:13.830 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:17:13.830 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:17:13.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:13.830 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:13.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:13.830 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:17:13.830 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:13.830 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:17:13.831 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:17:13.831 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:17:13.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:13.831 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:13.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:13.831 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:17:13.831 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:13.831 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:17:13.833 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:17:13.833 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:17:13.833 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:13.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:13.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:13.834 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:17:18.836 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:18.836 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:18.836 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:18.836 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:18.837 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:18.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:18.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:18.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:18.841 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:18.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:18.841 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:17:18.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:17:18.842 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:17:18.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:18.842 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:18.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:18.842 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:17:18.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:18.842 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:17:18.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:17:18.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:17:18.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:18.843 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:18.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:18.843 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:17:18.843 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:18.843 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:17:18.844 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:17:18.844 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:17:18.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:18.844 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:18.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:18.844 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:17:18.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:18.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.846 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:17:18.846 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:17:18.846 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:17:18.847 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:18.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:18.851 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:17:19.319 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:17:19.363 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:17:19.364 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:17:19.364 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:17:19.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:17:19.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:17:19.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:17:19.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:17:19.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:17:19.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:17:19.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:17:19.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:17:19.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:17:19.788 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:17:19.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:19.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:19.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:19.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:20.256 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:17:20.723 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:17:20.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:20.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:20.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:20.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:21.191 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:17:21.659 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:17:21.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:21.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:21.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:21.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:22.130 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:17:22.598 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:17:22.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:22.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:22.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:22.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:23.066 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:17:23.535 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:17:23.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:23.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:23.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:23.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:24.003 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:17:24.472 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:17:24.941 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:17:25.410 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:17:25.879 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:17:26.349 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:17:26.818 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:17:27.287 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:17:27.756 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:17:28.225 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:17:28.694 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:17:29.163 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:17:29.633 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:17:30.102 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:17:30.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:17:30.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:17:30.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:30.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:30.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:30.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:30.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:30.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:30.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:30.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:30.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:30.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:30.413 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:17:35.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:35.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:35.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:35.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:35.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:35.415 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:35.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:35.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:35.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:35.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:35.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:17:35.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:17:35.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:17:35.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:35.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:35.426 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:35.426 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:17:35.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:35.426 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:17:35.429 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:17:35.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:17:35.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:35.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:35.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:35.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:17:35.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:35.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:17:35.432 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:17:35.432 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:17:35.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:35.432 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:35.432 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:35.432 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:17:35.432 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:35.432 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.437 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:17:35.437 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:17:35.437 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:17:35.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:17:35.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:17:35.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:35.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:35.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:35.440 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:17:40.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:17:40.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:17:40.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:40.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:40.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:40.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:40.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:17:40.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:40.446 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:40.446 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:17:40.446 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:17:40.447 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:17:40.447 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:17:40.447 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:40.447 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:40.448 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:17:40.448 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:17:40.448 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:17:40.448 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:17:40.449 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:17:40.449 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:17:40.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:40.449 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:40.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:17:40.449 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:17:40.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:17:40.449 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:17:40.451 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:17:40.451 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:17:40.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:40.451 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:17:40.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:17:40.451 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:17:40.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:17:40.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:17:40.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:17:40.454 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:17:40.455 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:17:40.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:17:40.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:17:40.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:17:40.967 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:17:40.968 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:17:40.968 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:17:40.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:17:40.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:17:40.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:17:40.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:17:40.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:17:40.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:17:40.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:17:40.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:17:40.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:17:41.396 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:17:41.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:41.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:41.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:41.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:41.865 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:17:42.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:17:42.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:42.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:42.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:42.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:42.804 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:17:43.275 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:17:43.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:43.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:43.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:43.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:43.744 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:17:44.213 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:17:44.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:44.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:44.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:44.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:44.682 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:17:45.151 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:17:45.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:17:45.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:17:45.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:17:45.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:17:45.619 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:17:46.088 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:17:46.557 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:17:47.026 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:17:47.495 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:17:47.964 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:17:48.432 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:17:48.900 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:17:49.369 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:17:49.837 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:17:50.305 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:17:50.774 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:17:51.242 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:17:51.710 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:17:52.180 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:17:52.649 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:17:53.117 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:17:53.586 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:17:54.058 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:17:54.525 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:17:54.993 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:17:55.461 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:17:55.929 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:17:56.397 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:17:56.866 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:17:57.334 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:17:57.803 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:17:58.271 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:17:58.743 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:17:59.212 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:17:59.680 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:18:00.149 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:18:00.617 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:18:00.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:18:00.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:18:00.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:00.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:00.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:00.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:00.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:00.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:00.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:00.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:00.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:00.974 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:18:00.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:05.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:05.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:05.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:05.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:05.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:05.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:05.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:05.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:05.978 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:05.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:05.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:18:05.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:18:05.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:18:05.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:05.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:05.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:05.980 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:18:05.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:05.980 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:18:05.980 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:18:05.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:18:05.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:05.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:05.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:05.981 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:18:05.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:05.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:18:05.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:18:05.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:18:05.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:05.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:05.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:05.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:18:05.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:05.982 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.983 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:18:05.983 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:18:05.983 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:18:05.984 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:05.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:05.985 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:05.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:10.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:10.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:10.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:10.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:10.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:10.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:11.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:11.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:11.002 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:11.002 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:11.002 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:18:11.003 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:18:11.003 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:18:11.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:11.003 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:11.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:11.003 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:18:11.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:11.003 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:18:11.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:18:11.004 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:18:11.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:11.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:11.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:11.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:18:11.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:11.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:18:11.005 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:18:11.005 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:18:11.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:11.005 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:11.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:11.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:18:11.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:11.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:18:11.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:18:11.007 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:18:11.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:11.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:18:11.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:18:11.521 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:18:11.521 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:18:11.521 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:18:11.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:18:11.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:18:12.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:12.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:12.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:12.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:12.424 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:18:12.895 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:18:13.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:13.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:13.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:13.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:13.366 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:18:13.836 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:18:14.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:14.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:14.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:14.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:14.307 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:18:14.777 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:18:15.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:15.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:15.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:15.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:15.249 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:18:15.720 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:18:16.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:16.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:16.190 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:18:16.661 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:18:17.132 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:18:17.605 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:18:18.081 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:18:18.561 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:18:19.036 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:18:19.505 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:18:19.978 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:18:20.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:18:20.925 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:18:21.396 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:18:21.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:21.524 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:21.524 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:21.524 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:18:26.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:26.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:26.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:26.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:26.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:26.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:26.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:26.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:26.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:26.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:26.530 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:18:26.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:18:26.531 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:18:26.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:26.531 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:26.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:26.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:18:26.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:26.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:18:26.532 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:18:26.532 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:18:26.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:26.532 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:26.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:26.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:18:26.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:26.532 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:18:26.533 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:18:26.533 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:18:26.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:26.533 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:26.533 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:26.533 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:18:26.533 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:26.533 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:18:26.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:18:26.535 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:18:26.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:26.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:26.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:26.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:26.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:26.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:26.537 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:26.537 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:18:31.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:31.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:31.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:31.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:31.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:31.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:31.553 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:31.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:31.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:31.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:31.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:18:31.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:18:31.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:18:31.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:31.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:31.556 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:31.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:18:31.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:31.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:18:31.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:18:31.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:18:31.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:31.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:31.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:31.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:18:31.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:31.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:18:31.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:18:31.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:18:31.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:31.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:31.562 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:31.562 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:18:31.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:31.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:18:31.565 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:18:31.565 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:18:31.565 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:31.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:31.570 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:18:32.053 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:18:32.098 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:18:32.101 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:18:32.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:18:32.104 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:18:32.530 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:18:32.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:32.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:32.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:33.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:18:33.487 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:18:33.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:33.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:33.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:18:34.445 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:18:34.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:34.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:34.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:34.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:34.923 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:18:35.401 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:18:35.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:35.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:35.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:35.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:35.880 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:18:36.357 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:18:36.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:36.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:36.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:36.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:36.836 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:18:37.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:18:37.792 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:18:38.269 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:18:38.747 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:18:39.229 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:18:39.707 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:18:40.187 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:18:40.667 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:18:41.147 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:18:41.626 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:18:42.104 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:18:42.585 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:18:43.065 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:18:43.543 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:18:44.024 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:18:44.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:44.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:44.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:44.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:44.117 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:44.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:44.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:44.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:44.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:44.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:44.117 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:18:44.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2674 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:18:44.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2674 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:18:44.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2674 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:18:44.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2674 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:18:44.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2674 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:18:44.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2674 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:18:49.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:49.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:49.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:49.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:49.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:49.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:49.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:49.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:49.133 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:49.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:49.133 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:18:49.136 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:18:49.136 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:18:49.136 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:49.136 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:49.137 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:49.137 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:18:49.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:49.137 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:18:49.140 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:18:49.140 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:18:49.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:49.140 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:49.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:49.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:18:49.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:49.140 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:18:49.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:18:49.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:18:49.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:49.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:49.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:49.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:18:49.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:49.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:18:49.149 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:18:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:18:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:18:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:18:49.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:18:49.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:18:49.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:18:49.150 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:18:49.150 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:18:49.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:49.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:49.153 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:18:49.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:54.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:18:54.157 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:18:54.158 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:54.160 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:54.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:54.160 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:54.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:18:54.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:54.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:54.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:18:54.170 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:18:54.175 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:18:54.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:18:54.176 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:54.176 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:54.176 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:18:54.177 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:18:54.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:18:54.177 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:18:54.179 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:18:54.179 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:18:54.179 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:54.179 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:54.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:18:54.180 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:18:54.180 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:18:54.180 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:18:54.182 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:18:54.182 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:18:54.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:54.183 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:18:54.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:18:54.183 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:18:54.183 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:18:54.183 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.186 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:18:54.186 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:18:54.186 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:18:54.187 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:18:54.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:18:54.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:18:54.191 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:18:54.674 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:18:54.714 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:18:54.715 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:18:54.715 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:18:54.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:18:54.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:18:54.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:18:54.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:18:54.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:18:54.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:18:54.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:18:54.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:18:54.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:18:54.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:18:54.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:18:54.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:18:54.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:18:55.151 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:18:55.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:55.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:55.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:55.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:55.628 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:18:56.106 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:18:56.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:56.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:56.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:56.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:56.584 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:18:57.061 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:18:57.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:57.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:57.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:57.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:57.539 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:18:58.016 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:18:58.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:58.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:58.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:58.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:58.494 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:18:58.972 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:18:59.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:18:59.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:18:59.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:18:59.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:18:59.449 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:18:59.927 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:19:00.404 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:19:00.882 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:19:01.360 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:19:01.838 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:19:02.315 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:19:02.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:19:02.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:19:02.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:02.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:02.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:02.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:02.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:02.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:02.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:02.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:02.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:02.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:02.773 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:19:02.774 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:02.774 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:02.774 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:07.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:07.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:07.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:07.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:07.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:07.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:07.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:07.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:07.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:07.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:07.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:19:07.796 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:19:07.796 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:19:07.797 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:07.797 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:07.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:07.798 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:19:07.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:07.798 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:19:07.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:19:07.801 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:19:07.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:07.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:07.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:07.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:19:07.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:07.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:19:07.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:19:07.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:19:07.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:07.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:07.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:07.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:19:07.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:07.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:19:07.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:19:07.808 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:19:07.809 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:07.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:07.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:07.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:07.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:07.811 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:19:07.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:07.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:12.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:12.816 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:12.816 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:12.816 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:12.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:12.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:12.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:12.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:12.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:12.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:19:12.828 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:19:12.828 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:19:12.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:12.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:12.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:12.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:19:12.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:12.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:19:12.831 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:19:12.832 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:19:12.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:12.832 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:12.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:12.832 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:19:12.832 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:12.832 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:19:12.834 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:19:12.834 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:19:12.834 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:12.834 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:12.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:12.835 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:19:12.835 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:12.835 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:19:12.837 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:19:12.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:19:12.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:19:12.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:19:12.837 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:19:12.838 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:19:12.838 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:19:12.838 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.838 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.839 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:12.843 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:19:13.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:19:13.373 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:19:13.375 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:19:13.376 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:19:13.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:19:13.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:19:13.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:19:13.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:19:13.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:13.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:19:13.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:19:13.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:19:13.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:19:13.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:19:13.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:19:13.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:13.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:13.804 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:19:13.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:13.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:13.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:13.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:14.282 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:19:14.760 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:19:14.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:14.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:14.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:14.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:15.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:19:15.715 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:19:15.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:15.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:15.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:15.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:16.192 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:19:16.670 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:19:16.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:16.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:16.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:16.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:17.147 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:19:17.622 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:19:17.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:17.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:18.099 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:19:18.577 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:19:19.055 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:19:19.533 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:19:20.010 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:19:20.488 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:19:20.966 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:19:21.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:19:21.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:19:21.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:21.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:21.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:21.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:21.429 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:21.429 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:21.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:21.429 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:21.429 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:21.429 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:21.429 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:19:21.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:21.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:21.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:21.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:21.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:21.429 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:26.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:26.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:26.432 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:26.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:26.433 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:26.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:26.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:26.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:26.442 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:26.442 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:26.442 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:19:26.445 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:19:26.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:19:26.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:26.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:26.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:26.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:19:26.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:26.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:19:26.448 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:19:26.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:19:26.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:26.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:26.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:26.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:19:26.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:26.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:19:26.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:19:26.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:19:26.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:26.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:26.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:26.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:19:26.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:26.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:19:26.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:19:26.453 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:19:26.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:26.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:26.455 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:19:26.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:31.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:31.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:31.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:31.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:31.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:31.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:31.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:31.471 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:31.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:31.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:19:31.475 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:19:31.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:19:31.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:31.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:31.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:31.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:19:31.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:31.476 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:19:31.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:19:31.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:19:31.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:31.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:31.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:31.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:19:31.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:31.479 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:19:31.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:19:31.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:19:31.481 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:31.481 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:31.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:31.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:19:31.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:31.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:19:31.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:19:31.485 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:19:31.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:31.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:31.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:31.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:19:31.974 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:19:32.021 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:19:32.023 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:19:32.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:19:32.026 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:19:32.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:19:32.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:19:32.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:19:32.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:32.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:19:32.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:19:32.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:19:32.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:19:32.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:19:32.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:19:32.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:32.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:32.451 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:19:32.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:32.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:32.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:32.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:32.929 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:19:33.407 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:19:33.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:33.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:33.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:33.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:33.884 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:19:34.362 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:19:34.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:34.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:34.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:34.839 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:19:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:19:35.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:35.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:35.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:35.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:35.795 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:19:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:19:36.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:36.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:36.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:36.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:36.750 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:19:37.228 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:19:37.706 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:19:38.184 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:19:38.661 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:19:39.138 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:19:39.616 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:19:40.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:19:40.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:19:40.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:40.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:40.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:40.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:40.078 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:40.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:40.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:40.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:40.078 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:40.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:40.078 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:19:40.078 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:40.078 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:40.078 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:40.078 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:40.078 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:40.078 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:40.078 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:19:45.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:45.078 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:45.080 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:45.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:45.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:45.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:45.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:45.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:45.098 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:45.099 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:45.099 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:19:45.106 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:19:45.107 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:19:45.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:45.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:45.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:45.108 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:19:45.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:45.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:19:45.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:19:45.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:19:45.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:45.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:45.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:45.112 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:19:45.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:45.112 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:19:45.114 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:19:45.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:19:45.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:45.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:45.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:45.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:19:45.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:45.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:19:45.118 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:19:45.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:19:45.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:19:45.119 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:19:45.119 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:19:45.119 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:45.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:45.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:45.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:45.121 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:19:45.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:50.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:50.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:50.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:50.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:50.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:50.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:50.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:50.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:50.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:19:50.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:19:50.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:19:50.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:19:50.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:50.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:50.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:50.139 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:19:50.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:19:50.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:19:50.141 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:19:50.141 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:19:50.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:50.141 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:50.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:50.142 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:19:50.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:19:50.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:19:50.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:19:50.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:19:50.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:50.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:19:50.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:50.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:19:50.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:19:50.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:19:50.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:19:50.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:19:50.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:19:50.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:19:50.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:19:50.149 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:19:50.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:19:50.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:19:50.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:19:50.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:19:50.639 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:19:50.683 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:19:50.685 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:19:50.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:19:50.687 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:19:50.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:19:50.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:19:50.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:19:50.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:50.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:19:50.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:19:50.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:19:50.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:19:50.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:19:50.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:19:50.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:50.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:19:51.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:19:51.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:51.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:51.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:51.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:51.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:19:52.071 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:19:52.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:52.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:52.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:52.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:52.549 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:19:53.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:19:53.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:53.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:53.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:53.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:53.504 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:19:53.981 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:19:54.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:54.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:54.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:54.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:54.458 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:19:54.936 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:19:55.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:55.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:55.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:55.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:55.413 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:19:55.891 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:19:56.369 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:19:56.847 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:19:57.325 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:19:57.802 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:19:58.280 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:19:58.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:19:58.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:19:58.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:19:58.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:19:58.737 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:20:03.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:03.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:03.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:03.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:03.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:03.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:03.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:03.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:03.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:03.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:03.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:20:03.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:20:03.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:20:03.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:03.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:03.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:03.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:20:03.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:03.754 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:20:03.758 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:20:03.758 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:20:03.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:03.759 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:03.759 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:03.759 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:20:03.759 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:03.759 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:20:03.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:20:03.763 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:20:03.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:03.763 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:03.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:03.763 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:20:03.763 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:03.763 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:03.769 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:20:03.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:20:03.770 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:20:03.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:20:03.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:03.775 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:20:03.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:20:03.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:03.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:03.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:03.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:03.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:03.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:03.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:03.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:03.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:03.801 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:20:03.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:03.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:08.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:08.833 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:08.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:08.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:08.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:08.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:08.845 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:08.845 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:08.846 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:08.846 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:20:08.849 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:20:08.849 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:20:08.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:08.850 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:08.850 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:08.850 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:20:08.850 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:08.850 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:20:08.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:20:08.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:20:08.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:08.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:08.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:08.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:20:08.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:08.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:20:08.855 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:20:08.855 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:20:08.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:08.855 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:08.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:08.855 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:20:08.855 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:08.855 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:20:08.858 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:20:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:20:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:20:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:20:08.858 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:20:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:20:08.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:20:08.859 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:20:08.859 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:20:08.859 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:08.864 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:20:09.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:20:09.390 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:20:09.392 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:20:09.393 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:20:09.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:20:09.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:20:09.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:20:09.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:20:09.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:20:09.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:20:09.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:20:09.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:20:09.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:20:09.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:20:09.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:20:09.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:20:09.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:20:09.826 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:20:09.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:09.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:09.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:09.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:10.304 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:20:10.781 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:20:10.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:10.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:10.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:10.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:11.258 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:20:11.736 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:20:11.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:11.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:11.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:11.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:12.214 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:20:12.692 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:20:12.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:12.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:12.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:12.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:13.169 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:20:13.646 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:20:13.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:13.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:13.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:13.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:14.124 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:20:14.602 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:20:15.080 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:20:15.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:20:16.035 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:20:16.513 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:20:16.990 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:20:17.468 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:20:17.946 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:20:18.423 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:20:18.901 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:20:19.379 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:20:19.857 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:20:20.334 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:20:20.812 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:20:21.290 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:20:21.767 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:20:22.245 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:20:22.723 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:20:23.200 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:20:23.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:20:23.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:20:23.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:23.449 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:23.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:23.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:23.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:23.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:23.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:23.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:23.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:23.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:23.453 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:20:23.453 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:23.453 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:23.454 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:23.454 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:23.454 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:23.454 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:23.454 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:28.452 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:28.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:28.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:28.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:28.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:28.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:28.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:28.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:28.465 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:28.465 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:28.465 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:20:28.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:20:28.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:20:28.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:28.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:28.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:28.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:20:28.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:28.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:20:28.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:20:28.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:20:28.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:28.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:28.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:28.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:20:28.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:28.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:20:28.472 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:20:28.472 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:20:28.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:28.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:28.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:28.473 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:20:28.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:28.473 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:20:28.475 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:20:28.476 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:20:28.476 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:20:28.476 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:28.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:28.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:28.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:28.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:28.478 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:28.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:28.478 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:20:28.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.480 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:33.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:33.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:33.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:33.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:33.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:33.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:33.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:33.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:33.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:33.496 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:20:33.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:20:33.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:20:33.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:33.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:33.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:33.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:20:33.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:33.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:20:33.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:20:33.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:20:33.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:33.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:33.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:33.504 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:20:33.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:33.504 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:20:33.506 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:20:33.506 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:20:33.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:33.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:33.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:33.507 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:20:33.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:33.507 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.510 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:20:33.510 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:20:33.510 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:20:33.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:33.515 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:20:33.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:20:34.046 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:20:34.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:20:34.049 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:20:34.052 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:20:34.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:20:34.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:20:34.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:20:34.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:20:34.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:20:34.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:20:34.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:20:34.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:20:34.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:20:34.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:20:34.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:20:34.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:20:34.475 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:20:34.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:34.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:34.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:34.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:34.953 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:20:35.431 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:20:35.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:35.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:35.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:35.909 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:20:36.386 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:20:36.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:36.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:36.864 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:20:37.342 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:20:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:37.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:37.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:37.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:37.819 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:20:38.297 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:20:38.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:38.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:38.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:38.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:38.774 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:20:39.252 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:20:39.730 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:20:40.208 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:20:40.685 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:20:41.163 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:20:41.641 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:20:42.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:20:42.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:20:42.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:42.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:42.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:42.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:42.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:42.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:42.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:42.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:42.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:42.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:42.101 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:20:42.101 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:42.101 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:42.102 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:20:47.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:47.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:47.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:47.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:47.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:47.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:47.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:47.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:47.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:47.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:47.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:20:47.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:20:47.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:20:47.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:47.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:47.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:47.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:20:47.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:47.120 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:20:47.124 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:20:47.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:20:47.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:47.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:47.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:47.125 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:20:47.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:47.125 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:20:47.130 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:20:47.130 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:20:47.130 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:47.130 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:47.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:47.131 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:20:47.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:47.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:20:47.137 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:20:47.137 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:20:47.137 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:20:47.137 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:47.138 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:20:47.138 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:20:47.138 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:20:47.139 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:47.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:47.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:47.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:47.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:47.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:47.142 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:20:47.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:20:52.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:20:52.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:52.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:52.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:52.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:52.155 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:20:52.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:52.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:52.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:20:52.157 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:20:52.161 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:20:52.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:20:52.162 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:52.162 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:52.162 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:20:52.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:20:52.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:20:52.163 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:20:52.165 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:20:52.165 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:20:52.166 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:52.166 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:52.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:20:52.166 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:20:52.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:20:52.167 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:20:52.168 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:20:52.169 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:20:52.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:52.169 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:20:52.169 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:20:52.169 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:20:52.169 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:20:52.169 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.172 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:20:52.173 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:20:52.173 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:20:52.173 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:20:52.174 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:20:52.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.174 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:20:52.178 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:20:52.663 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:20:52.709 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:20:52.711 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:20:52.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:20:52.713 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:20:52.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:20:52.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:20:52.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:20:52.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:20:52.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:20:52.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:20:52.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:20:52.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:20:53.140 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:20:53.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:53.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:53.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:53.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:53.617 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:20:54.095 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:20:54.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:54.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:54.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:54.178 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:54.572 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:20:55.049 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:20:55.178 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:55.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:55.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:55.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:55.527 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:20:56.005 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:20:56.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:56.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:56.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:56.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:56.483 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:20:56.961 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:20:57.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:20:57.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:20:57.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:20:57.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:20:57.438 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:20:57.916 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:20:58.394 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:20:58.872 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:20:59.349 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:20:59.828 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:21:00.306 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:21:00.784 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:21:01.261 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:21:01.739 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:21:02.217 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:21:02.695 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:21:02.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:21:02.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:21:02.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:02.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:02.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:02.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:02.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:02.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:02.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:02.769 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:21:02.769 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:02.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:02.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:02.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:02.769 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:02.769 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:07.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:07.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:07.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:07.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:07.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:07.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:07.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:07.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:07.780 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:07.780 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:07.780 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:21:07.783 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:21:07.784 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:21:07.784 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:07.784 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:07.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:07.785 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:21:07.785 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:07.785 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:21:07.788 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:21:07.788 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:21:07.788 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:07.789 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:07.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:07.789 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:21:07.789 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:07.789 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:21:07.792 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:21:07.792 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:21:07.792 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:07.792 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:07.792 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:07.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:21:07.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:07.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.798 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:21:07.799 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:21:07.799 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:21:07.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:07.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:07.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:07.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:07.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:07.802 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:21:12.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:12.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:12.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:12.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:12.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:12.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:12.817 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:12.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:12.818 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:12.818 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:12.818 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:21:12.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:21:12.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:21:12.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:12.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:12.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:12.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:21:12.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:12.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:21:12.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:21:12.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:21:12.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:12.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:12.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:12.824 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:21:12.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:12.824 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:21:12.826 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:21:12.826 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:21:12.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:12.826 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:12.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:12.826 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:21:12.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:12.827 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:21:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:21:12.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:21:12.830 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:21:12.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:12.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:12.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:12.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:12.834 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:21:13.318 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:21:13.359 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:21:13.361 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:21:13.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:21:13.363 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:21:13.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:21:13.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:21:13.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:21:13.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:21:13.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:21:13.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:21:13.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:21:13.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:21:13.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:21:13.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:21:13.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:21:13.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:21:13.795 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:21:13.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:13.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:13.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:13.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:14.273 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:21:14.750 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:21:14.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:14.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:14.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:14.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:15.228 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:21:15.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:21:15.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:15.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:15.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:15.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:16.184 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:21:16.662 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:21:16.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:16.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:16.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:16.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:17.140 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:21:17.617 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:21:17.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:17.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:17.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:17.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:18.095 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:21:18.573 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:21:19.051 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:21:19.529 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:21:20.007 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:21:20.485 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:21:20.962 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:21:21.440 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:21:21.917 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:21:22.395 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:21:22.873 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:21:23.350 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:21:23.827 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:21:24.304 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:21:24.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:21:24.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:21:24.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:24.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:24.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:24.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:24.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:24.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:24.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:24.420 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:21:24.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:24.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:24.421 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:24.421 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:24.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:24.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:24.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:24.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:29.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:29.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:29.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:29.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:29.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:29.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:29.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:29.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:29.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:29.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:29.436 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:21:29.441 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:21:29.442 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:21:29.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:29.442 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:29.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:29.443 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:21:29.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:29.444 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:21:29.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:21:29.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:21:29.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:29.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:29.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:29.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:21:29.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:29.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:21:29.449 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:21:29.449 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:21:29.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:29.449 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:29.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:29.449 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:21:29.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:29.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:21:29.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:21:29.453 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:21:29.453 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:21:29.453 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:29.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:29.455 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:29.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:29.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:29.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:29.455 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:21:29.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:34.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:34.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:34.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:34.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:34.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:34.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:34.471 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:34.472 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:34.472 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:34.472 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:21:34.476 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:21:34.477 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:21:34.477 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:34.477 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:34.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:34.478 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:21:34.478 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:34.478 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:21:34.480 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:21:34.480 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:21:34.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:34.481 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:34.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:34.481 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:21:34.481 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:34.481 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:21:34.483 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:21:34.483 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:21:34.483 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:34.483 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:34.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:34.484 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:21:34.484 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:34.484 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:21:34.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:21:34.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:21:34.487 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:21:34.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:34.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:21:34.976 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:21:35.022 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:21:35.024 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:21:35.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:21:35.027 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:21:35.456 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:21:35.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:35.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:35.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:35.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:35.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:21:36.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:21:36.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:36.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:36.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:36.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:36.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:21:37.369 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:21:37.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:37.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:37.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:37.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:37.846 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:21:38.324 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:21:38.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:38.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:38.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:38.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:38.802 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:21:39.280 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:21:39.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:39.497 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:39.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:39.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:39.758 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:21:40.236 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:21:40.715 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:21:41.194 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:21:41.672 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:21:42.150 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:21:42.628 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:21:43.106 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:21:43.585 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:21:44.063 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:21:44.541 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:21:45.018 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:21:45.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:45.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:45.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:45.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:45.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:45.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:45.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:45.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:45.039 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:21:45.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:45.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:45.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:45.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:45.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:45.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:45.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:45.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:45.039 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:21:50.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:50.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:50.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:50.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:50.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:50.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:50.050 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:50.051 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:50.051 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:50.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:50.052 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:21:50.056 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:21:50.056 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:21:50.056 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:50.056 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:50.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:50.057 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:21:50.057 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:50.057 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:21:50.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:21:50.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:21:50.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:50.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:50.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:50.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:21:50.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:50.063 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:21:50.067 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:21:50.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:21:50.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:50.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:50.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:50.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:21:50.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:50.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:21:50.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:21:50.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:21:50.073 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:21:50.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:50.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:50.076 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:50.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:55.079 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:21:55.080 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:21:55.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:55.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:55.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:55.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:55.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:21:55.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:55.092 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:55.092 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:21:55.092 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:21:55.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:21:55.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:21:55.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:55.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:55.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:21:55.098 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:21:55.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:21:55.098 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:21:55.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:21:55.101 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:21:55.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:55.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:55.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:21:55.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:21:55.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:21:55.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:21:55.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:21:55.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:21:55.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:55.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:21:55.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:21:55.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:21:55.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:21:55.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:21:55.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:21:55.107 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:21:55.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:21:55.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:21:55.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:21:55.587 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:21:55.642 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:21:55.643 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:21:55.645 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:21:55.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:21:56.065 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:21:56.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:56.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:56.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:56.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:56.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:21:57.021 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:21:57.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:57.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:57.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:57.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:57.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:21:57.978 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:21:58.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:58.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:58.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:58.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:58.456 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:21:58.934 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:21:59.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:21:59.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:21:59.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:21:59.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:21:59.412 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:21:59.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:22:00.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:00.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:00.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:00.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:00.369 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:22:00.849 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:22:01.327 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:22:01.807 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:22:02.288 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:22:02.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:22:03.246 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:22:03.726 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:22:04.205 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:22:04.685 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:22:05.164 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:22:05.643 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:22:06.121 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:22:06.599 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:22:07.078 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:22:07.556 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:22:07.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:07.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:07.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:07.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:07.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:07.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:07.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:07.657 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:22:07.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:12.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:12.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:12.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:12.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:12.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:12.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:12.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:12.680 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:12.680 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:12.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:12.681 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:22:12.686 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:22:12.686 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:22:12.686 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:12.686 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:12.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:12.687 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:22:12.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:12.687 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:22:12.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:22:12.692 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:22:12.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:12.692 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:12.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:12.692 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:22:12.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:12.692 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:22:12.695 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:22:12.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:22:12.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:12.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:12.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:12.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:22:12.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:12.696 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:22:12.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:22:12.700 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:22:12.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:12.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:12.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:12.705 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:22:13.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:22:13.232 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:22:13.235 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:22:13.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:13.237 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:22:13.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:13.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:13.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:13.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:13.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:13.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:13.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:22:13.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:22:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:22:13.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:13.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:13.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:13.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:14.143 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:22:14.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:22:14.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:14.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:14.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:14.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:15.099 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:22:15.576 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:22:15.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:15.706 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:15.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:15.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:16.054 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:22:16.531 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:22:16.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:16.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:16.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:16.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:17.009 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:22:17.487 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:22:17.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:17.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:17.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:17.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:17.965 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:22:18.443 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:22:18.920 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:22:19.398 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:22:19.876 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:22:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:22:20.831 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:22:21.309 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:22:21.787 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:22:22.265 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:22:22.743 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:22:23.221 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:22:23.698 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:22:24.175 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:22:24.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:24.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:24.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:24.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:24.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:24.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:24.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:24.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:24.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:24.290 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:22:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:24.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:24.290 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:24.290 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:24.290 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:24.290 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:24.290 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:24.290 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:29.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:29.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:29.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:29.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:29.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:29.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:29.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:29.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:29.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:29.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:29.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:22:29.311 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:22:29.312 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:22:29.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:29.312 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:29.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:29.313 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:22:29.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:29.314 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:22:29.316 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:22:29.316 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:22:29.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:29.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:29.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:29.316 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:22:29.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:29.316 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:22:29.319 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:22:29.319 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:22:29.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:29.319 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:29.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:29.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:22:29.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:29.320 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:22:29.323 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:22:29.323 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:22:29.323 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:29.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:29.328 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:22:29.814 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:22:29.852 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:22:29.853 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:22:29.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:29.855 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:22:29.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:29.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:29.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:29.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:29.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:29.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:29.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:22:29.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:22:30.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:22:30.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:30.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:30.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:30.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:30.769 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:22:31.247 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:22:31.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:31.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:31.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:31.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:31.725 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:22:32.203 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:22:32.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:32.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:32.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:32.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:32.680 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:22:33.159 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:22:33.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:33.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:33.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:33.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:33.635 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:22:34.113 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:22:34.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:34.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:34.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:34.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:34.591 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:22:35.069 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:22:35.547 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:22:36.024 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:22:36.502 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:22:36.980 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:22:37.458 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:22:37.936 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:22:38.414 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:22:38.891 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:22:39.370 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:22:39.848 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:22:40.325 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:22:40.803 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:22:41.281 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:22:41.759 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:22:42.232 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:22:42.701 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:22:43.173 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:22:43.646 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:22:44.123 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:22:44.598 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:22:44.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:44.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:44.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:44.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:44.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:44.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:44.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:44.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:44.917 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:44.917 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:22:44.917 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3335 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:44.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:44.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3335 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3335 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3335 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3335 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3335 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.919 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.919 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.919 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.919 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:44.919 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3336 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:49.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:49.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:49.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:49.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:49.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:49.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:49.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:49.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:49.918 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:49.918 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:49.918 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:22:49.919 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:22:49.919 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:22:49.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:49.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:49.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:49.919 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:22:49.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:49.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:22:49.920 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:22:49.920 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:22:49.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:49.920 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:49.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:49.920 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:22:49.920 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:49.920 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:22:49.921 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:22:49.921 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:22:49.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:49.921 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:49.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:49.921 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:22:49.921 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:49.921 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:22:49.923 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:22:49.923 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:22:49.923 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:49.928 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:22:50.399 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:22:50.435 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:22:50.435 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:22:50.436 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:22:50.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:50.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:50.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:50.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:50.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:50.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:50.438 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:50.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:22:50.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:22:50.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:50.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:50.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:50.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:50.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:50.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:50.445 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:50.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:50.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:50.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:50.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:50.445 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:22:50.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:55.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:55.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:55.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:55.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:55.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:55.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:55.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:55.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:55.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:55.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:22:55.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:22:55.462 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:22:55.462 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:22:55.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:55.462 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:55.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:55.462 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:22:55.462 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:22:55.463 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:22:55.464 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:22:55.464 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:22:55.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:55.464 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:55.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:55.464 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:22:55.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:22:55.464 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:22:55.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:22:55.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:22:55.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:55.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:22:55.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:55.466 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:22:55.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:22:55.466 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:22:55.468 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:22:55.468 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:22:55.468 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:22:55.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:22:55.473 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:22:55.943 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:22:55.988 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:22:55.989 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:22:55.989 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:22:55.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:55.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:55.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:55.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:56.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.004 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:22:56.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:22:56.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:56.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:56.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:22:56.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:22:56.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:56.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:56.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.370 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:22:56.370 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:22:56.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.412 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:22:56.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:56.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:56.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:56.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:56.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:56.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:56.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:56.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:22:56.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:56.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:22:56.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:22:56.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:22:56.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:22:56.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:56.881 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:22:57.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:22:57.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:22:57.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:22:57.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:22:57.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:22:57.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:22:57.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:22:57.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:22:57.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:22:57.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:22:57.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:22:57.217 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:22:57.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:57.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:22:57.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:22:57.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:22:57.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:57.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:22:57.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:23:02.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:23:02.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:23:02.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:02.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:02.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:02.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:02.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:02.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:23:02.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:02.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:23:02.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:23:02.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:23:02.224 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:23:02.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:23:02.224 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:02.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:02.224 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:23:02.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:23:02.224 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:23:02.226 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:23:02.226 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:23:02.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:23:02.226 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:02.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:02.226 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:23:02.226 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:23:02.226 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:23:02.228 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:23:02.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:23:02.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:23:02.229 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:02.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:02.229 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:23:02.229 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:23:02.229 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.232 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:23:02.232 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:23:02.232 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:23:02.232 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:02.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:02.237 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:23:02.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:23:02.752 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:23:02.753 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:23:02.754 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:23:02.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:02.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:02.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:02.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:02.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:02.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:02.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:02.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:02.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:02.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:02.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:02.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:02.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:02.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:02.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:02.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:02.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:03.175 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:23:03.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:03.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:03.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:03.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:03.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:23:04.123 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:23:04.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:04.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:04.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:04.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:04.594 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:23:05.063 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:23:05.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:05.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:05.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:05.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:05.534 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:23:06.002 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:23:06.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:06.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:06.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:06.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:06.472 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:23:06.944 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:23:07.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:07.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:07.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:07.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:07.414 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:23:07.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:07.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:07.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:07.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:07.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:07.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:07.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:07.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:07.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:07.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:07.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:07.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:07.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:07.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:07.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:07.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:07.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:07.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:07.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:07.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:07.882 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:23:08.354 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:23:08.825 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:23:09.297 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:23:09.767 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:23:10.236 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:23:10.707 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:23:11.184 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:23:11.656 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:23:12.131 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:23:12.609 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:23:12.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:12.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:12.834 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:12.854 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:12.854 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:12.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:12.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:12.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:12.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:12.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:12.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:12.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:12.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:12.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:12.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:12.890 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:12.890 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:12.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:12.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:13.086 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:23:13.564 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:23:14.041 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:23:14.519 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:23:14.997 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:23:15.474 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:23:15.951 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:23:16.429 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:23:16.906 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:23:17.384 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:23:17.862 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:23:17.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:17.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:17.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:17.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:17.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:17.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:17.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:17.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:17.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:17.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:17.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:17.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:17.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:17.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:17.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:17.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:17.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:17.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:17.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:17.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:18.338 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:23:18.816 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:23:19.294 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:23:19.772 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:23:20.249 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:23:20.727 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:23:21.205 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:23:21.683 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:23:22.160 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:23:22.638 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:23:22.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:22.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:22.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:22.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:22.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:22.975 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:22.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:22.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:22.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:22.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:22.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:22.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:22.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:23:22.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:23:22.978 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:23:22.978 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:23:22.978 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:23:22.978 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:23:22.978 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:23:22.978 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:23:22.978 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:23:27.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:23:27.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:23:27.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:27.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:27.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:27.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:27.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:27.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:23:27.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:27.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:23:27.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:23:28.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:23:28.000 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:23:28.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:23:28.001 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:28.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:28.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:23:28.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:23:28.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:23:28.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:23:28.006 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:23:28.006 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:23:28.006 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:28.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:28.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:23:28.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:23:28.007 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:23:28.011 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:23:28.011 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:23:28.011 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:23:28.011 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:28.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:28.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:23:28.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:23:28.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:23:28.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:23:28.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.018 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:23:28.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:23:28.018 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:23:28.019 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:28.023 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:23:28.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:23:28.550 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:23:28.552 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:23:28.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:28.554 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:23:28.573 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:28.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:28.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:28.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:28.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:28.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:28.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:28.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:28.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:28.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:28.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:28.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:28.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:28.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:28.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:28.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:28.985 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:23:29.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:29.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:29.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:29.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:23:29.941 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:23:30.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:30.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:30.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:30.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:30.419 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:23:30.897 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:23:31.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:31.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:31.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:31.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:31.375 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:23:31.853 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:23:32.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:32.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:32.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:32.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:32.331 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:23:32.808 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:23:33.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:33.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:33.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:33.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:33.286 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:23:33.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:33.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:33.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:33.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:33.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:33.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:33.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:33.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:33.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:33.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:33.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:33.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:33.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:33.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:33.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:33.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:33.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:33.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:33.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:33.763 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:23:34.241 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:23:34.718 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:23:35.196 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:23:35.674 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:23:36.152 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:23:36.630 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:23:37.108 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:23:37.587 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:23:38.065 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:23:38.542 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:23:38.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:38.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:38.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:38.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:38.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:38.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:38.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:38.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:38.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:38.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:38.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:38.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:38.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:38.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:38.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:38.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:38.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:38.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:38.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:38.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:39.019 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:23:39.497 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:23:39.975 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:23:40.452 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:23:40.930 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:23:41.407 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:23:41.885 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:23:42.362 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:23:42.840 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:23:43.317 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:23:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:43.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:43.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:43.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:43.795 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:23:43.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:43.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:43.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:43.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:43.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:43.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:43.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:43.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:43.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:43.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:43.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:43.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:43.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:43.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:43.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:43.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:44.271 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:23:44.750 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:23:45.228 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:23:45.706 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:23:46.183 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:23:46.660 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:23:47.138 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:23:47.616 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:23:48.094 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:23:48.571 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:23:48.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:48.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:48.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:48.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:48.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:23:48.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:23:48.861 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:23:53.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:23:53.865 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:23:53.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:53.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:53.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:53.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:53.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:23:53.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:23:53.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:53.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:23:53.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:23:53.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:23:53.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:23:53.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:23:53.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:53.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:23:53.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:23:53.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:23:53.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:23:53.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:23:53.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:23:53.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:23:53.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:53.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:23:53.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:23:53.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:23:53.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:23:53.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:23:53.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:23:53.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:23:53.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:23:53.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:23:53.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:23:53.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:23:53.884 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:23:53.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:23:53.886 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:23:53.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:23:53.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:23:53.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:23:54.375 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:23:54.417 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:23:54.419 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:23:54.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:54.421 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:23:54.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:54.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:54.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:54.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:54.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:54.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:54.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:54.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:54.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:54.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:54.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:54.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:54.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:54.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:54.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:54.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:54.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:23:54.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:54.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:54.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:54.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:55.330 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:23:55.808 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:23:55.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:55.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:55.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:55.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:56.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:23:56.765 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:23:56.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:56.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:56.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:56.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:57.243 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:23:57.721 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:23:57.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:57.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:57.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:57.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:58.198 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:23:58.676 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:23:58.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:23:58.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:23:58.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:23:58.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:23:59.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:23:59.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:59.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:59.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:59.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:59.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:59.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:59.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:59.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:23:59.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:23:59.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:23:59.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:23:59.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:59.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:59.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:59.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:23:59.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:23:59.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:23:59.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:23:59.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:59.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:23:59.631 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:24:00.110 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:24:00.588 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:24:01.065 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:24:01.543 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:24:02.022 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:24:02.499 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:24:02.978 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:24:03.456 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:24:03.934 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:24:04.412 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:24:04.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:04.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:04.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:04.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:04.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:04.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:04.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:04.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:04.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:04.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:04.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:04.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:04.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:04.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:04.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:04.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:04.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:04.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:04.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:04.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:04.889 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:24:05.367 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:24:05.845 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:24:06.322 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:24:06.799 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:24:07.277 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:24:07.755 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:24:08.233 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:24:08.710 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:24:09.187 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:24:09.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:09.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:09.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:09.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:09.665 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:24:09.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:09.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:09.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:09.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:09.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:09.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:09.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:09.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:09.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:09.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:09.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:09.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:09.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:09.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:09.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:09.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:10.142 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:24:10.619 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:24:11.097 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:24:11.575 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:24:12.052 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:24:12.530 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:24:13.009 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:24:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:24:13.966 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:24:14.444 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:24:14.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:14.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:14.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:14.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:14.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:14.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:14.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:14.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:14.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:14.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:14.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:24:14.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:24:14.736 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:24:14.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:14.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:19.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:24:19.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:24:19.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:19.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:19.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:19.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:19.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:19.746 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:24:19.746 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:19.747 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:24:19.747 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:24:19.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:24:19.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:24:19.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:24:19.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:19.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:19.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:24:19.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:24:19.751 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:24:19.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:24:19.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:24:19.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:24:19.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:19.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:19.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:24:19.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:24:19.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:24:19.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:24:19.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:24:19.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:24:19.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:19.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:19.757 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:24:19.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:24:19.757 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:24:19.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:24:19.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:24:19.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:24:19.762 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:24:19.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:19.764 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:19.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:24:20.250 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:24:20.301 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:24:20.303 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:24:20.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:20.305 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:24:20.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:20.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:20.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:20.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:20.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:20.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:20.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:20.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:20.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:20.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:20.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:20.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:20.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:20.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:20.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:20.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:24:20.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:20.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:20.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:20.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:24:21.683 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:24:21.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:21.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:21.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:21.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:22.161 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:24:22.639 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:24:22.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:22.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:22.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:22.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:23.117 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:24:23.594 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:24:23.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:23.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:23.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:23.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:24.072 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:24:24.550 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:24:24.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:24.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:24.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:24.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:25.028 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:24:25.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:25.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:25.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:25.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:25.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:25.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:25.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:25.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:25.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:25.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:25.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:25.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:25.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:25.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:25.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:25.424 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:25.446 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:25.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:25.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:25.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:25.505 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:24:25.982 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:24:26.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:24:26.938 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:24:27.416 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:24:27.895 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:24:28.373 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:24:28.851 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:24:29.329 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:24:29.807 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:24:30.286 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:24:30.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:30.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:30.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:30.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:30.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:30.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:30.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:30.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:30.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:30.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:30.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:30.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:30.484 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:30.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:30.484 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:30.484 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:30.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:30.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:30.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:30.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:30.762 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:24:31.240 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:24:31.718 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:24:32.196 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:24:32.674 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:24:33.152 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:24:33.628 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:24:34.106 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:24:34.584 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:24:35.062 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:24:35.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:35.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:35.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:35.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:35.539 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:24:35.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:35.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:35.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:35.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:35.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:35.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:35.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:35.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:35.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:35.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:35.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:35.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:35.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:35.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:35.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:35.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:36.016 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:24:36.493 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:24:36.971 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:24:37.448 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:24:37.926 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:24:38.404 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:24:38.882 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:24:39.359 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:24:39.836 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:24:40.314 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:24:40.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:40.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:40.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:40.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:40.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:40.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:40.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:40.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:40.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:40.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:40.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:40.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:40.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:24:40.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:24:40.600 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:24:40.600 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:40.600 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:40.600 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:40.600 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:40.600 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:40.600 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:45.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:24:45.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:24:45.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:45.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:45.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:45.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:45.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:45.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:24:45.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:45.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:24:45.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:24:45.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:24:45.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:24:45.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:24:45.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:45.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:45.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:24:45.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:24:45.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:24:45.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:24:45.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:24:45.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:24:45.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:45.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:45.624 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:24:45.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:24:45.624 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:24:45.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:24:45.627 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:24:45.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:24:45.627 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:45.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:45.627 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:24:45.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:24:45.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:24:45.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:24:45.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:24:45.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:24:45.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:24:45.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:24:45.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:24:45.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:24:45.631 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:24:45.631 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:24:45.631 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:45.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:24:46.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:24:46.157 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:24:46.160 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:24:46.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:46.163 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:24:46.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:46.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:46.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:46.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:46.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:46.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:46.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:46.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:46.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:46.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:46.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:46.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:46.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:46.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:46.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:46.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:46.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:46.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:46.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:46.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.597 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:24:46.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:46.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:46.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:46.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:46.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:46.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:46.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:46.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:46.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:46.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:46.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:46.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:46.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:46.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:46.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:46.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:46.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:46.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:47.074 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:24:47.551 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:24:47.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:47.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:47.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:47.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:47.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:47.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:47.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:47.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:47.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:47.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:47.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:47.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:47.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:47.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:47.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:47.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:47.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:47.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:47.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:47.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:47.732 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:47.732 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:47.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:47.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:48.028 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:24:48.507 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:24:48.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:48.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:48.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:48.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:48.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:48.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:48.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:48.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:48.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:48.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:48.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:48.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:48.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:24:48.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:24:48.608 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:24:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:24:53.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:24:53.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:24:53.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:53.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:53.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:53.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:53.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:24:53.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:24:53.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:53.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:24:53.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:24:53.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:24:53.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:24:53.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:24:53.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:53.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:24:53.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:24:53.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:24:53.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:24:53.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:24:53.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:24:53.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:24:53.626 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:53.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:24:53.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:24:53.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:24:53.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:24:53.629 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:24:53.629 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:24:53.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:24:53.630 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:24:53.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:24:53.630 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:24:53.630 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:24:53.630 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:24:53.633 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:24:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:24:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:24:53.634 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:24:53.634 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:24:53.634 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:24:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:24:53.639 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:24:54.121 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:24:54.162 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:24:54.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:54.163 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:24:54.163 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:24:54.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:54.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:54.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:54.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:24:54.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:24:54.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:24:54.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:24:54.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:54.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:54.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:54.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:24:54.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:24:54.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:24:54.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:24:54.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:54.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:24:54.600 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:24:54.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:54.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:55.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:24:55.555 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:24:55.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:56.033 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:24:56.511 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:24:56.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:56.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:56.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:56.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:56.989 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:24:57.467 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:24:57.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:57.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:57.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:57.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:57.944 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:24:58.422 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:24:58.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:24:58.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:24:58.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:24:58.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:24:58.900 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:24:59.378 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:24:59.856 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:25:00.334 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:25:00.812 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:25:01.290 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:25:01.767 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:25:02.245 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:25:02.723 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:25:03.202 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:25:03.679 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:25:04.157 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:25:04.635 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:25:05.113 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:25:05.590 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:25:06.068 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:25:06.546 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:25:07.024 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:25:07.501 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:25:07.979 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:25:08.457 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:25:08.935 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:25:09.412 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:25:09.890 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:25:10.368 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:25:10.846 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:25:11.324 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:25:11.802 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:25:12.279 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:25:12.757 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:25:13.234 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:25:13.712 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:25:14.190 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:25:14.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:14.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:25:14.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:14.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:14.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:14.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:14.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:25:14.281 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:14.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:14.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:25:14.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:25:14.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:14.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:25:14.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:25:14.282 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:25:14.282 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:25:14.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:25:14.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:25:14.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:14.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:14.669 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:25:15.147 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:25:15.625 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:25:16.104 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:25:16.582 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:25:17.060 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:25:17.538 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:25:18.016 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:25:18.495 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:25:18.973 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:25:19.451 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:25:19.929 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:25:20.407 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:25:20.885 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:25:21.363 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:25:21.842 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:25:22.320 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:25:22.798 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:25:23.277 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:25:23.755 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:25:24.233 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:25:24.711 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:25:25.189 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:25:25.667 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:25:26.145 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:25:26.623 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:25:27.094 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:25:27.571 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:25:28.050 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:25:28.527 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:25:29.005 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:25:29.483 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:25:29.961 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:25:30.439 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:25:30.918 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:25:31.395 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:25:31.874 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:25:32.352 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:25:32.830 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:25:33.308 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:25:33.786 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:25:34.264 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:25:34.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:34.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:25:34.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:34.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:34.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:34.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:34.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:25:34.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:34.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:34.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:25:34.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:25:34.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:34.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:25:34.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:25:34.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:25:34.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:25:34.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:25:34.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:25:34.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:34.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:34.741 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:25:35.218 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:25:35.695 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:25:36.173 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:25:36.651 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:25:37.128 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:25:37.606 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:25:38.083 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:25:38.560 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:25:39.038 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:25:39.516 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:25:39.994 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:25:40.472 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:25:40.950 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:25:41.428 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:25:41.906 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 04:25:42.384 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 04:25:42.861 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 04:25:43.338 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 04:25:43.816 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 04:25:44.294 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 04:25:44.771 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 04:25:45.249 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 04:25:45.727 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 04:25:46.205 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 04:25:46.683 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 04:25:47.161 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 04:25:47.638 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 04:25:48.116 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 04:25:48.594 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 04:25:49.072 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 04:25:49.550 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 04:25:50.028 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 04:25:50.505 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 04:25:50.983 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 04:25:51.460 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 04:25:51.938 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 04:25:52.415 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 04:25:52.892 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 04:25:53.370 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 04:25:53.847 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 04:25:54.325 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 04:25:54.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:54.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:25:54.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:54.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:54.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:54.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:54.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:25:54.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:25:54.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:25:54.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:25:54.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:25:54.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:54.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:25:54.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:25:54.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:25:54.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:25:54.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:25:54.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:25:54.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:54.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:25:54.801 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 04:25:55.279 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 04:25:55.757 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 04:25:56.236 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 04:25:56.714 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 04:25:57.191 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 04:25:57.669 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 04:25:58.147 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 04:25:58.625 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 04:25:59.103 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 04:25:59.581 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 04:26:00.059 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 04:26:00.537 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 04:26:01.015 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 04:26:01.492 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 04:26:01.971 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 04:26:02.449 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 04:26:02.928 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 04:26:03.407 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 04:26:03.885 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 04:26:04.363 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 04:26:04.840 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 04:26:05.318 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 04:26:05.795 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 04:26:06.272 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 04:26:06.750 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 04:26:07.227 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 04:26:07.705 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 04:26:08.183 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 04:26:08.660 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 04:26:09.138 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 04:26:09.615 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 04:26:10.093 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 04:26:10.570 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 04:26:11.047 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 04:26:11.525 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 04:26:12.002 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 04:26:12.480 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 04:26:12.958 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 04:26:13.436 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 04:26:13.914 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 04:26:14.391 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 04:26:14.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:14.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:14.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:14.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:14.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:14.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:26:14.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:26:14.479 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:26:14.479 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=17259 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:26:14.479 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=17259 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:26:14.479 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=17259 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:26:14.480 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=17259 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:26:19.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:26:19.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:26:19.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:19.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:19.486 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:19.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:19.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:19.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:26:19.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:19.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:26:19.499 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:26:19.501 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:26:19.501 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:26:19.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:26:19.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:19.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:19.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:26:19.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:26:19.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:26:19.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:26:19.503 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:26:19.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:26:19.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:19.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:26:19.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:19.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:26:19.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:26:19.504 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:26:19.504 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:26:19.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:26:19.504 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:19.504 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:26:19.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:19.504 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:26:19.504 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:26:19.506 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:26:19.506 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:26:19.506 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:19.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:19.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:26:19.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:26:19.507 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:26:24.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:26:24.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:26:24.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:24.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:24.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:24.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:24.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:24.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:26:24.532 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:24.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:26:24.533 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:26:24.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:26:24.537 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:26:24.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:26:24.538 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:24.538 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:24.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:26:24.539 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:26:24.539 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:26:24.543 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:26:24.543 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:26:24.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:26:24.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:24.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:24.544 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:26:24.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:26:24.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:26:24.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:26:24.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:26:24.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:26:24.548 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:24.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:24.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:26:24.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:26:24.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:26:24.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:26:24.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:26:24.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:26:24.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:26:24.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:26:24.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:26:24.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:26:24.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:26:24.554 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:26:24.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:24.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:24.559 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:26:25.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:26:25.094 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:26:25.097 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:26:25.099 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:26:25.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:25.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:25.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:25.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:25.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.394 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:25.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:25.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:25.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.520 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:26:25.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:25.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:25.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:25.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:25.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:25.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:25.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:25.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:25.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:25.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:25.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:25.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:25.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:25.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:25.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:25.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:25.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:25.997 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:26:26.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:26.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:26.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:26.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:26.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:26.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:26.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:26.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.274 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:26.274 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:26.274 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:26.274 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:26.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:26.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:26.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:26:26.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:26.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:26.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:26.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:26.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:26.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:26.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:26.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:26.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:26.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:26.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:26.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:26.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:26.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:26.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:26.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:26.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:26.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:26.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:26.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:26.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:26.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:26.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:26.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:26.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:26.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:26.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:26.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:26.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:26.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:26.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:26.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:26.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:26.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:26.950 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:26:27.427 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:26:27.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:27.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:27.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:27.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:27.905 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:26:28.383 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:26:28.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:28.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:28.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:28.563 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:28.861 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:26:29.338 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:26:29.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:29.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:29.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:29.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:29.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:29.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:29.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:29.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:29.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:29.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:29.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:29.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:29.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:29.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:29.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:29.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:29.564 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:29.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:29.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:29.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:29.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:29.816 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:26:30.294 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:26:30.772 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:26:31.249 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:26:31.727 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:26:32.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:32.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:32.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:32.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:32.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:32.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:32.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:32.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:32.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:32.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:32.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:32.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:32.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:32.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:32.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:32.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:32.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:32.205 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:26:32.682 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:26:33.160 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:26:33.638 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:26:34.115 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:26:34.592 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:26:34.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:34.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:34.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:34.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:34.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:34.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:34.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:34.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:34.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:34.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:34.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:34.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:34.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:34.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:34.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:34.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:34.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:34.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:34.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:34.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:35.070 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:26:35.548 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:26:36.026 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:26:36.504 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:26:36.982 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:26:37.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:37.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:37.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:37.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:37.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:37.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:37.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:37.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:37.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:37.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:37.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:37.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:37.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:37.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:37.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:37.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:37.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:37.460 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:26:37.937 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:26:38.415 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:26:38.892 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:26:39.370 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:26:39.848 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:26:39.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:39.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:39.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:39.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:39.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:39.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:39.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:39.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:39.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:39.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:39.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:39.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:39.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:39.985 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:39.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:39.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:39.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:40.325 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:26:40.803 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:26:41.282 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:26:41.759 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:26:42.237 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:26:42.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:42.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:42.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:42.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:42.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:42.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:42.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:42.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:42.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:42.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:42.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:42.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:42.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:26:42.573 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:26:42.573 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:26:47.573 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:26:47.574 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:26:47.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:47.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:47.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:47.577 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:47.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:26:47.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:26:47.585 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:47.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:26:47.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:26:47.587 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:26:47.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:26:47.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:26:47.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:47.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:26:47.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:26:47.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:26:47.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:26:47.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:26:47.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:26:47.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:26:47.591 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:47.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:26:47.592 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:26:47.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:26:47.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:26:47.594 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:26:47.595 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:26:47.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:26:47.595 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:26:47.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:26:47.595 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:26:47.595 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:26:47.595 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:26:47.598 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:26:47.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:26:47.598 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:26:47.598 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:26:47.598 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:26:47.598 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:26:47.599 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:26:47.599 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:26:47.599 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:26:47.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:26:47.604 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:26:48.086 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:26:48.130 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:26:48.132 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:26:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:48.135 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:26:48.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:48.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:48.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:48.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:48.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:48.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:48.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:48.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:48.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:48.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:48.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:48.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:48.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:48.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:48.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:48.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:48.563 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:26:48.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:48.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:49.041 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:26:49.519 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:26:49.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:49.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:49.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:49.997 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:26:50.476 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:26:50.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:50.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:50.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:50.954 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:26:51.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:51.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:51.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:51.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:51.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:51.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:51.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:51.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:51.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:51.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:51.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:51.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:51.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:51.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:51.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:51.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:51.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:51.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:51.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:51.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:51.430 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:26:51.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:51.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:51.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:51.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:51.908 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:26:52.386 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:26:52.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:26:52.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:26:52.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:26:52.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:26:52.864 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:26:53.342 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:26:53.819 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:26:54.297 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:26:54.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:54.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:54.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:54.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:54.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:54.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:54.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:54.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:54.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:54.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:54.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:54.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:54.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:54.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:54.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:54.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:54.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:54.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:54.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:54.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:54.774 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:26:55.252 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:26:55.730 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:26:56.208 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:26:56.685 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:26:57.163 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:26:57.640 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:26:57.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:57.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:57.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:57.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:57.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:57.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:57.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:57.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:26:57.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:26:57.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:26:57.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:26:57.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:57.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:57.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:57.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:26:57.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:26:57.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:26:57.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:26:57.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:57.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:26:58.117 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:26:58.595 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:26:59.073 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:26:59.551 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:27:00.029 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:27:00.506 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:27:00.985 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:27:01.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:01.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:01.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:01.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:01.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:01.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:01.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:01.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:01.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:01.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:01.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:01.050 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:27:01.050 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:01.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:06.047 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:06.047 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:06.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:06.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:06.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:06.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:06.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:06.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:06.052 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:06.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:06.052 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:27:06.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:27:06.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:27:06.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:06.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:06.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:06.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:27:06.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:06.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:27:06.054 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:27:06.054 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:27:06.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:06.054 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:06.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:06.054 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:27:06.054 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:06.054 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:27:06.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:27:06.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:27:06.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:06.055 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:06.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:06.055 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:27:06.055 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:06.055 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:27:06.057 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:27:06.057 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:27:06.057 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:06.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:06.062 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:27:06.533 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:27:06.588 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:27:06.589 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:27:06.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:06.590 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:27:06.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:06.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:06.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:06.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:06.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:06.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:06.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:06.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:06.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:06.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:06.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:06.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:06.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:06.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:06.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:06.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:06.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:06.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:06.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:06.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:07.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:07.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:07.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:07.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:27:07.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:07.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:07.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:07.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:07.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:07.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:07.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:07.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:07.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:07.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:07.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:07.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:07.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:07.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:07.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:07.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:07.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:07.479 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:27:07.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:07.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:07.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:07.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:07.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:07.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:07.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:07.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:07.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:07.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:07.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:07.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:07.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:07.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:07.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:07.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:07.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:07.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:07.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:07.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:07.947 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:27:08.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:08.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:08.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:08.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:08.415 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:27:08.884 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:27:09.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:09.061 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:09.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:09.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:09.356 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:27:09.828 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:27:10.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:10.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:10.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:10.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:10.303 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:27:10.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:10.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:10.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:10.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:10.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:10.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:10.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:10.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:10.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:10.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:10.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:10.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:10.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:10.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:10.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:10.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:10.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:10.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:10.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:10.777 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:27:11.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:11.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:11.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:11.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:11.250 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:27:11.724 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:27:12.197 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:27:12.670 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:27:13.146 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:27:13.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:13.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:13.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:13.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:13.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:13.479 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:13.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:13.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:13.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:13.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:13.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:13.484 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:27:13.484 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:13.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:13.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:13.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:13.485 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:13.485 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:13.485 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:13.485 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:13.485 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:13.485 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:18.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:18.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:18.486 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:18.488 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:18.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:18.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:18.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:18.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:18.500 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:18.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:18.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:27:18.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:27:18.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:27:18.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:18.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:18.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:18.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:27:18.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:18.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:27:18.503 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:27:18.503 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:27:18.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:18.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:18.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:18.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:27:18.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:18.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:27:18.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:27:18.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:27:18.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:18.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:18.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:18.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:27:18.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:18.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:27:18.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:27:18.507 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:27:18.507 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:18.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:18.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:27:18.981 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:27:19.034 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:27:19.035 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:27:19.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:19.035 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:27:19.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:19.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:19.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:19.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:19.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:19.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:19.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:19.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:19.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:19.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:19.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:19.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:19.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:19.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:19.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:19.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:19.453 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:27:19.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:19.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:19.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:19.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:19.923 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:27:20.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:20.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:20.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:20.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:20.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:20.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:20.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:20.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:20.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:20.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:20.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:20.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:20.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:20.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:20.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:20.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:20.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:20.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:20.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:20.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:20.393 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:27:20.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:20.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:20.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:20.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:20.866 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:27:21.334 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:27:21.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:21.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:21.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:21.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:21.805 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:27:22.275 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:27:22.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:22.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:22.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:22.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:22.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:22.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:22.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:22.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:22.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:22.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:22.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:22.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:22.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:22.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:22.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:22.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:22.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:22.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:22.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:22.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:22.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:22.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:22.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:22.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:22.745 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:27:23.217 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:27:23.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:23.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:23.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:23.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:23.687 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:27:24.161 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:27:24.638 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:27:25.114 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:27:25.584 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:27:26.055 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:27:26.527 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:27:27.001 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:27:27.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:27.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:27.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:27.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:27.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:27.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:27.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:27.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:27.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:27.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:27.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:27.472 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:27:27.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:27.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:27.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:27.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:27.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:27.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:27.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:27.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:27.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:27.942 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:27:28.414 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:27:28.884 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:27:29.356 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:27:29.829 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:27:30.303 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:27:30.779 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:27:31.256 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:27:31.728 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:27:32.200 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:27:32.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:32.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:32.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:32.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:32.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:32.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:32.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:32.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:32.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:32.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:32.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:32.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:32.365 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:32.365 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:32.365 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2995 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2995 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2995 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2995 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2995 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.366 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:32.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2996 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:37.363 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:37.363 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:37.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:37.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:37.365 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:37.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:37.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:37.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:37.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:37.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:37.372 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:27:37.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:27:37.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:27:37.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:37.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:37.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:37.374 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:27:37.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:37.374 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:27:37.375 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:27:37.375 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:27:37.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:37.375 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:37.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:37.375 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:27:37.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:37.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:27:37.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:27:37.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:27:37.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:37.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:37.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:37.377 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:27:37.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:37.377 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:27:37.379 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:27:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:27:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:27:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:27:37.379 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:27:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:27:37.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:27:37.380 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:27:37.380 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:27:37.380 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:37.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:37.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:37.385 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:27:37.855 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:27:37.910 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:27:37.913 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:27:37.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:37.915 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:27:37.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:37.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:37.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:37.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:37.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:37.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:37.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:37.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:37.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:37.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:37.947 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:37.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:37.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:37.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:37.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:37.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:38.329 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:27:38.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:38.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:38.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:38.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:38.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:38.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:38.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:38.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:38.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:38.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:38.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:38.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:38.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:38.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:38.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:38.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:38.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:38.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:38.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:38.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:38.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:38.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:38.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:38.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:38.799 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:27:39.270 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:27:39.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:39.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:39.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:39.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:39.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:39.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:39.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:39.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:39.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:39.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:39.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:39.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:39.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:39.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:39.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:39.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:39.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:39.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:39.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:39.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:39.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:39.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:39.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:39.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:39.740 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:27:40.211 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:27:40.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:40.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:40.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:40.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:40.685 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:27:41.158 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:27:41.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:41.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:41.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:41.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:41.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:41.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:41.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:41.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:41.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:41.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:41.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:41.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:41.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:41.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:41.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:41.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:41.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:41.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:41.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:41.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:41.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:41.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:41.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:41.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:41.628 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:27:42.101 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:27:42.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:42.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:42.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:42.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:42.571 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:27:43.044 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:27:43.516 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:27:43.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:43.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:43.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:43.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:43.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:43.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:43.613 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:43.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:43.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:43.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:43.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:43.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:43.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:43.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:43.614 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:27:43.614 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1349 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:43.614 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1349 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:43.614 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1349 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:43.614 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1349 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:43.614 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1349 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:27:48.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:27:48.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:27:48.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:48.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:48.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:48.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:48.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:27:48.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:48.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:48.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:27:48.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:27:48.635 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:27:48.635 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:27:48.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:48.635 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:48.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:27:48.636 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:27:48.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:27:48.636 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:27:48.637 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:27:48.637 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:27:48.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:48.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:48.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:27:48.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:27:48.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:27:48.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:27:48.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:27:48.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:27:48.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:48.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:27:48.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:27:48.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:27:48.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:27:48.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:27:48.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:27:48.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:27:48.641 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:27:48.641 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:27:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:27:48.645 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:27:49.129 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:27:49.170 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:27:49.172 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:27:49.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:49.175 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:27:49.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:49.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:49.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:49.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:49.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:49.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:49.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:49.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:49.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:49.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:49.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:49.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:49.267 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:49.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:49.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:49.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:49.607 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:27:49.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:49.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:49.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:49.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:50.085 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:27:50.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:27:50.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:50.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:50.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:50.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:51.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:27:51.518 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:27:51.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:51.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:51.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:51.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:51.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:51.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:51.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:51.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:51.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:51.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:51.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:51.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:51.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:51.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:51.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:51.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:51.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:51.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:51.752 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:51.752 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:51.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:51.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:51.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:51.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:51.994 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:27:52.472 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:27:52.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:52.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:52.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:52.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:52.950 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:27:53.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:27:53.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:27:53.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:27:53.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:27:53.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:27:53.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:27:54.384 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:27:54.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:54.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:54.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:54.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:54.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:54.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:54.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:54.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:54.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:54.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:54.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:54.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:54.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:54.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:54.555 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:54.555 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:54.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:54.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:54.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:54.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:54.860 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:27:55.338 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:27:55.816 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:27:56.294 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:27:56.772 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:27:57.248 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:27:57.718 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:27:57.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:57.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:57.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:57.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:57.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:57.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:57.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:57.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:27:57.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:27:57.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:27:57.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:27:57.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:57.898 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:57.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:57.898 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:27:57.898 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:27:57.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:27:57.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:27:57.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:57.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:27:58.187 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:27:58.656 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:27:59.125 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:27:59.593 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:28:00.061 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:28:00.531 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:28:01.002 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:28:01.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:01.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:01.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:01.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:01.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:28:01.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:28:01.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:28:01.320 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:28:06.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:28:06.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:28:06.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:28:06.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:28:06.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:28:06.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:28:06.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:28:06.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:28:06.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:06.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:28:06.328 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:28:06.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:28:06.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:28:06.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:28:06.329 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:06.329 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:28:06.329 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:28:06.329 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:28:06.329 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:28:06.330 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:28:06.330 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:28:06.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:28:06.330 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:06.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:28:06.330 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:28:06.330 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:28:06.330 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:28:06.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:28:06.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:28:06.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:28:06.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:06.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:28:06.331 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:28:06.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:28:06.331 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:28:06.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:28:06.333 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:28:06.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:06.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:06.338 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:28:06.807 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:28:06.849 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:28:06.849 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:28:06.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:06.850 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:28:06.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:06.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:06.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:06.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:06.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:06.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:06.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:06.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:06.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:06.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:06.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:28:06.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:28:06.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:06.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:06.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:06.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:07.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:07.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:07.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:07.107 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:07.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:07.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:07.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:07.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:07.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:07.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:07.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:07.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:28:07.117 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:28:07.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:07.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:07.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.275 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:28:07.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:07.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:07.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:07.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:07.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:07.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:07.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:07.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:07.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:07.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:07.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:07.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:07.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:07.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:07.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:07.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:07.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:28:07.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:28:07.552 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:07.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:07.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:07.744 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:28:08.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:08.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:08.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:08.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:08.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:08.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:08.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:08.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:08.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:08.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:08.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:08.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:08.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:08.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:08.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:28:08.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:28:08.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:08.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:08.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:08.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:08.213 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:28:08.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:08.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:08.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:08.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:08.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:28:08.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:08.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:08.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:08.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:08.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:08.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:08.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:08.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:08.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:28:08.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:28:08.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:28:08.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:28:08.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:28:08.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:28:08.768 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:08.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=531 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:28:13.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:28:13.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:28:13.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:28:13.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:28:13.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:28:13.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:28:13.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:28:13.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:28:13.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:13.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:28:13.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:28:13.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:28:13.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:28:13.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:28:13.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:13.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:28:13.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:28:13.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:28:13.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:28:13.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:28:13.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:28:13.775 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:28:13.775 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:13.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:28:13.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:28:13.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:28:13.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:28:13.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:28:13.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:28:13.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:28:13.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:28:13.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:28:13.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:28:13.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:28:13.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:28:13.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:28:13.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:28:13.779 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:28:13.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:28:13.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:28:13.784 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:28:14.255 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:28:14.293 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:28:14.293 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:28:14.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:14.294 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:28:14.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:14.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:14.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:14.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:14.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:14.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:14.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:14.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:14.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:14.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:14.308 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:28:14.308 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:28:14.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:14.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:14.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:14.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:14.723 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:28:14.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:14.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:14.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:14.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:15.192 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:28:15.662 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:28:15.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:15.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:15.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:15.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:16.130 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:28:16.598 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:28:16.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:16.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:16.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:16.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:17.067 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:28:17.535 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:28:17.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:17.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:17.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:17.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:18.005 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:28:18.476 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:28:18.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:28:18.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:28:18.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:28:18.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:28:18.944 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:28:19.412 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:28:19.881 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:28:20.351 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:28:20.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:28:21.289 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:28:21.759 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:28:22.227 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:28:22.695 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:28:23.163 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:28:23.632 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:28:24.102 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:28:24.573 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:28:25.043 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:28:25.511 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:28:25.979 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:28:26.450 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:28:26.921 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:28:27.392 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:28:27.860 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:28:28.330 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:28:28.798 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:28:29.266 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:28:29.735 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:28:30.204 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:28:30.676 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:28:31.149 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:28:31.622 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:28:32.091 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:28:32.563 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:28:33.041 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:28:33.516 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:28:33.987 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:28:34.458 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:28:34.927 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:28:35.398 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:28:35.867 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:28:36.338 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:28:36.807 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:28:37.275 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:28:37.744 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:28:38.211 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:28:38.681 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:28:39.149 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:28:39.627 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:28:40.101 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:28:40.571 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:28:41.040 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:28:41.508 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:28:41.978 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:28:42.446 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:28:42.914 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:28:43.382 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:28:43.850 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:28:44.319 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:28:44.787 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:28:45.256 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:28:45.725 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:28:46.194 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:28:46.663 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:28:47.132 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:28:47.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:47.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:47.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:47.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:47.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:47.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:47.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:47.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:28:47.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:28:47.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:28:47.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:28:47.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:47.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:47.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:47.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:28:47.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:28:47.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:28:47.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:28:47.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:47.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:28:47.602 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:28:48.073 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:28:48.543 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:28:49.012 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:28:49.484 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:28:49.954 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:28:50.424 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:28:50.895 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:28:51.365 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:28:51.833 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:28:52.301 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:28:52.771 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:28:53.239 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:28:53.708 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:28:54.176 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:28:54.644 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:28:55.114 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:28:55.584 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:28:56.052 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:28:56.520 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:28:56.989 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:28:57.460 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:28:57.929 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:28:58.397 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:28:58.866 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:28:59.337 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:28:59.806 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:29:00.277 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:29:00.748 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:29:01.218 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 04:29:01.690 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 04:29:02.161 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 04:29:02.629 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 04:29:03.097 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 04:29:03.565 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 04:29:04.034 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 04:29:04.505 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 04:29:04.974 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 04:29:05.444 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 04:29:05.919 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 04:29:06.395 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 04:29:06.866 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 04:29:07.340 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 04:29:07.816 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 04:29:08.287 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 04:29:08.758 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 04:29:09.229 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 04:29:09.699 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 04:29:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 04:29:10.643 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 04:29:11.119 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 04:29:11.594 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 04:29:12.066 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 04:29:12.538 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 04:29:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 04:29:13.476 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 04:29:13.946 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 04:29:14.415 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 04:29:14.886 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 04:29:15.356 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 04:29:15.825 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 04:29:16.294 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 04:29:16.765 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 04:29:17.236 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 04:29:17.709 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 04:29:18.180 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 04:29:18.653 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 04:29:19.127 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 04:29:19.597 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 04:29:20.067 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 04:29:20.538 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 04:29:20.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:20.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:29:20.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:29:20.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:29:20.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:29:20.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:29:20.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:29:20.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:29:20.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:29:20.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:29:20.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:29:20.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:20.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:29:20.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:29:20.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:29:20.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:29:20.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:29:20.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:29:20.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:20.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:21.007 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 04:29:21.478 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 04:29:21.950 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 04:29:22.424 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 04:29:22.899 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 04:29:23.372 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 04:29:23.845 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 04:29:24.320 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 04:29:24.795 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 04:29:25.269 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 04:29:25.744 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 04:29:26.220 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 04:29:26.695 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 04:29:27.171 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 04:29:27.646 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 04:29:28.122 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 04:29:28.598 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 04:29:29.074 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 04:29:29.547 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 04:29:30.022 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 04:29:30.496 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 04:29:30.970 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 04:29:31.445 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 04:29:31.919 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 04:29:32.394 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 04:29:32.869 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 04:29:33.342 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 04:29:33.816 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-19 04:29:34.290 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-19 04:29:34.765 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-19 04:29:35.238 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-19 04:29:35.713 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-19 04:29:36.189 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-19 04:29:36.665 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-19 04:29:37.139 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-19 04:29:37.615 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-19 04:29:38.089 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-19 04:29:38.564 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-19 04:29:39.039 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-19 04:29:39.517 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-19 04:29:39.995 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-19 04:29:40.473 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-19 04:29:40.950 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-19 04:29:41.428 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-19 04:29:41.905 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-19 04:29:42.383 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-19 04:29:42.861 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-19 04:29:43.338 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-19 04:29:43.816 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-19 04:29:44.294 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-02-19 04:29:44.772 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-02-19 04:29:45.250 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-02-19 04:29:45.728 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-02-19 04:29:46.206 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-02-19 04:29:46.684 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-02-19 04:29:47.162 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-02-19 04:29:47.639 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-02-19 04:29:48.117 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-02-19 04:29:48.594 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-02-19 04:29:49.072 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-02-19 04:29:49.550 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-02-19 04:29:50.027 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-02-19 04:29:50.505 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-02-19 04:29:50.983 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-02-19 04:29:51.461 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-02-19 04:29:51.939 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-02-19 04:29:52.417 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-02-19 04:29:52.895 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-02-19 04:29:53.372 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-02-19 04:29:53.849 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-02-19 04:29:54.327 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-02-19 04:29:54.805 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-02-19 04:29:55.283 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-02-19 04:29:55.760 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-02-19 04:29:56.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:56.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:29:56.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:29:56.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:29:56.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:29:56.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:29:56.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:29:56.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:29:56.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:29:56.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:29:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:29:56.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:56.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:29:56.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:29:56.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:29:56.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:29:56.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:29:56.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:29:56.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:56.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:29:56.237 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-02-19 04:29:56.715 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-02-19 04:29:57.192 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-02-19 04:29:57.670 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-02-19 04:29:58.148 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-02-19 04:29:58.626 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-02-19 04:29:59.103 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-02-19 04:29:59.581 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-02-19 04:30:00.059 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-02-19 04:30:00.536 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-02-19 04:30:01.013 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-02-19 04:30:01.491 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-02-19 04:30:01.968 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-02-19 04:30:02.446 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-02-19 04:30:02.923 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-02-19 04:30:03.401 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-02-19 04:30:03.878 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-02-19 04:30:04.356 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-02-19 04:30:04.833 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-02-19 04:30:05.310 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-02-19 04:30:05.788 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-02-19 04:30:06.265 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-02-19 04:30:06.743 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-02-19 04:30:07.220 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-02-19 04:30:07.698 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-02-19 04:30:08.175 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-02-19 04:30:08.652 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-02-19 04:30:09.130 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-02-19 04:30:09.607 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-02-19 04:30:10.085 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-02-19 04:30:10.562 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-02-19 04:30:11.040 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-02-19 04:30:11.517 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-02-19 04:30:11.995 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-02-19 04:30:12.473 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-02-19 04:30:12.950 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-02-19 04:30:13.429 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-02-19 04:30:13.906 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-02-19 04:30:14.384 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-02-19 04:30:14.861 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-02-19 04:30:15.340 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-02-19 04:30:15.817 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-02-19 04:30:16.294 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-02-19 04:30:16.773 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-02-19 04:30:17.250 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-02-19 04:30:17.727 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-02-19 04:30:18.206 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-02-19 04:30:18.684 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-02-19 04:30:19.162 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-02-19 04:30:19.640 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-02-19 04:30:20.118 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-02-19 04:30:20.596 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-02-19 04:30:21.073 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-02-19 04:30:21.552 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-02-19 04:30:22.029 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-02-19 04:30:22.504 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-02-19 04:30:22.975 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-02-19 04:30:23.448 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-02-19 04:30:23.920 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-02-19 04:30:24.395 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-02-19 04:30:24.870 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-02-19 04:30:25.343 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-02-19 04:30:25.817 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-02-19 04:30:26.292 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-02-19 04:30:26.768 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-02-19 04:30:27.242 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-02-19 04:30:27.718 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-02-19 04:30:28.193 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-02-19 04:30:28.670 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-02-19 04:30:29.145 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-02-19 04:30:29.619 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-02-19 04:30:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-02-19 04:30:30.567 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-02-19 04:30:31.042 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-02-19 04:30:31.516 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-02-19 04:30:31.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:31.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:31.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:31.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:31.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:31.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:31.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:31.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:31.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:31.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:31.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:30:31.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:30:31.686 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:30:31.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:31.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:36.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:30:36.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:30:36.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:36.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:36.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:36.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:36.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:36.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:30:36.688 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:36.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:30:36.688 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:30:36.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:30:36.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:30:36.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:30:36.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:36.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:36.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:30:36.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:30:36.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:30:36.690 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:30:36.690 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:30:36.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:30:36.690 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:36.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:36.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:30:36.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:30:36.690 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:30:36.691 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:30:36.691 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:30:36.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:30:36.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:36.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:36.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:30:36.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:30:36.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:30:36.692 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:30:36.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:30:36.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:30:36.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:30:36.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:30:36.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:30:36.693 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:30:36.693 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:30:36.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:30:36.694 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:36.694 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:41.695 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:30:41.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:30:41.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:41.696 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:41.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:41.696 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:41.700 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:41.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:30:41.700 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:41.700 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:30:41.700 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:30:41.701 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:30:41.701 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:30:41.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:30:41.701 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:41.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:41.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:30:41.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:30:41.701 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:30:41.702 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:30:41.702 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:30:41.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:30:41.702 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:41.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:41.702 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:30:41.702 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:30:41.702 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:30:41.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:30:41.703 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:30:41.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:30:41.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:41.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:41.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:30:41.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:30:41.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:30:41.705 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:30:41.705 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:41.710 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:30:42.186 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:30:42.218 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:30:42.218 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:30:42.219 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:30:42.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:42.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:42.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:42.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:42.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:42.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:42.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:42.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:42.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:42.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:42.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:42.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:30:42.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:30:42.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:42.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:42.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:42.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:42.662 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:30:42.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:42.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:42.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:42.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:43.135 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:30:43.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:30:43.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:43.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:43.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:43.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:43.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:43.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:43.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:43.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:43.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:43.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:43.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:43.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:43.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:43.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:43.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:43.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:43.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:43.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:43.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:30:43.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:30:43.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:43.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:43.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:43.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:44.083 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:30:44.558 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:30:44.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:44.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:44.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:44.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:45.032 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:30:45.506 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:30:45.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:45.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:45.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:45.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:45.981 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:30:46.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:46.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:46.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:46.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:46.032 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:46.032 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:46.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:46.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:46.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:46.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:46.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:46.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:46.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:46.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:46.040 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:30:46.040 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:30:46.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:46.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:46.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:46.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:46.456 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:30:46.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:46.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:46.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:46.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:46.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:30:47.406 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:30:47.882 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:30:48.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:30:48.833 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:30:49.309 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:30:49.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:49.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:49.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:49.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:49.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:49.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:49.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:49.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:49.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:49.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:49.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:49.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:49.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:49.498 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:49.498 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:30:49.498 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:30:49.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:49.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:49.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:49.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:49.783 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:30:50.259 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:30:50.729 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:30:51.205 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:30:51.683 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:30:52.160 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:30:52.638 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:30:52.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:52.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:52.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:52.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:52.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:52.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:52.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:52.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:52.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:52.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:52.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:52.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:30:52.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:30:52.975 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2420 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2420 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.975 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:52.976 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2421 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:30:57.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:30:57.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:30:57.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:57.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:57.979 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:57.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:57.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:30:57.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:30:57.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:57.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:30:57.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:30:57.995 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:30:57.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:30:57.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:30:57.996 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:57.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:30:57.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:30:57.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:30:57.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:30:57.999 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:30:57.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:30:57.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:30:57.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:57.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:30:58.000 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:30:58.000 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:30:58.000 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:30:58.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:30:58.002 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:30:58.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:30:58.002 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:30:58.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:30:58.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:30:58.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:30:58.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:30:58.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:30:58.007 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:30:58.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:30:58.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:30:58.496 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:30:58.543 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:30:58.544 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:30:58.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:58.545 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:30:58.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:58.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:58.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:58.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:30:58.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:30:58.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:30:58.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:30:58.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:58.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:58.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:58.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:30:58.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:30:58.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:30:58.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:30:58.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:58.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:30:58.973 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:30:59.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:30:59.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:30:59.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:30:59.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:30:59.451 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:30:59.928 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:31:00.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:31:00.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:31:00.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:31:00.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:31:00.406 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:31:00.884 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:31:01.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:31:01.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:31:01.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:31:01.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:31:01.362 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:31:01.840 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:31:02.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:31:02.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:31:02.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:31:02.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:31:02.318 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:31:02.795 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:31:03.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:31:03.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:31:03.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:31:03.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:31:03.270 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:31:03.747 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:31:04.225 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:31:04.703 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:31:05.181 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:31:05.659 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:31:06.137 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:31:06.614 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:31:07.093 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:31:07.571 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:31:08.049 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:31:08.526 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:31:09.004 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:31:09.482 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:31:09.959 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:31:10.438 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:31:10.915 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:31:11.394 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:31:11.871 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:31:12.349 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:31:12.827 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:31:13.305 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:31:13.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:13.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:31:13.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:13.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:13.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:13.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:13.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:31:13.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:13.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:13.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:31:13.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:31:13.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:13.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:31:13.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:31:13.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:31:13.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:31:13.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:31:13.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:31:13.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:13.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:13.782 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:31:14.260 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:31:14.738 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:31:15.216 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:31:15.694 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:31:16.172 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:31:16.650 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:31:17.128 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:31:17.605 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:31:18.083 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:31:18.562 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:31:19.040 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:31:19.518 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:31:19.996 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:31:20.474 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:31:20.952 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:31:21.430 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:31:21.908 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:31:22.386 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:31:22.865 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:31:23.343 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:31:23.820 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:31:24.298 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:31:24.776 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:31:25.254 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:31:25.733 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:31:26.211 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:31:26.689 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:31:27.164 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:31:27.640 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:31:28.118 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:31:28.596 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:31:28.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:28.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:31:28.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:28.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:28.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:28.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:28.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:31:28.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:28.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:28.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:31:28.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:31:28.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:28.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:31:28.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:31:28.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:31:28.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:31:29.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:31:29.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:31:29.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:29.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:29.074 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:31:29.551 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:31:30.028 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:31:30.506 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:31:30.983 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:31:31.461 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:31:31.939 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:31:32.416 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:31:32.894 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:31:33.372 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:31:33.849 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:31:34.327 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:31:34.804 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:31:35.282 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:31:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:31:36.237 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:31:36.715 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:31:37.192 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:31:37.670 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:31:38.148 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:31:38.634 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:31:39.112 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:31:39.589 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:31:40.067 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:31:40.544 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:31:41.022 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:31:41.500 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:31:41.978 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:31:42.455 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:31:42.933 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:31:43.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:43.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:31:43.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:43.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:43.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:43.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:43.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:31:43.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:43.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:43.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:31:43.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:31:43.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:43.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:31:43.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:31:43.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:31:43.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:31:43.410 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:31:43.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:31:43.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:31:43.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:43.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:43.887 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:31:44.365 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:31:44.843 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:31:45.321 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:31:45.799 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:31:46.276 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 04:31:46.753 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 04:31:47.231 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 04:31:47.708 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 04:31:48.186 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 04:31:48.663 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 04:31:49.140 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 04:31:49.618 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 04:31:50.095 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 04:31:50.572 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 04:31:51.050 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 04:31:51.528 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 04:31:52.006 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 04:31:52.484 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 04:31:52.961 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 04:31:53.438 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 04:31:53.916 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 04:31:54.394 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 04:31:54.872 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 04:31:55.349 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 04:31:55.827 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 04:31:56.305 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 04:31:56.783 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 04:31:57.261 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 04:31:57.740 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 04:31:58.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:31:58.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:31:58.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:31:58.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:31:58.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:31:58.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:31:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:31:58.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:31:58.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:31:58.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:31:58.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:31:58.154 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:31:58.154 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=12841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:31:58.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:31:58.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:31:58.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:31:58.154 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=12841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:31:58.154 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=12841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:31:58.154 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=12841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:31:58.154 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=12841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:31:58.154 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=12841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:32:03.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:32:03.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:32:03.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:03.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:03.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:03.158 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:03.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:03.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:03.168 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:03.168 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:03.169 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:32:03.173 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:32:03.173 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:32:03.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:03.174 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:03.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:03.174 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:32:03.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:03.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:32:03.178 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:32:03.178 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:32:03.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:03.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:03.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:03.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:32:03.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:03.178 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:32:03.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:32:03.181 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:32:03.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:03.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:03.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:03.182 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:32:03.182 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:03.182 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:32:03.185 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:32:03.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:32:03.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:32:03.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:32:03.186 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:32:03.186 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:03.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:03.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:03.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:03.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:03.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:32:03.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:32:03.189 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:32:08.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:32:08.193 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:32:08.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:08.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:08.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:08.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:08.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:08.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:08.206 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:08.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:08.207 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:32:08.211 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:32:08.211 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:32:08.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:08.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:08.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:08.212 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:32:08.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:08.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:32:08.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:32:08.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:32:08.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:08.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:08.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:08.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:32:08.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:08.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:32:08.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:32:08.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:32:08.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:08.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:08.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:32:08.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:08.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:32:08.222 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:32:08.222 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:08.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:08.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:32:08.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:32:08.752 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:32:08.754 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:32:08.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:08.756 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:32:08.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:08.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:08.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:08.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:08.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:08.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:08.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:08.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:08.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:08.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:08.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:08.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:08.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:08.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:08.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:08.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:09.185 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:32:09.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:09.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:09.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:09.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:09.663 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:32:10.140 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:32:10.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:10.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:10.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:10.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:10.618 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:32:11.097 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:32:11.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:11.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:11.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:11.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:11.575 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:32:12.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:32:12.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:12.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:12.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:12.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:12.530 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:32:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:32:13.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:13.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:13.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:13.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:13.485 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:32:13.963 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:32:14.441 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:32:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:32:15.396 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:32:15.875 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:32:16.352 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:32:16.830 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:32:17.308 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:32:17.786 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:32:18.263 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:32:18.738 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:32:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:32:19.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:19.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:19.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:19.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:19.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:19.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:19.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:19.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:19.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:19.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:19.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:19.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:19.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:19.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:19.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:19.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:19.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:19.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:19.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:19.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:19.693 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:32:20.171 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:32:20.649 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:32:21.127 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:32:21.605 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:32:22.083 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:32:22.561 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:32:23.039 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:32:23.517 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:32:23.995 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:32:24.473 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:32:24.951 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:32:25.429 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:32:25.907 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:32:26.386 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:32:26.863 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:32:27.342 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:32:27.820 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:32:28.298 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:32:28.776 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:32:29.254 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:32:29.733 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:32:29.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:29.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:29.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:29.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:29.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:29.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:29.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:29.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:29.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:29.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:29.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:29.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:29.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:29.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:29.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:29.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:29.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:29.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:29.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:29.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:30.210 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:32:30.688 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:32:31.165 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:32:31.642 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:32:32.120 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:32:32.598 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:32:33.075 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:32:33.553 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:32:34.031 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:32:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:32:34.986 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:32:35.464 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:32:35.941 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:32:36.419 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:32:36.897 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:32:36.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:36.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:36.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:36.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:36.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:36.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:36.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:36.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:36.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:36.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:36.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:36.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:36.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:36.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:36.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:36.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:36.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:36.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:36.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:36.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:37.374 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:32:37.851 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:32:38.330 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:32:38.807 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:32:39.285 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:32:39.763 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:32:40.240 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:32:40.718 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:32:41.196 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:32:41.674 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:32:42.152 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:32:42.630 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:32:43.108 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:32:43.586 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:32:44.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:44.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:44.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:44.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:44.064 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:32:44.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:44.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:44.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:44.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:44.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:44.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:44.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:44.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:44.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:32:44.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:32:44.070 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:32:49.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:32:49.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:32:49.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:49.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:49.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:49.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:49.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:49.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:49.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:49.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:49.085 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:32:49.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:32:49.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:32:49.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:49.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:49.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:49.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:32:49.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:49.092 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:32:49.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:32:49.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:32:49.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:49.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:49.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:49.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:32:49.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:49.096 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:32:49.099 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:32:49.099 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:32:49.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:49.099 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:49.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:49.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:32:49.100 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:49.100 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:32:49.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:32:49.104 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:32:49.104 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.104 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:49.109 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:32:49.592 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:32:49.632 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:32:49.634 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:32:49.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:49.636 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:32:49.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:49.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:49.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:49.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:49.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:49.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:49.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:49.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:49.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:49.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:49.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:49.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:49.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:49.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:49.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:49.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:50.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:50.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:50.069 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:32:50.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:50.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:50.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:50.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:50.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:50.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:50.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:50.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:50.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:50.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:50.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:50.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:50.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:50.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:50.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:50.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:50.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:50.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.546 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:32:50.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:50.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:50.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:50.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:50.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:50.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:50.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:50.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:50.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:50.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:50.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:50.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:50.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:50.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:50.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:50.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:50.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:50.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:51.023 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:32:51.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:51.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:51.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:51.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:51.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:51.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:51.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:51.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:51.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:51.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:51.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:51.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:51.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:51.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:51.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:51.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:51.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:51.436 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:51.436 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:51.436 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:51.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:51.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:51.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:51.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:51.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:32:51.978 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:32:52.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:52.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:52.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:52.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:52.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:52.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:52.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:52.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:52.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:52.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:52.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:52.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:52.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:52.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:52.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:52.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:52.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:32:52.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:32:52.311 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:32:52.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=686 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:32:52.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=686 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:32:52.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=686 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:32:52.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=686 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:32:52.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=686 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:32:52.311 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=686 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:32:57.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:32:57.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:32:57.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:57.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:57.316 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:57.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:57.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:32:57.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:57.319 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:57.320 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:32:57.320 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:32:57.322 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:32:57.322 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:32:57.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:57.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:57.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:32:57.323 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:32:57.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:32:57.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:32:57.325 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:32:57.325 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:32:57.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:57.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:57.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:32:57.326 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:32:57.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:32:57.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:32:57.328 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:32:57.328 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:32:57.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:57.328 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:32:57.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:32:57.328 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:32:57.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:32:57.328 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:32:57.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:32:57.331 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:32:57.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:32:57.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:32:57.819 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:32:57.860 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:32:57.862 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:32:57.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:57.864 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:32:57.890 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:57.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:57.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:57.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:32:57.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:32:57.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:32:57.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:32:57.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:57.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:57.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:57.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:32:57.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:32:57.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:32:57.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:32:57.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:57.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:32:58.296 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:32:58.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:58.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:58.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:58.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:58.774 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:32:59.251 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:32:59.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:32:59.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:32:59.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:32:59.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:32:59.729 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:33:00.208 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:33:00.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:00.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:00.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:00.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:00.686 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:33:01.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:01.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:01.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:01.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:01.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:01.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:01.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:01.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:01.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:01.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:01.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:01.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:01.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:01.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:01.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:01.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:01.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:01.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:01.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:01.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:01.164 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:33:01.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:01.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:01.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:01.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:01.642 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:33:02.120 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:33:02.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:02.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:02.598 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:33:03.077 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:33:03.555 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:33:04.033 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:33:04.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:04.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:04.511 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:33:04.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:04.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:04.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:04.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:04.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:04.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:04.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:04.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:04.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:04.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:04.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:04.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:04.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:04.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:04.555 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:04.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:04.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:04.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:04.988 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:33:05.466 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:33:05.943 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:33:06.421 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:33:06.898 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:33:07.377 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:33:07.854 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:33:08.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:08.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:08.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:08.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:08.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:08.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:08.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:08.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:08.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:08.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:08.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:08.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:08.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:08.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:08.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:08.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:08.271 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:08.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:08.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:08.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:08.331 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:33:08.808 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:33:09.286 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:33:09.764 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:33:10.238 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:33:10.712 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:33:11.191 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:33:11.669 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:33:11.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:11.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:11.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:11.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:12.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:12.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:12.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:12.007 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:12.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:12.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:12.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:12.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:33:12.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:33:12.011 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:33:12.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:12.011 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.011 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.011 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.011 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.012 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.012 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.012 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.012 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.012 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.012 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:12.012 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:17.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:33:17.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:33:17.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:17.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:17.015 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:17.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:17.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:17.026 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:33:17.026 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:17.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:33:17.027 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:33:17.030 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:33:17.030 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:33:17.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:33:17.030 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:17.031 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:17.031 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:33:17.031 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:33:17.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:33:17.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:33:17.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:33:17.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:33:17.033 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:17.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:17.033 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:33:17.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:33:17.033 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:33:17.035 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:33:17.036 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:33:17.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:33:17.036 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:17.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:17.036 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:33:17.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:33:17.036 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:33:17.039 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:33:17.039 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.039 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:17.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:17.044 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:33:17.527 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:33:17.566 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:33:17.568 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:33:17.569 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:33:17.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:17.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:17.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:17.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:17.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:17.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:17.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:17.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:17.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:17.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:17.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:17.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:17.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:17.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:17.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:17.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:17.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:17.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:17.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:17.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:17.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:17.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:17.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:17.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:18.004 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:33:18.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:18.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:18.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:18.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:18.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:18.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:18.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:18.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:18.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:18.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:18.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:18.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:18.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:18.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:18.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:18.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:18.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:18.482 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:33:18.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:18.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:18.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:18.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:18.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:18.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:18.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:18.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:18.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:18.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:18.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:18.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:18.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:18.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:18.644 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:18.644 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:18.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:18.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:18.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:18.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:18.958 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:33:19.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:19.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:19.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:19.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:19.436 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:33:19.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:19.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:19.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:19.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:19.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:19.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:19.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:19.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:19.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:19.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:19.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:19.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:19.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:19.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:19.623 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:19.623 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:19.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:19.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:19.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:19.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:19.913 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:33:20.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:20.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:20.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:20.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:20.392 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:33:20.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:20.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:20.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:20.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:20.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:20.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:33:20.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:33:20.719 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:33:20.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:20.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:20.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:20.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:20.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:20.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:20.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:20.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:25.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:33:25.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:33:25.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:25.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:25.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:25.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:25.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:25.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:33:25.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:25.733 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:33:25.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:33:25.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:33:25.737 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:33:25.737 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:33:25.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:25.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:25.738 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:33:25.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:33:25.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:33:25.740 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:33:25.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:33:25.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:33:25.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:25.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:25.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:33:25.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:33:25.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:33:25.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:33:25.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:33:25.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:33:25.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:25.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:25.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:33:25.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:33:25.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:33:25.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:33:25.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:33:25.747 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:25.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:25.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:33:26.235 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:33:26.275 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:33:26.278 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:33:26.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:26.279 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:33:26.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:26.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:26.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:26.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:26.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:26.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:26.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:26.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:26.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:26.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:26.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:26.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:26.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:26.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:26.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:26.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:26.712 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:33:26.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:26.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:26.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:26.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:27.190 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:33:27.668 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:33:27.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:27.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:27.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:27.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:28.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:33:28.624 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:33:28.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:28.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:28.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:28.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:29.102 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:33:29.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:29.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:29.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:29.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:29.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:29.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:29.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:29.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:29.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:29.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:29.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:29.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:29.285 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:29.285 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:29.285 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:29.285 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:29.336 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:29.337 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:29.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:29.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:29.579 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:33:29.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:29.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:29.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:29.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:30.057 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:33:30.535 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:33:30.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:30.754 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:30.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:30.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:33:31.492 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:33:31.970 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:33:32.448 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:33:32.926 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:33:33.404 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:33:33.882 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:33:33.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:33.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:33.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:33.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:33.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:33.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:33.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:33.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:33.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:33.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:33.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:33.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:33.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:33.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:33.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:33.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:33.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:33.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:33.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:33.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:34.363 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:33:34.840 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:33:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:33:35.795 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:33:36.273 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:33:36.751 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:33:37.229 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:33:37.707 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:33:38.185 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:33:38.663 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:33:39.141 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:33:39.619 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:33:40.097 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:33:40.574 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:33:40.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:40.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:40.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:40.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:40.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:40.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:40.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:40.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:40.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:40.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:40.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:40.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:40.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:40.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:40.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:40.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:40.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:40.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:40.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:40.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:41.052 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:33:41.530 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:33:42.008 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:33:42.486 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:33:42.964 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:33:43.443 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:33:43.921 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:33:44.400 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:33:44.878 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:33:45.357 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:33:45.835 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:33:46.313 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:33:46.791 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:33:47.268 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:33:47.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:47.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:47.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:47.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:47.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:47.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:47.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:47.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:47.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:47.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:47.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:47.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:47.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:33:47.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:33:47.608 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:33:47.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4665 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:47.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4665 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:47.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4665 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:47.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4665 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:47.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4665 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:47.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4665 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:33:52.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:33:52.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:33:52.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:52.611 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:52.611 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:52.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:52.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:33:52.628 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:33:52.628 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:52.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:33:52.629 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:33:52.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:33:52.633 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:33:52.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:33:52.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:52.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:33:52.634 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:33:52.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:33:52.634 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:33:52.638 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:33:52.639 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:33:52.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:33:52.639 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:52.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:33:52.639 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:33:52.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:33:52.639 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:33:52.643 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:33:52.643 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:33:52.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:33:52.643 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:33:52.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:33:52.644 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:33:52.644 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:33:52.644 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:33:52.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:33:52.650 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:33:52.650 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:33:52.650 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:33:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:33:52.655 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:33:53.138 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:33:53.184 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:33:53.184 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:33:53.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:53.186 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:33:53.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:53.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:53.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:53.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:53.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:53.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:53.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:53.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:53.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:53.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:53.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:53.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:53.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:53.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:53.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:53.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:53.615 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:33:53.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:53.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:53.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:53.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:54.093 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:33:54.572 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:33:54.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:54.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:54.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:54.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:55.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:55.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:55.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:55.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:55.050 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:33:55.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:55.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:55.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:55.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:55.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:55.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:55.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:55.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:55.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:55.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:55.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:55.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:55.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:55.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:55.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:55.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:55.528 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:33:55.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:55.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:55.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:55.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:56.006 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:33:56.484 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:33:56.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:56.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:56.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:56.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:56.963 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:33:57.441 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:33:57.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:33:57.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:33:57.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:33:57.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:33:57.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:57.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:57.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:57.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:57.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:57.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:57.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:57.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:33:57.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:33:57.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:33:57.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:33:57.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:57.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:57.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:57.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:33:57.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:33:57.919 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:33:57.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:33:57.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:33:57.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:57.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:33:58.396 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:33:58.874 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:33:59.351 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:33:59.828 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:34:00.306 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:34:00.784 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:34:01.262 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:34:01.740 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:34:02.218 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:34:02.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:34:02.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:02.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:34:02.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:34:02.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:34:02.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:34:02.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:34:02.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:34:02.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:34:02.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:34:02.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:02.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:34:02.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:34:02.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:34:02.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:34:02.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:34:02.453 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:34:02.453 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:34:02.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:34:02.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:34:02.695 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:34:03.173 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:34:03.652 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:34:04.129 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:34:04.607 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:34:05.085 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:34:05.563 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:34:06.041 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:34:06.519 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:34:06.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:34:06.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:06.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:34:06.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:34:06.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:06.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:06.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:06.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:06.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:06.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:06.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:06.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:06.855 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:34:06.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:06.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:06.855 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3032 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:06.855 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3032 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:06.855 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3032 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:06.855 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3032 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:06.855 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3032 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:06.855 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3032 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:11.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:11.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:11.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:11.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:11.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:11.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:11.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:11.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:11.867 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:11.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:11.867 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:34:11.870 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:34:11.870 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:34:11.870 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:11.870 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:11.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:11.871 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:34:11.871 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:11.871 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:34:11.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:34:11.873 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:34:11.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:11.873 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:11.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:11.873 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:34:11.873 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:11.873 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:34:11.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:34:11.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:34:11.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:11.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:11.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:11.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:34:11.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:11.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:34:11.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:34:11.879 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:34:11.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:11.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:11.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:11.883 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:34:12.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:34:12.414 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:34:12.416 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:34:12.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:12.418 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:34:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:12.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:12.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:12.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:12.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:12.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:12.843 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:34:12.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:12.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:12.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:12.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:13.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:34:13.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:13.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:13.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:13.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:13.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:13.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:13.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:13.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:13.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:13.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:13.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:13.753 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:34:13.753 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:13.753 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:13.753 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:18.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:18.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:18.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:18.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:18.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:18.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:18.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:18.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:18.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:18.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:18.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:34:18.761 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:34:18.761 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:34:18.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:18.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:18.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:18.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:34:18.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:18.763 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:34:18.763 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:34:18.763 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:34:18.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:18.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:18.764 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:34:18.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:18.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:18.764 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:34:18.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:34:18.765 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:34:18.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:18.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:18.770 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:34:19.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:34:19.290 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:34:19.292 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:34:19.295 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:34:19.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.729 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:34:19.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:19.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:19.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:19.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:19.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:19.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:34:20.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:20.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:20.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:20.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:20.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:20.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:20.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:20.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:20.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:20.639 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:20.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:20.639 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:34:25.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:25.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:25.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:25.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:25.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:25.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:25.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:25.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:25.653 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:25.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:25.654 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:34:25.658 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:34:25.658 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:34:25.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:25.659 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:25.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:25.659 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:34:25.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:25.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:34:25.663 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:34:25.663 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:34:25.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:25.663 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:25.663 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:25.663 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:34:25.663 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:25.663 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:34:25.666 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:34:25.666 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:34:25.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:25.666 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:25.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:25.667 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:34:25.667 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:25.667 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:34:25.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:34:25.671 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:34:25.671 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:34:25.671 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:25.676 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:34:26.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:34:26.204 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:34:26.205 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:34:26.207 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:34:26.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.635 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:34:26.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:26.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:26.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:26.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:26.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:26.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.112 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:34:27.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:27.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:27.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:27.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:27.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:27.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:27.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:27.550 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:27.550 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:34:27.550 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:27.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:27.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.551 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.552 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:27.552 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:32.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:32.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:32.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:32.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:32.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:32.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:32.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:32.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:32.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:32.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:32.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:34:32.559 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:34:32.560 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:34:32.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:32.560 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:32.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:32.560 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:34:32.561 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:32.561 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:34:32.562 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:34:32.563 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:34:32.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:32.563 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:32.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:32.563 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:34:32.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:32.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:34:32.565 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:34:32.565 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:34:32.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:32.565 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:32.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:32.565 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:34:32.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:32.565 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.568 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:34:32.568 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:34:32.568 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:34:32.569 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:32.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:32.573 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:34:33.057 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:34:33.095 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:34:33.097 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:34:33.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.099 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:34:33.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:34:33.571 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:33.571 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:33.572 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:33.572 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:33.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:33.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:34.010 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:34:34.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:34.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:34.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:34.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:34.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:34.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:34.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:34.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:34.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:34.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:34.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:34.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:34.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:34.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:34.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:34.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:34.420 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:34:34.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.421 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.422 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.422 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.422 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:34.422 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:39.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:39.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:39.421 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:39.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:39.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:39.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:39.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:39.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:39.432 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:39.432 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:39.432 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:34:39.434 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:34:39.434 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:34:39.435 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:39.435 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:39.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:39.435 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:34:39.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:39.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:34:39.437 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:34:39.437 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:34:39.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:39.437 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:39.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:39.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:34:39.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:39.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:34:39.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:34:39.440 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:34:39.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:39.440 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:39.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:39.440 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:34:39.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:39.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:34:39.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:34:39.443 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:34:39.444 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:39.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:39.445 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:39.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:34:39.931 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:34:39.974 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:34:39.976 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:34:39.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:39.979 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:34:40.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:40.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.407 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:34:40.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:40.447 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:40.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:40.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:40.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.886 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:34:40.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:40.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:41.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:41.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:41.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:41.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:41.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:41.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:41.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:41.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:41.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:41.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:41.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:41.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:41.301 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:34:41.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:41.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:41.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:41.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:41.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:41.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:34:46.301 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:46.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:46.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:46.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:46.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:46.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:46.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:46.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:46.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:46.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:46.315 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:34:46.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:34:46.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:34:46.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:46.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:46.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:46.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:34:46.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:46.319 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:34:46.321 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:34:46.321 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:34:46.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:46.322 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:46.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:46.322 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:34:46.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:46.322 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:34:46.324 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:34:46.324 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:34:46.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:46.324 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:46.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:46.324 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:34:46.324 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:46.324 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:34:46.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:34:46.327 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:34:46.327 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:46.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:34:46.816 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:34:46.855 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:34:46.856 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:34:46.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:46.858 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:34:46.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:46.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:46.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:46.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:46.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:34:47.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:47.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:47.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:47.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:47.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.767 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:34:47.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:47.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:48.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:48.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:48.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:48.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:48.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:48.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:48.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:48.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:48.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:48.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:48.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:48.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:48.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:48.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:48.200 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:34:53.203 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:53.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:53.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:53.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:53.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:53.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:53.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:53.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:53.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:34:53.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:34:53.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:34:53.222 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:34:53.222 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:53.222 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:53.222 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:53.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:34:53.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:34:53.223 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:34:53.225 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:34:53.225 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:34:53.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:53.225 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:53.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:53.225 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:34:53.225 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:34:53.225 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:34:53.227 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:34:53.227 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:34:53.227 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:53.228 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:34:53.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:53.228 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:34:53.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:34:53.228 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:34:53.231 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:34:53.231 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:34:53.231 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:34:53.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:34:53.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:34:53.236 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:34:53.718 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:34:53.763 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:34:53.765 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:34:53.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:53.767 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:34:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:34:53.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:53.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:53.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:34:54.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:54.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:54.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:54.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:54.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.670 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:34:54.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:54.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:55.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:55.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:55.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:34:55.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:34:55.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:34:55.088 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:34:55.088 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:00.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:00.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:00.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:00.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:00.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:00.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:00.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:00.102 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:00.102 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:00.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:00.103 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:00.107 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:00.108 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:00.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:00.108 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:00.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:00.109 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:00.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:00.109 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:00.113 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:00.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:00.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:00.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:00.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:00.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:00.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:00.114 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:00.118 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:00.118 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:00.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:00.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:00.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:00.119 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:00.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:00.119 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:00.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:00.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:00.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:00.125 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:00.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:00.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:00.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:00.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:00.666 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:00.668 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:00.670 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:00.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:00.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:00.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:00.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:00.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:00.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:00.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:00.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:00.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:00.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:00.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:00.745 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:00.745 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=132 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:00.745 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:00.745 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:00.745 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:00.745 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:00.745 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:00.745 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:05.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:05.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:05.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:05.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:05.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:05.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:05.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:05.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:05.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:05.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:05.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:05.763 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:05.763 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:05.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:05.763 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:05.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:05.763 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:05.763 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:05.763 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:05.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:05.766 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:05.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:05.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:05.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:05.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:05.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:05.767 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:05.769 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:05.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:05.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:05.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:05.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:05.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:05.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:05.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:05.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:05.772 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:05.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:05.777 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:06.260 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:06.308 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:06.310 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:06.310 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:06.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:06.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:06.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:06.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:06.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:06.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:06.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:06.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:06.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:06.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:06.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:06.417 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:11.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:11.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:11.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:11.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:11.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:11.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:11.433 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:11.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:11.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:11.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:11.433 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:11.438 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:11.438 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:11.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:11.438 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:11.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:11.439 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:11.439 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:11.439 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:11.442 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:11.443 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:11.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:11.443 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:11.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:11.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:11.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:11.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:11.446 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:11.446 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:11.446 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:11.446 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:11.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:11.446 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:11.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:11.447 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:11.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:11.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:11.451 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:11.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:11.456 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:11.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:11.987 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:11.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:11.990 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:11.992 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:12.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:12.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:12.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:12.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:12.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:12.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:12.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:12.082 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:12.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:12.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:12.082 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:12.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:12.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:12.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:12.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:12.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:12.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:12.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:12.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:17.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:17.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:17.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:17.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:17.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:17.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:17.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:17.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:17.097 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:17.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:17.097 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:17.100 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:17.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:17.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:17.101 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:17.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:17.101 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:17.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:17.101 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:17.104 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:17.104 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:17.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:17.104 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:17.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:17.104 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:17.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:17.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:17.107 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:17.107 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:17.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:17.107 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:17.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:17.108 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:17.108 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:17.108 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:17.111 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:17.111 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:17.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:17.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:17.112 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:17.112 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:17.112 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:17.117 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:17.599 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:17.647 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:17.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.651 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:17.653 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:17.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:17.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:17.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:17.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:17.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:17.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:17.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:17.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:17.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:17.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:17.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:17.736 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:22.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:22.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:22.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:22.741 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:22.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:22.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:22.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:22.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:22.751 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:22.751 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:22.751 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:22.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:22.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:22.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:22.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:22.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:22.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:22.755 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:22.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:22.756 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:22.756 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:22.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:22.757 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:22.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:22.757 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:22.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:22.757 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:22.759 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:22.759 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:22.759 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:22.759 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:22.759 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:22.760 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:22.760 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:22.760 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:22.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:22.762 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:22.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:22.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:22.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:23.251 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:23.288 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:23.290 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:23.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.292 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:23.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:23.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:23.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:23.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:23.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:23.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:23.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:23.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:23.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:23.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:23.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:23.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:23.371 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:28.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:28.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:28.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:28.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:28.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:28.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:28.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:28.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:28.386 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:28.386 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:28.386 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:28.389 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:28.389 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:28.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:28.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:28.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:28.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:28.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:28.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:28.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:28.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:28.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:28.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:28.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:28.393 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:28.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:28.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:28.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:28.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:28.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:28.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:28.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:28.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:28.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:28.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:28.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:28.399 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:28.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:28.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.404 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:28.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:28.925 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:28.927 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:28.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.931 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:28.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:28.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:28.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:29.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:29.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:29.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:29.048 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:34.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:34.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:34.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:34.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:34.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:34.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:34.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:34.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:34.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:34.066 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:34.066 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:34.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:34.071 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:34.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:34.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:34.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:34.072 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:34.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:34.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:34.074 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:34.074 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:34.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:34.074 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:34.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:34.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:34.075 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:34.075 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:34.077 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:34.077 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:34.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:34.077 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:34.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:34.077 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:34.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:34.077 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:34.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:34.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:34.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:34.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:34.081 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:34.081 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:34.081 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.081 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:34.086 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:34.569 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:34.611 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:34.614 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:34.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.616 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:34.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:34.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:34.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:34.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:34.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:34.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:34.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:34.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:34.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:34.748 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:39.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:39.751 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:39.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:39.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:39.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:39.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:39.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:39.762 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:39.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:39.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:39.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:39.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:39.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:39.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:39.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:39.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:39.767 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:39.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:39.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:39.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:39.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:39.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:39.769 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:39.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:39.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:39.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:39.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:39.771 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:39.771 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:39.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:39.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:39.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:39.772 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:39.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:39.772 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:39.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:39.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:39.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:39.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:39.775 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:39.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:39.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:39.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:40.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:40.304 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:40.306 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:40.309 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:40.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:40.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:35:40.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:35:40.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:35:40.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:40.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:35:40.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:35:40.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:35:40.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:35:40.740 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:35:40.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:40.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:40.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:41.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:35:41.695 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:35:41.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:41.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:41.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:41.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:42.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:35:42.651 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:35:42.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:42.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:42.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:42.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:43.129 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:35:43.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:35:43.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:35:43.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:35:43.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:43.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:43.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:43.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:43.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:43.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:43.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:43.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:43.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:43.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:43.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:43.787 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:43.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:43.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:43.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:43.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:43.787 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:48.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:48.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:48.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:48.789 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:48.790 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:48.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:48.800 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:48.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:48.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:48.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:48.803 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:48.808 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:48.808 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:48.808 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:48.808 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:48.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:48.808 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:48.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:48.809 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:48.811 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:48.811 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:48.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:48.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:48.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:48.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:48.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:48.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:48.814 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:48.814 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:48.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:48.815 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:48.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:48.815 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:48.815 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:48.815 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:48.818 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:48.819 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:48.819 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:48.819 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:48.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:48.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:48.824 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:49.307 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:49.353 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:49.355 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:49.356 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:49.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:49.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:35:49.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:35:49.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:35:49.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:49.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:35:49.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:35:49.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:35:49.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:35:49.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:35:49.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:35:49.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:35:49.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:49.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:49.785 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:35:49.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:49.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:49.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:49.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:49.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:49.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:35:49.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:35:49.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:35:49.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:49.908 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:35:49.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:35:49.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:35:49.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:35:49.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:49.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:35:49.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:35:49.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:49.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:49.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:49.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:49.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:49.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:49.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:49.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:49.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:49.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:49.936 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:35:49.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:49.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:49.937 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:49.937 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:49.937 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:49.937 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:35:54.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:35:54.934 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:35:54.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:54.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:54.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:54.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:54.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:35:54.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:54.947 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:54.948 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:35:54.948 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:35:54.950 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:35:54.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:35:54.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:54.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:54.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:35:54.951 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:35:54.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:35:54.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:35:54.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:35:54.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:35:54.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:54.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:54.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:35:54.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:35:54.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:35:54.954 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:35:54.956 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:35:54.956 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:35:54.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:54.956 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:35:54.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:35:54.956 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:35:54.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:35:54.956 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:35:54.960 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:35:54.960 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:35:54.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:35:54.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:35:54.965 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:35:55.448 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:35:55.486 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:35:55.487 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:35:55.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:55.488 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:35:55.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:35:55.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:35:55.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:35:55.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:55.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:35:55.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:35:55.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:35:55.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:35:55.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:35:55.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:35:55.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:35:55.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:55.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:55.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:35:55.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:55.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:35:55.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:35:55.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:35:55.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:35:55.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:35:55.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:35:55.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:35:55.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:35:55.926 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:35:55.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:55.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:55.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:55.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:56.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:35:56.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:35:56.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:56.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:56.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:56.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:57.359 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:35:57.836 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:35:57.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:57.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:57.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:57.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:58.314 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:35:58.792 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:35:58.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:58.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:58.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:58.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:35:59.269 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:35:59.746 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:35:59.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:35:59.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:35:59.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:35:59.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:36:00.242 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:36:00.720 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:36:01.198 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:36:01.675 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:36:02.153 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:36:02.631 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:36:03.108 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:36:03.585 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:36:04.063 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:36:04.541 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:36:05.018 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:36:05.496 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:36:05.973 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:36:06.451 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:36:06.928 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:36:07.406 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:36:07.884 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:36:08.361 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:36:08.838 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:36:09.316 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:36:09.793 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:36:10.276 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:36:10.754 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:36:11.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:11.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:11.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:11.051 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=3432 tn=2 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:11.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:36:11.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:11.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:36:11.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:36:11.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:36:11.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:36:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:36:11.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:11.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:11.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:36:11.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:36:11.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:36:11.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:36:11.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:11.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:11.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:11.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:11.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:11.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:11.096 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:36:11.097 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:11.097 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:11.097 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:11.097 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:11.097 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:11.097 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:11.097 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:16.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:16.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:16.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:16.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:16.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:16.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:16.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:16.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:16.106 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:16.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:16.107 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:36:16.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:36:16.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:36:16.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:16.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:16.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:16.112 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:36:16.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:16.112 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:36:16.114 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:36:16.114 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:36:16.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:16.114 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:16.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:16.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:36:16.115 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:16.115 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:36:16.116 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:36:16.116 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:36:16.116 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:16.116 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:16.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:16.116 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:36:16.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:16.117 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:36:16.120 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:36:16.120 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:36:16.120 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:16.125 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:36:16.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:36:16.649 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:36:16.651 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:36:16.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:36:16.653 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:36:16.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:16.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:16.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:36:16.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:16.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:36:16.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:36:16.685 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:36:16.685 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:36:16.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:36:16.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:36:16.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:36:16.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:16.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:16.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:36:16.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:36:17.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:17.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:17.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:17.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:36:17.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:17.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:36:17.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:36:17.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:36:17.004 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:36:17.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:36:17.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:17.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:17.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:36:17.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:36:17.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:36:17.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:36:17.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:17.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:17.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:17.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:17.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:17.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:17.040 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:36:22.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:22.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:22.041 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:22.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:22.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:22.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:22.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:22.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:22.053 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:22.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:22.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:36:22.055 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:36:22.055 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:36:22.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:22.055 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:22.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:22.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:36:22.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:22.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:36:22.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:36:22.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:36:22.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:22.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:22.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:22.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:36:22.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:22.056 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:36:22.057 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:36:22.057 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:36:22.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:22.057 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:22.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:22.057 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:36:22.057 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:22.057 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:36:22.058 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:36:22.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:36:22.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:36:22.058 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:36:22.058 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:36:22.059 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:36:22.059 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:36:22.059 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:22.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:22.063 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:36:22.546 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:36:22.583 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:36:22.585 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:36:22.587 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:36:22.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:36:22.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:22.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:22.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:36:22.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:22.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:36:22.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:36:22.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:36:22.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:36:22.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:36:22.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:36:22.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:36:22.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:22.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:23.024 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:36:23.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:36:23.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:36:23.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:36:23.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:36:23.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:36:23.979 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:36:24.062 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:36:24.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:36:24.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:36:24.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:36:24.457 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:36:24.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:24.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:24.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:24.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:36:24.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:36:24.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:36:24.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:36:24.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:36:24.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:36:24.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:36:24.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:36:24.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:36:24.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:36:24.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:36:24.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:36:24.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:36:24.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:24.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:24.706 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:24.706 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:24.706 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:24.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:24.707 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:36:24.707 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.707 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.707 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.707 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.707 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:24.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:36:29.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:29.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:29.706 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:29.707 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:29.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:29.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:29.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:29.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:29.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:29.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:29.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:36:29.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:36:29.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:36:29.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:29.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:29.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:29.728 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:36:29.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:29.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:36:29.732 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:36:29.732 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:36:29.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:29.733 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:29.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:29.733 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:36:29.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:29.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:36:29.737 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:36:29.737 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:36:29.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:29.737 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:29.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:29.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:36:29.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:29.738 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:36:29.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:36:29.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:36:29.745 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:36:29.745 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:36:29.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:29.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:29.748 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:29.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:34.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:34.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:34.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:34.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:34.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:34.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:34.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:34.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:34.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:36:34.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:36:34.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:36:34.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:36:34.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:34.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:34.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:34.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:36:34.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:36:34.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:34.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:36:34.754 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:36:34.754 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:34.754 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:36:34.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:34.755 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:36:34.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:36:34.755 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:36:34.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:36:34.756 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:36:34.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:34.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:34.757 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:34.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:41.549 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.36.20:5700'
2026-02-19 04:36:41.550 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.36.20:5802)
2026-02-19 04:36:41.550 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.36.20:5801)
2026-02-19 04:36:41.550 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.36.22:6700'
2026-02-19 04:36:41.550 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.36.22:6802)
2026-02-19 04:36:41.550 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.36.22:6801)
2026-02-19 04:36:41.550 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.36.20:5700/1'
2026-02-19 04:36:41.550 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.36.20:5804)
2026-02-19 04:36:41.550 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.36.20:5803)
2026-02-19 04:36:41.550 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.36.20:5700/2'
2026-02-19 04:36:41.550 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.36.20:5806)
2026-02-19 04:36:41.550 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.36.20:5805)
2026-02-19 04:36:41.550 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.36.20:5700/3'
2026-02-19 04:36:41.550 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.36.20:5808)
2026-02-19 04:36:41.550 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.36.20:5807)
2026-02-19 04:36:41.550 [INFO] fake_trx.py:429 Init complete
2026-02-19 04:36:41.550 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-02-19 04:36:43.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:43.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:43.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:43.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:43.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:43.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:54.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:54.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:54.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:54.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:59.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:36:59.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:36:59.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:36:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:59.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:59.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:59.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:36:59.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:36:59.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:36:59.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:04.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:04.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:04.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:04.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:04.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:04.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:04.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:04.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:04.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:04.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:09.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:09.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:09.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:09.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:09.278 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:09.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:09.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:09.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:09.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:09.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:14.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:14.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:14.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:14.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:14.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:14.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:14.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:14.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:14.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:14.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:19.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:19.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:19.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:19.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:19.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:19.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:19.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:19.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:19.396 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:19.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:24.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:24.404 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:24.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:24.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:24.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:24.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:24.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:24.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:24.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:24.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:29.437 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:29.437 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:29.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:29.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:29.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:29.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:29.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:29.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:29.466 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:29.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:34.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:34.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:34.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:34.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:34.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:34.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:34.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:39.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:39.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:39.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:39.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:39.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:39.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:39.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:39.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:39.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:39.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:44.537 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:44.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:44.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:44.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:44.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:44.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:44.599 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:37:44.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:37:44.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:37:44.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:37:44.599 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:37:44.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:37:44.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:37:44.600 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:37:44.600 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:37:44.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:37:44.600 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:37:44.600 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:37:44.600 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:37:44.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:37:44.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:37:44.600 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 0 -> 1
2026-02-19 04:37:44.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:37:44.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 0 -> 1
2026-02-19 04:37:44.601 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:37:44.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:37:44.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 0 -> 1
2026-02-19 04:37:44.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:37:44.601 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 0 -> 1
2026-02-19 04:37:44.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:44.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:44.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:44.613 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:49.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:49.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:49.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:49.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:49.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:49.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:49.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:49.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:49.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:49.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:54.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:54.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:54.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:54.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:54.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:54.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:54.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:37:54.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:37:54.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:37:54.661 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:37:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:54.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:54.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:59.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:37:59.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:37:59.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:59.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:59.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:37:59.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:59.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:37:59.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:37:59.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:37:59.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:04.722 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:04.722 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:04.722 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:04.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:04.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:04.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:04.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:04.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:04.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:04.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:09.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:09.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:09.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:09.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:09.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:09.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:11.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:11.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:11.783 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:11.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:16.793 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:16.793 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:16.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:16.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:16.794 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:16.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:16.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:16.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:16.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:16.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:22.909 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.36.20:5700'
2026-02-19 04:38:22.909 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.36.20:5802)
2026-02-19 04:38:22.909 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.36.20:5801)
2026-02-19 04:38:22.909 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.36.22:6700'
2026-02-19 04:38:22.909 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.36.22:6802)
2026-02-19 04:38:22.909 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.36.22:6801)
2026-02-19 04:38:22.909 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.36.20:5700/1'
2026-02-19 04:38:22.909 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.36.20:5804)
2026-02-19 04:38:22.909 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.36.20:5803)
2026-02-19 04:38:22.909 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.36.20:5700/2'
2026-02-19 04:38:22.909 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.36.20:5806)
2026-02-19 04:38:22.909 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.36.20:5805)
2026-02-19 04:38:22.909 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.36.20:5700/3'
2026-02-19 04:38:22.909 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.36.20:5808)
2026-02-19 04:38:22.909 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.36.20:5807)
2026-02-19 04:38:22.909 [INFO] fake_trx.py:429 Init complete
2026-02-19 04:38:22.909 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-02-19 04:38:24.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:24.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:24.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:24.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:24.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:24.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:27.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:27.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:27.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:27.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:27.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 0 -> 1
2026-02-19 04:38:27.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:38:27.490 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:38:27.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:27.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:27.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:27.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:38:27.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:27.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 0 -> 1
2026-02-19 04:38:27.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:38:27.493 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:38:27.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:27.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:27.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:38:27.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:27.494 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 0 -> 1
2026-02-19 04:38:27.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:27.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:38:27.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:38:27.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:27.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:27.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:27.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:38:27.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:27.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 0 -> 1
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:38:27.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:38:27.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:38:27.501 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:38:27.501 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:27.506 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:38:27.988 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:38:28.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:28.043 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:38:28.046 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:38:28.048 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:38:28.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:28.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:28.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:28.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:28.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:28.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:28.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:28.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:28.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:28.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:28.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:28.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:28.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:28.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:38:28.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:28.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:28.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:28.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:28.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:28.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:28.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:28.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:28.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:28.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:28.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:28.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:28.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:28.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:28.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:28.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:28.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:28.942 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:38:28.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:28.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:28.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:28.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:29.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:29.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:29.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:29.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:29.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:29.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:29.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:29.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:29.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:29.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:29.420 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:38:29.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:29.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:29.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:29.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:29.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:29.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:29.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:29.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:29.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:29.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:29.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:29.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:29.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:29.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:29.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:29.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:29.897 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:38:29.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:29.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:29.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:29.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:29.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:30.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:30.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:30.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:30.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:30.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:30.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:30.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:30.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:30.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:30.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:30.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:30.375 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:38:30.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:30.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:30.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:30.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:30.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:30.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:30.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:30.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:30.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:30.852 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:38:31.330 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:38:31.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:31.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:31.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:31.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:31.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:31.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:31.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:31.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:31.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:31.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:31.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:31.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:31.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:31.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:31.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:31.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:31.509 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:31.602 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:31.603 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:38:31.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:31.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:31.809 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:38:32.287 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:38:32.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:32.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:32.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:32.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:32.432 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:32.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:32.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:32.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:32.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:32.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:32.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:32.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:32.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:32.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:32.559 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:32.559 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:38:32.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:32.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:32.765 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:38:32.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:32.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:32.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:32.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:32.981 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:33.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:33.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:33.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:33.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:33.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:33.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:33.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:33.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:33.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:33.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:33.242 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:38:33.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:33.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:33.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:33.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:33.721 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:38:34.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:34.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:34.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:34.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:34.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:34.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:34.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:34.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:34.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:34.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:34.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:34.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:34.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:34.198 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:38:34.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:34.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:34.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:34.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:34.677 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:38:35.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:35.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:35.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:35.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:35.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:35.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:35.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:35.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:35.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:35.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:35.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:35.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:35.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:35.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:35.154 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:38:35.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:35.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:35.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:35.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:35.632 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:38:35.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:35.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:35.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:35.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:35.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:35.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:35.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:35.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:35.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:35.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:35.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:35.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:36.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:36.109 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:38:36.146 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:36.146 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:38:36.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:36.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:36.587 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:38:36.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:36.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:36.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:36.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:36.936 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:36.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:36.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:36.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:36.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:36.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:36.956 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:36.956 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:36.956 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:37.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:37.064 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:38:37.101 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:37.101 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:38:37.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:37.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:37.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:37.483 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:37.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:37.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:37.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:37.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:37.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:37.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:37.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:37.542 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:38:37.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:37.608 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:37.608 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:37.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:37.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:37.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:37.703 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:37.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:37.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:37.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:37.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:37.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:37.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:37.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:37.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:37.841 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:37.842 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:37.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:37.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.020 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:38:38.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:38.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:38.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:38.199 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:38.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:38.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:38.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:38.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:38.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:38.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:38.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:38.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:38.319 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:38.320 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:38.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.498 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:38:38.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:38.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:38.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:38.714 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:38.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:38.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:38.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:38.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:38.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:38.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:38.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:38.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:38.797 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:38.797 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:38.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:38.976 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:38:39.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:39.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:39.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:39.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:39.190 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:39.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:39.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:39.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:39.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:39.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:39.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:39.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:39.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:39.453 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:38:39.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:39.489 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:39.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:39.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:39.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:39.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:39.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:39.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:39.848 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:39.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:39.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:39.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:39.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:39.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:39.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:39.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:39.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:39.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:39.930 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:38:39.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:39.968 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:39.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:39.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:40.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:40.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:40.345 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:40.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:40.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:40.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:40.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:40.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:40.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:40.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:40.408 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:38:40.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:40.471 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:40.472 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:40.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:40.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:40.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:40.839 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:40.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:40.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:40.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:40.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:38:40.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:38:40.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:38:40.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:38:40.886 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:38:40.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:40.949 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:38:40.950 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:38:40.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:40.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:41.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:38:41.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:41.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:41.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:41.336 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:38:41.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:41.342 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:41.342 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:41.342 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:41.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:41.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:41.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:41.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:41.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:41.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:41.343 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:38:41.343 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2957 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:41.343 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2957 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:41.343 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2957 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:41.343 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2957 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:41.343 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2957 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:41.343 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2957 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:41.343 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2957 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:46.346 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:46.346 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:46.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:46.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:46.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:46.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:46.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:46.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:46.362 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:46.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:46.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:38:46.368 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:38:46.368 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:38:46.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:46.368 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:46.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:46.369 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:38:46.369 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:46.369 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:38:46.373 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:38:46.373 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:38:46.373 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:46.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:46.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:46.374 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:38:46.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:46.374 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:38:46.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:38:46.377 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:38:46.377 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:46.377 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:46.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:46.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:38:46.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:46.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:38:46.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:38:46.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:38:46.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:38:46.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:38:46.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:38:46.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:38:46.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:38:46.384 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:38:46.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:38:46.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:46.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:38:46.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:38:46.919 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:38:46.921 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:38:46.923 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:38:46.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:46.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:46.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:46.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:46.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.345 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:38:47.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:47.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:47.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:47.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:47.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:47.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:47.816 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-02-19 04:38:48.286 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:38:48.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:48.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:48.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:48.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:48.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:48.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:48.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
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2026-02-19 04:38:48.757 [DEBUG] clck_gen.py:113 IND CLOCK 510
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2026-02-19 04:38:49.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.228 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:38:49.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:49.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:49.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:49.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:49.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:49.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:49.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:49.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:49.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:49.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:49.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:49.258 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:38:49.259 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=620 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:49.259 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=620 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:49.259 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=620 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:49.259 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=620 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:49.259 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=620 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:49.259 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=620 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:49.260 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=620 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:54.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:54.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:54.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:54.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:54.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:54.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:54.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:54.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:54.279 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:54.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:54.279 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:38:54.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:38:54.284 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:38:54.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:54.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:54.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:54.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:38:54.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:54.286 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:38:54.288 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:38:54.288 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:38:54.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:54.288 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:54.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:54.288 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:38:54.288 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:54.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:38:54.290 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:38:54.290 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:38:54.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:54.291 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:54.291 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:54.291 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:38:54.291 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:54.291 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:38:54.293 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:38:54.294 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:38:54.294 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:38:54.294 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:54.299 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:38:54.783 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:38:54.823 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:38:54.825 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:38:54.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:54.826 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:38:54.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:38:54.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:38:54.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:38:54.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:54.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:38:54.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:38:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:38:54.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:38:54.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:38:54.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:54.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:54.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:54.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:54.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:54.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:54.872 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:38:54.873 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:54.873 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:54.873 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:54.873 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:54.873 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:54.873 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:54.873 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:38:59.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:38:59.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:38:59.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:59.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:59.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:59.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:59.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:38:59.883 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:59.883 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:59.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:38:59.884 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:38:59.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:38:59.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:38:59.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:59.887 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:59.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:38:59.887 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:38:59.888 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:38:59.888 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:38:59.889 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:38:59.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:38:59.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:59.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:59.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:38:59.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:38:59.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:38:59.890 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:38:59.892 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:38:59.892 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:38:59.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:59.892 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:38:59.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:38:59.892 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:38:59.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:38:59.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.895 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:38:59.895 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:38:59.895 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:38:59.896 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:38:59.900 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:39:00.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:39:00.423 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:39:00.426 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:39:00.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:00.428 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:39:00.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:00.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:00.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:00.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:39:00.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:39:00.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:39:00.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:39:00.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:39:00.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:39:00.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:39:00.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:39:00.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:39:00.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:39:00.472 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:39:00.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:00.473 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:05.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:39:05.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:39:05.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:39:05.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:39:05.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:39:05.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:39:05.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:39:05.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:39:05.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:05.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:39:05.486 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:39:05.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:39:05.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:39:05.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:39:05.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:05.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:39:05.492 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:39:05.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:39:05.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:39:05.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:39:05.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:39:05.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:39:05.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:05.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:39:05.495 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:39:05.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:39:05.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:39:05.497 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:39:05.497 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:39:05.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:39:05.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:05.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:39:05.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:39:05.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:39:05.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:39:05.501 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:39:05.501 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:39:05.501 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:05.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:05.506 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:39:05.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:39:06.027 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:39:06.029 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:39:06.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:06.031 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:39:06.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:06.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:06.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:06.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:39:06.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:39:06.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:39:06.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:39:06.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:39:06.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:39:06.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:39:06.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:39:06.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:39:06.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:39:06.165 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:39:11.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:39:11.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:39:11.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:39:11.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:39:11.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:39:11.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:39:11.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:39:11.194 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:39:11.194 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:11.195 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:39:11.195 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:39:11.202 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:39:11.203 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:39:11.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:39:11.204 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:11.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:39:11.204 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:39:11.205 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:39:11.205 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:39:11.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:39:11.209 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:39:11.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:39:11.209 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:11.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:39:11.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:39:11.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:39:11.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:39:11.213 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:39:11.213 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:39:11.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:39:11.213 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:39:11.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:39:11.214 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:39:11.214 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:39:11.214 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:39:11.217 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:39:11.218 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:39:11.218 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:39:11.218 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:39:11.219 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:11.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:39:11.223 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:39:11.705 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:39:11.752 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:39:11.754 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:39:11.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:11.757 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:39:11.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:11.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:11.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:11.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:11.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:11.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:11.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:11.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:11.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:11.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:11.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:11.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:11.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:11.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:12.183 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:39:12.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:39:12.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:39:12.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:39:12.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:39:12.661 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:39:13.138 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:39:13.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:39:13.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:39:13.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:39:13.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:39:13.616 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:39:14.094 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:39:14.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:39:14.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:39:14.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:39:14.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:39:14.572 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:39:15.049 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:39:15.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:39:15.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:39:15.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:39:15.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:39:15.527 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:39:15.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:15.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:15.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:15.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:15.912 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1003 tn=3 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:39:15.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:15.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:15.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:15.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:15.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:15.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:15.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:15.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:15.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:15.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:15.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:15.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:15.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:16.005 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:39:16.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:39:16.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:39:16.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:39:16.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:39:16.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:16.483 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:39:16.961 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:39:17.439 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:39:17.917 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:39:18.394 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:39:18.872 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:39:19.350 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:39:19.828 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:39:20.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:20.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:20.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:20.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:20.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:20.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:20.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:20.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:20.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:20.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:20.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:20.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:20.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:20.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:20.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:20.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:20.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:20.305 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:39:20.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:20.783 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:39:21.261 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:39:21.739 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:39:22.217 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:39:22.695 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:39:23.173 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:39:23.650 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:39:24.128 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:39:24.606 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:39:24.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:24.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:24.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:24.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:24.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:24.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:24.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:24.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:24.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:24.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:24.769 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:24.769 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:24.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:24.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:24.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:24.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:24.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:25.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:25.083 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:39:25.561 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:39:26.039 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:39:26.517 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:39:26.994 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:39:27.472 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:39:27.949 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:39:28.427 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:39:28.905 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:39:29.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:29.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:29.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:29.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:29.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:29.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:29.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:29.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:29.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:29.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:29.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:29.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:29.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:29.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:29.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:29.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:29.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:29.382 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:39:29.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:29.860 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:39:30.337 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:39:30.815 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:39:31.292 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:39:31.770 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:39:32.248 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:39:32.726 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:39:33.204 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:39:33.682 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:39:33.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:33.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:33.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:33.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:33.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:33.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:33.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:33.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:33.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:33.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:33.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:33.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:33.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:33.782 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:39:33.783 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:39:33.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:33.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:34.160 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:39:34.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:34.639 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:39:35.118 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:39:35.596 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:39:36.074 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:39:36.552 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:39:37.031 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:39:37.510 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:39:37.988 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:39:38.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:38.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:38.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:38.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:38.180 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:39:38.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:38.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:38.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:38.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:38.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:38.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:38.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:38.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:38.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:38.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:39:38.232 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:39:38.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:38.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:38.461 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:39:38.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:38.938 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:39:39.417 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:39:39.896 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:39:40.374 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:39:40.853 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:39:41.331 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:39:41.810 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:39:42.289 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:39:42.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:42.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:42.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:42.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:42.622 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:39:42.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:42.640 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:42.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:42.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:42.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:42.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:42.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:42.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:42.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:42.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:42.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:42.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:42.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:42.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:42.767 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:39:43.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:43.245 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:39:43.723 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:39:44.202 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:39:44.680 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:39:45.158 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:39:45.636 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:39:46.114 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:39:46.592 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:39:47.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:47.070 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:39:47.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:47.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:47.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:47.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:47.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:47.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:47.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:47.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:47.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:47.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:47.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:47.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:47.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:47.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:47.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:47.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:47.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:47.548 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:39:48.026 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:39:48.504 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:39:48.982 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:39:49.461 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:39:49.939 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:39:50.417 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:39:50.895 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:39:51.373 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:39:51.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:51.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:51.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:51.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:51.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:51.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:51.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:51.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:51.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:51.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:51.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:51.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:51.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:39:51.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:51.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:51.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:51.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:51.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:51.850 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:39:52.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:52.328 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:39:52.806 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:39:53.284 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:39:53.761 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:39:54.239 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:39:54.717 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:39:55.195 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:39:55.673 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:39:56.151 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:39:56.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:56.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:56.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:56.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:56.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:39:56.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:39:56.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:39:56.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:56.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:39:56.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:39:56.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:39:56.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:39:56.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:56.394 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:39:56.394 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:39:56.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:56.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:39:56.629 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:39:57.108 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:39:57.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:39:57.587 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:39:58.065 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:39:58.545 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:39:59.024 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:39:59.502 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 04:39:59.981 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 04:40:00.459 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 04:40:00.938 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 04:40:01.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:01.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:01.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:01.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:01.211 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:01.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:01.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:01.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:01.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:01.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:01.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:01.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:01.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:01.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:01.276 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:01.276 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:40:01.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:01.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:01.417 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 04:40:01.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:01.894 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 04:40:02.373 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 04:40:02.852 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 04:40:03.330 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 04:40:03.808 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 04:40:04.287 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 04:40:04.766 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 04:40:05.244 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 04:40:05.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:05.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:05.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:05.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:05.662 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:05.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:05.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:05.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:05.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:05.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:05.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:05.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:05.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:05.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:05.722 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 04:40:05.724 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:05.725 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:05.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:05.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:05.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:06.199 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 04:40:06.678 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 04:40:07.156 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 04:40:07.635 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 04:40:08.113 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 04:40:08.590 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 04:40:09.068 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 04:40:09.546 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 04:40:09.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:09.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:09.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:09.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:09.882 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:09.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:09.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:09.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:09.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:09.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:09.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:09.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:09.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:09.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:09.923 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:09.923 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:09.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:09.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:10.023 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 04:40:10.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:10.501 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 04:40:10.980 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 04:40:11.457 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 04:40:11.936 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 04:40:12.414 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 04:40:12.892 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 04:40:13.371 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 04:40:13.849 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 04:40:14.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:14.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:14.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:14.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:14.202 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:14.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:14.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:14.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:14.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:14.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:14.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:14.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:14.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:14.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:14.222 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:14.222 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:14.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:14.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:14.327 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 04:40:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:14.805 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 04:40:15.283 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 04:40:15.762 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 04:40:16.240 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 04:40:16.719 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 04:40:17.197 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 04:40:17.675 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 04:40:18.153 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 04:40:18.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:18.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:18.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:18.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:18.524 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:18.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:18.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:18.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:18.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:18.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:18.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:18.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:18.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:18.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:18.582 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:18.582 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:18.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:18.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:18.630 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 04:40:18.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:19.108 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 04:40:19.586 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 04:40:20.064 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 04:40:20.542 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 04:40:21.020 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 04:40:21.498 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 04:40:21.976 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 04:40:22.454 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 04:40:22.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:22.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:22.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:22.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:22.846 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:22.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:22.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:22.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:22.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:22.868 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:22.868 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:22.868 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:22.868 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:22.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:22.872 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:22.872 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:22.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:22.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:22.932 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 04:40:23.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:23.409 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 04:40:23.887 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 04:40:24.365 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 04:40:24.843 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 04:40:25.321 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 04:40:25.800 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 04:40:26.278 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 04:40:26.756 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 04:40:27.235 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 04:40:27.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:27.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:27.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:27.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:27.328 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:27.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:27.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:27.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:27.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:27.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:27.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:27.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:27.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:27.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:27.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:27.373 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:27.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:27.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:27.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:27.706 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 04:40:28.183 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 04:40:28.662 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 04:40:29.140 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 04:40:29.618 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 04:40:30.097 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 04:40:30.575 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 04:40:31.053 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 04:40:31.531 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 04:40:31.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:31.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:31.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:31.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:31.648 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:31.648 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=17163 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:31.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:31.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:31.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:31.670 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:31.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:31.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:31.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:31.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:31.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:31.727 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:31.728 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:31.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:31.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:31.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:32.009 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 04:40:32.488 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-19 04:40:32.966 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-19 04:40:33.444 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-19 04:40:33.922 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-19 04:40:34.400 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-19 04:40:34.878 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-19 04:40:35.357 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-19 04:40:35.835 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-19 04:40:35.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:35.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:35.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:35.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:35.964 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:35.978 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:35.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:35.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:35.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:35.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:35.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:35.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:35.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:36.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:36.030 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:36.030 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:36.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:36.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:36.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:36.313 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-19 04:40:36.792 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-19 04:40:37.270 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-19 04:40:37.749 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-19 04:40:38.227 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-19 04:40:38.705 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-19 04:40:39.183 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-19 04:40:39.662 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-19 04:40:40.140 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-19 04:40:40.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:40.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:40.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:40.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:40.286 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:40:40.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:40:40.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:40:40.292 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:40:40.292 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19007 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:40.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19007 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:40.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19007 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:40.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19007 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:40.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19007 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:40.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19007 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:40.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=19007 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:40:45.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:40:45.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:40:45.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:40:45.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:40:45.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:40:45.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:40:45.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:40:45.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:40:45.305 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:45.305 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:40:45.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:40:45.307 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:40:45.307 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:40:45.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:40:45.307 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:45.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:40:45.308 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:40:45.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:40:45.308 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:40:45.310 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:40:45.310 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:40:45.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:40:45.310 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:45.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:40:45.310 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:40:45.311 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:40:45.311 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:40:45.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:40:45.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:40:45.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:40:45.313 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:45.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:40:45.313 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:40:45.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:40:45.313 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:40:45.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:40:45.316 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:40:45.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:45.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:40:45.318 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:40:45.318 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:45.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:40:50.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:40:50.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:40:50.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:40:50.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:40:50.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:40:50.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:40:50.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:40:50.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:40:50.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:50.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:40:50.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:40:50.340 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:40:50.340 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:40:50.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:40:50.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:50.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:40:50.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:40:50.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:40:50.342 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:40:50.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:40:50.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:40:50.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:40:50.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:50.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:40:50.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:40:50.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:40:50.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:40:50.356 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:40:50.356 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:40:50.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:40:50.356 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:40:50.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:40:50.357 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:40:50.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:40:50.357 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:40:50.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:40:50.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:40:50.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:40:50.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:40:50.366 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:40:50.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:40:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:40:50.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:40:50.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:50.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:40:50.856 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:40:50.898 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:40:50.900 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:40:50.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:50.903 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:40:50.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:50.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:50.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:50.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:50.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:50.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:50.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:50.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:50.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:50.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:50.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:50.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:50.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:51.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:51.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:51.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:51.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:51.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:51.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:51.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:51.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:51.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:51.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:51.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:51.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:51.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.333 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:40:51.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:40:51.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:40:51.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:40:51.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:40:51.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:51.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:51.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:51.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:51.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:51.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:51.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:51.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:51.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:51.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:51.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:51.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:51.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:51.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:51.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:51.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:51.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:51.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:51.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:51.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:51.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:51.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:51.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:51.810 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:40:51.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:51.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:51.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:51.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:51.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:52.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:52.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:52.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:52.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:52.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:52.288 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:40:52.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:52.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:52.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:52.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:52.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:52.341 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:52.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:52.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:40:52.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:40:52.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:40:52.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:40:52.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:40:52.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:52.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:52.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:52.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:52.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:52.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:52.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:52.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:52.817 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:52.817 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:52.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:52.866 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:52.866 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:40:52.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:52.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.243 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:40:53.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:53.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:53.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:53.352 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:53.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:53.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:53.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:53.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:53.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:53.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:53.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:53.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:40:53.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:40:53.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:40:53.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:40:53.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:53.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:53.379 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:40:53.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.717 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:40:53.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:53.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:53.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:53.891 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:53.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:53.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:53.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:53.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:53.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:53.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:53.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:53.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:53.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:53.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:53.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:53.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:53.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:54.195 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:40:54.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:40:54.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:40:54.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:40:54.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:40:54.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:54.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:54.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:54.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:54.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:54.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:54.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:54.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:54.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:54.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:54.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:54.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:54.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:54.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:54.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:54.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:54.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:40:54.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:54.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:54.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:54.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:55.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:55.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:55.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:55.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:55.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:55.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:55.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:55.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:55.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:40:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:55.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:55.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:55.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:55.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:55.150 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:40:55.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:40:55.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:40:55.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:40:55.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:40:55.627 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:40:55.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:55.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:55.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:55.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:55.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:55.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:55.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:55.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:55.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:55.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:55.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:55.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:55.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:55.971 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:55.972 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:40:55.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:55.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:56.104 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:40:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:56.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:56.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:56.387 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:56.388 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:56.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:56.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:56.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:56.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:56.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:56.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:56.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:56.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:56.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:56.464 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:56.464 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:40:56.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:56.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:56.582 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:40:56.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:56.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:56.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:56.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:56.937 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:56.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:56.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:56.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:56.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:56.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:56.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:56.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:56.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:56.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:57.000 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:57.000 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:57.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.060 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:40:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:57.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:57.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:57.221 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:57.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:57.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:57.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:57.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:57.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:57.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:57.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:57.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:57.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:57.303 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:57.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.538 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:40:57.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:57.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:57.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:57.716 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:57.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:57.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:57.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:57.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:57.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:57.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:57.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:57.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:57.789 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:57.789 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:57.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:57.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.016 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:40:58.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:58.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:58.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:58.213 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:58.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:58.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:58.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:58.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:58.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:58.222 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:58.222 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:58.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:58.270 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:58.271 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:58.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.494 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:40:58.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:58.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:58.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:58.708 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:58.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:58.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:58.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:58.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:58.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:58.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:58.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:58.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:58.769 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:58.769 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:58.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:58.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:58.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:58.888 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:58.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:58.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:58.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:58.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:58.910 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:58.910 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:58.910 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:58.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:58.967 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:58.968 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:58.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:58.971 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:40:59.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:59.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:59.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:59.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:59.384 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:59.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:59.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:59.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:59.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:59.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:59.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:59.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:59.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:59.449 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:40:59.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:59.455 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:59.455 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:59.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:59.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:59.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:59.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:59.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:59.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:59.880 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:40:59.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:40:59.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:40:59.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:40:59.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:59.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:40:59.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:40:59.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:40:59.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:40:59.926 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:40:59.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:40:59.954 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:40:59.954 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:40:59.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:40:59.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:00.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:00.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:00.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:00.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:00.378 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:00.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:00.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:00.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:00.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:00.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:41:00.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:41:00.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:41:00.390 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:41:00.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:41:00.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:41:00.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:41:05.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:41:05.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:41:05.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:41:05.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:41:05.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:41:05.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:41:05.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:41:05.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:41:05.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:05.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:41:05.402 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:41:05.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:41:05.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:41:05.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:41:05.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:05.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:41:05.407 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:41:05.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:41:05.407 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:41:05.410 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:41:05.410 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:41:05.410 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:41:05.410 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:05.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:41:05.411 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:41:05.411 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:41:05.411 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:41:05.414 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:41:05.414 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:41:05.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:41:05.415 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:05.415 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:41:05.415 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:41:05.415 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:41:05.415 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:41:05.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:41:05.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:41:05.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:41:05.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:41:05.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:41:05.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:41:05.421 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:41:05.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:05.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:05.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:41:05.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:41:05.958 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:41:05.960 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:41:05.962 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:41:05.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:05.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:05.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:05.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:05.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:05.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:05.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:05.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:05.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:06.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:06.013 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:06.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:06.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:06.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:06.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:41:06.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:06.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:06.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:06.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:06.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:06.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:06.867 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:41:07.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:07.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:07.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:07.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:07.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:07.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:07.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:07.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:07.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:07.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:07.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:07.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:07.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:07.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:07.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:07.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:07.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:07.344 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:41:07.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:07.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:07.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:07.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:07.822 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:41:08.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:08.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:08.300 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:41:08.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:08.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:08.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:08.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:08.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:08.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:08.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:08.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:08.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:08.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:08.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:08.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:08.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:08.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:08.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:08.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:08.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:08.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:08.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:08.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:08.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:08.777 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:41:09.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:09.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:09.255 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:41:09.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:09.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:09.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:09.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:09.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:09.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:09.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:09.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:09.696 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=913 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:09.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:09.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:09.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:09.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:09.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:09.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:09.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:09.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:09.732 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:41:09.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:09.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:09.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:09.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:09.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:10.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:41:10.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:10.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:10.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:10.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:10.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:10.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:10.687 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:41:11.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:11.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:11.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:11.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:11.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:11.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:11.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:11.165 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:41:11.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:11.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:11.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:11.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:11.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:11.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:11.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:11.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:11.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:11.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:11.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:41:12.120 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:41:12.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:12.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:12.598 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:41:12.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:12.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:12.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:12.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:12.729 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1560 tn=3 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:12.729 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1560 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:12.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:12.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:12.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:12.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:12.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:12.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:12.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:12.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:12.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:12.803 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:12.803 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:41:12.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:12.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:13.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:41:13.554 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:41:13.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:13.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:14.032 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:41:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:14.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:14.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:14.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:14.251 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:14.251 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1885 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:14.251 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1885 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:14.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:14.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:14.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:14.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:14.272 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:14.272 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:14.272 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:14.272 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:14.321 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:14.322 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:41:14.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:14.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:14.510 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:41:14.989 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:41:15.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:15.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:15.467 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:41:15.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:15.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:15.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:15.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:15.774 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:15.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:15.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:15.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:15.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:15.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:15.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:15.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:15.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:15.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:15.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:15.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:15.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:15.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:15.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:15.946 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:41:16.424 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:41:16.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:16.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:16.902 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:41:17.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:17.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:17.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:17.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:17.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:17.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:17.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:17.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:17.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:17.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:17.319 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:17.319 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:17.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:17.380 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:41:17.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:17.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:17.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:17.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:17.859 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:41:18.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:18.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:18.337 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:41:18.815 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:41:18.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:18.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:18.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:18.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:18.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:18.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:18.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:18.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:18.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:18.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:18.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:18.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:18.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:18.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:18.892 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:18.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:18.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:18.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:19.292 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:41:19.771 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:41:20.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:20.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:20.249 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:41:20.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:20.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:20.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:20.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:20.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:20.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:20.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:20.726 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:41:20.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:20.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:20.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:20.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:20.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:20.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:20.779 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:20.779 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:41:20.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:20.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:41:21.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:21.683 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:41:21.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:22.162 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:41:22.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:22.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:22.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:22.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:22.179 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:22.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:22.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:22.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:22.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:22.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:22.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:22.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:22.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:22.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:22.252 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:22.252 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:41:22.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:22.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:22.640 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:41:23.119 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:41:23.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:23.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:23.595 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:41:23.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:23.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:23.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:23.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:23.699 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:23.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:23.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:23.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:23.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:23.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:23.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:23.720 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:23.720 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:23.771 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:23.771 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:23.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:23.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:24.073 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:41:24.551 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:41:24.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:24.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:25.030 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:41:25.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:25.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:25.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:25.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:25.189 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:25.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:25.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:25.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:25.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:25.200 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:25.200 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:25.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:25.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:25.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:25.251 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:25.251 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:25.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:25.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:25.508 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:41:25.986 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:41:26.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:26.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:26.465 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:41:26.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:26.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:26.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:26.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:26.643 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:26.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:26.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:26.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:26.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:26.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:26.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:26.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:26.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:26.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:26.714 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:26.714 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:26.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:26.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:26.942 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:41:27.420 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:41:27.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:27.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:27.898 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:41:28.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:28.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:28.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:28.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:28.095 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:28.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:28.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:28.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:28.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:28.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:28.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:28.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:28.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:28.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:28.166 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:28.166 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:28.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:28.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:28.376 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:41:28.854 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:41:29.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:29.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:29.332 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:41:29.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:29.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:29.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:29.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:29.548 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:29.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:29.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:29.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:29.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:29.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:29.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:29.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:29.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:29.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:29.623 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:29.623 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:29.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:29.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:29.809 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:41:30.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:30.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:30.288 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:41:30.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:30.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:30.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:30.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:30.684 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:30.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:30.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:30.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:30.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:30.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:30.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:30.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:30.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:30.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:30.765 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:41:30.768 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:30.768 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:30.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:30.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:31.243 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:41:31.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:31.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:31.722 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:41:32.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:32.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:32.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:32.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:32.137 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:32.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:32.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:32.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:32.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:32.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:32.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:32.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:32.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:32.199 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:41:32.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:32.210 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:32.210 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:32.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:32.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:32.678 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:41:33.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:33.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:33.156 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:41:33.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:33.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:33.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:33.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:33.587 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:33.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:33.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:33.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:33.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:33.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:33.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:33.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:33.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:33.634 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:41:33.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:33.658 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:41:33.658 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:41:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:33.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:34.112 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:41:34.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:34.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:34.590 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:41:35.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:35.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:35.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:35.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:35.041 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:41:35.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:35.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:35.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:35.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:35.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:41:35.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:41:35.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:41:35.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:41:35.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:41:35.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:41:35.056 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:41:35.057 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:35.057 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:35.057 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:35.057 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:35.057 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:35.057 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:41:40.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:41:40.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:41:40.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:41:40.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:41:40.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:41:40.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:41:40.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:41:40.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:41:40.067 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:40.067 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:41:40.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:41:40.070 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:41:40.070 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:41:40.071 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:41:40.071 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:40.071 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:41:40.071 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:41:40.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:41:40.072 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:41:40.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:41:40.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:41:40.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:41:40.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:40.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:41:40.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:41:40.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:41:40.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:41:40.075 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:41:40.076 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:41:40.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:41:40.076 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:41:40.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:41:40.076 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:41:40.076 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:41:40.076 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:41:40.078 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:41:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:41:40.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:41:40.079 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:41:40.079 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:41:40.079 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:41:40.084 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:41:40.568 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:41:40.604 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:41:40.605 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:41:40.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:40.606 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:41:40.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:40.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:40.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:40.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:40.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:40.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:40.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:40.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:40.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:40.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:40.672 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:40.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:40.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:41.045 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:41:41.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:41.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:41.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:41.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:41.523 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:41:42.000 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:41:42.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:42.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:42.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:42.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:42.478 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:41:42.956 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:41:43.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:43.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:43.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:43.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:43.434 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:41:43.912 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:41:44.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:44.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:44.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:44.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:44.390 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:41:44.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:44.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:44.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:44.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:44.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:44.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:44.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:44.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:44.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:44.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:44.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:44.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:44.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:44.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:44.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:44.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:44.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:44.868 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:41:45.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:41:45.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:41:45.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:41:45.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:41:45.346 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:41:45.823 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:41:46.301 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:41:46.779 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:41:47.257 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:41:47.734 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:41:48.212 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:41:48.689 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:41:48.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:48.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:48.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:48.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:48.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:48.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:48.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:48.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:48.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:48.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:48.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:48.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:48.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:48.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:48.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:48.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:48.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:49.166 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:41:49.644 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:41:50.122 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:41:50.600 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:41:51.078 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:41:51.555 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:41:52.033 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:41:52.511 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:41:52.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:52.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:52.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:52.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:52.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:52.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:52.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:52.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:52.970 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:52.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:52.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:52.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:52.988 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:41:53.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:53.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:53.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:53.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:53.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:53.465 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:41:53.943 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:41:54.421 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:41:54.899 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:41:55.377 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:41:55.855 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:41:56.333 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:41:56.811 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:41:57.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:57.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:57.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:57.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:57.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:41:57.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:41:57.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:41:57.288 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:41:57.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:57.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:57.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:57.290 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:41:57.290 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:41:57.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:41:57.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:41:57.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:41:57.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:57.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:41:57.764 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:41:58.242 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:41:58.721 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:41:59.198 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:41:59.676 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:42:00.154 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:42:00.632 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:42:01.110 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:42:01.588 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:42:01.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:01.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:01.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:01.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:02.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:02.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:02.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:02.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:02.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:02.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:02.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:02.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:02.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:02.065 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:42:02.067 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:02.067 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:42:02.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:02.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:02.543 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:42:03.021 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:42:03.500 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:42:03.978 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:42:04.452 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:42:04.930 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:42:05.408 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:42:05.886 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:42:06.364 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:42:06.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:06.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:06.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:06.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:06.445 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:06.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:06.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:06.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:06.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:06.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:06.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:06.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:06.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:06.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:06.514 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:06.514 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:42:06.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:06.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:06.843 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:42:07.321 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:42:07.800 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:42:08.278 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:42:08.756 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:42:09.234 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:42:09.712 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:42:10.190 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:42:10.669 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:42:10.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:10.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:10.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:10.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:10.893 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:10.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:10.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:10.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:10.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:10.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:10.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:10.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:10.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:42:10.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:10.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:10.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:10.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:10.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:11.147 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:42:11.625 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:42:12.103 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:42:12.581 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:42:13.059 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:42:13.536 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:42:14.014 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:42:14.493 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:42:14.971 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:42:15.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:15.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:15.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:15.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:15.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:15.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:15.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:15.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:15.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:15.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:15.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:15.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:15.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:15.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:15.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:15.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:15.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:15.448 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:42:15.926 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:42:16.404 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:42:16.882 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:42:17.361 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:42:17.839 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:42:18.317 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:42:18.796 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:42:19.273 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:42:19.751 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:42:19.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:19.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:19.790 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:19.790 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:19.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:19.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:19.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:19.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:19.809 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:19.809 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:19.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:19.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:19.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:42:19.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:19.859 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:19.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:19.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:19.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:20.228 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:42:20.706 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:42:21.184 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:42:21.662 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:42:22.139 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:42:22.618 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:42:23.096 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:42:23.573 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:42:24.050 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:42:24.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:24.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:24.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:24.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:24.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:24.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:24.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:24.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:24.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:24.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:24.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:24.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:24.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:24.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:24.183 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:42:24.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:24.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:24.527 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:42:25.006 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:42:25.484 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:42:25.963 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:42:26.442 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:42:26.921 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:42:27.400 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:42:27.878 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:42:28.357 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 04:42:28.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:28.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:28.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:28.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:28.504 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:28.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:28.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:28.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:28.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:28.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:28.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:28.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:28.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:28.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:28.574 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:28.574 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:42:28.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:28.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:28.835 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 04:42:29.314 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 04:42:29.793 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 04:42:30.272 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 04:42:30.751 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 04:42:31.230 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 04:42:31.708 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 04:42:32.187 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 04:42:32.666 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 04:42:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:32.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:32.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:32.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:32.957 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:32.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:32.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:32.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:32.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:32.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:32.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:32.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:32.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:33.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:33.026 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:33.026 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:42:33.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:33.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:33.144 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 04:42:33.622 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 04:42:34.100 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 04:42:34.578 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 04:42:35.056 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 04:42:35.535 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 04:42:36.013 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 04:42:36.491 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 04:42:36.969 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 04:42:37.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:37.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:37.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:37.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:37.128 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:37.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:37.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:37.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:37.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:37.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:37.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:37.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:37.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:37.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:37.213 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:37.213 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:42:37.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:37.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:37.447 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 04:42:37.926 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 04:42:38.404 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 04:42:38.882 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 04:42:39.361 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 04:42:39.839 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 04:42:40.317 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 04:42:40.796 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 04:42:41.274 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 04:42:41.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:41.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:41.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:41.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:41.452 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:41.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:41.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:41.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:41.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:41.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:41.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:41.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:41.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:41.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:41.545 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:41.546 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:42:41.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:41.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:41.750 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 04:42:42.228 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 04:42:42.707 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 04:42:43.185 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 04:42:43.663 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 04:42:44.141 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 04:42:44.620 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 04:42:45.098 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 04:42:45.576 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 04:42:45.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:45.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:45.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:45.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:45.773 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:45.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:45.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:45.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:45.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:45.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:45.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:45.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:45.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:45.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:45.846 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:45.846 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:42:45.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:45.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:46.054 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 04:42:46.532 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 04:42:47.010 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 04:42:47.489 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 04:42:47.967 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 04:42:48.445 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 04:42:48.923 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 04:42:49.401 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 04:42:49.879 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 04:42:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:50.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:50.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:50.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:50.095 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:50.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:50.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:50.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:50.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:50.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:50.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:50.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:50.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:50.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:50.164 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:50.164 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:42:50.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:50.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:50.357 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 04:42:50.836 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 04:42:51.314 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 04:42:51.792 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 04:42:52.270 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 04:42:52.750 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 04:42:53.227 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 04:42:53.704 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 04:42:54.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:54.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:54.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:54.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:54.098 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:54.117 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:54.117 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:54.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:54.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:54.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:54.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:54.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:54.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:54.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:54.178 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:54.178 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:42:54.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:54.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:54.181 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 04:42:54.657 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 04:42:55.135 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 04:42:55.612 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 04:42:56.089 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 04:42:56.567 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 04:42:57.045 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 04:42:57.524 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 04:42:58.002 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 04:42:58.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:58.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:58.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:58.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:58.416 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:42:58.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:42:58.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:42:58.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:42:58.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:58.458 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:42:58.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:42:58.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:42:58.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:42:58.479 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 04:42:58.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:42:58.490 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:42:58.490 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:42:58.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:58.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:42:58.955 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 04:42:59.433 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 04:42:59.912 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 04:43:00.390 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 04:43:00.868 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 04:43:01.347 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-19 04:43:01.825 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-19 04:43:02.303 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-19 04:43:02.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:02.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:02.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:02.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:02.735 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:43:02.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:02.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:02.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:02.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:02.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:02.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:02.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:02.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:02.781 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-19 04:43:02.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:02.806 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:43:02.806 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:43:02.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:02.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:03.260 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-19 04:43:03.739 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-19 04:43:04.217 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-19 04:43:04.696 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-19 04:43:05.173 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-19 04:43:05.651 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-19 04:43:06.129 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-19 04:43:06.608 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-19 04:43:07.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:07.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:07.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:07.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:07.058 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:43:07.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:43:07.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:43:07.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:43:07.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:43:07.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:43:07.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:43:07.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:43:07.068 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:43:07.068 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:43:07.068 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:43:07.068 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:43:12.071 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:43:12.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:43:12.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:43:12.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:43:12.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:43:12.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:43:12.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:43:12.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:43:12.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:12.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:43:12.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:43:12.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:43:12.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:43:12.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:43:12.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:12.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:43:12.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:43:12.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:43:12.092 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:43:12.094 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:43:12.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:43:12.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:43:12.095 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:12.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:43:12.095 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:43:12.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:43:12.095 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:43:12.097 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:43:12.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:43:12.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:43:12.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:12.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:43:12.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:43:12.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:43:12.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:43:12.101 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:43:12.101 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:43:12.101 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:12.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:43:12.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:43:12.103 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:12.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:43:17.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:43:17.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:43:17.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:43:17.110 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:43:17.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:43:17.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:43:17.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:43:17.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:17.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:43:17.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:43:17.122 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:43:17.122 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:43:17.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:43:17.122 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:17.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:43:17.123 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:43:17.123 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:43:17.124 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:43:17.125 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:43:17.125 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:43:17.125 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:43:17.125 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:17.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:43:17.126 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:43:17.126 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:43:17.126 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:43:17.128 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:43:17.128 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:43:17.128 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:43:17.128 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:43:17.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:43:17.128 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:43:17.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:43:17.129 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:43:17.131 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:43:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:43:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:43:17.132 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:43:17.132 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:43:17.132 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:17.137 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:43:17.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:43:17.659 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:43:17.661 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:43:17.663 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:43:17.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:17.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:17.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:17.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:17.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:17.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:17.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:17.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:17.694 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:17.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:17.714 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:17.714 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:17.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:17.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:18.091 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:43:18.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:43:18.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:43:18.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:43:18.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:43:18.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:43:19.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:43:19.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:43:19.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:43:19.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:43:19.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:43:19.526 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:43:20.004 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:43:20.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:43:20.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:43:20.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:43:20.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:43:20.481 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:43:20.959 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:43:21.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:43:21.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:43:21.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:43:21.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:43:21.438 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:43:21.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:21.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:21.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:21.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:21.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:21.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:21.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:21.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:21.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:21.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:21.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:21.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:21.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:21.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:21.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:21.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:21.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:21.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:43:22.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:43:22.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:43:22.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:43:22.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:43:22.393 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:43:22.871 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:43:23.348 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:43:23.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:43:24.304 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:43:24.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:43:25.259 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:43:25.737 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:43:26.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:26.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:26.094 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:26.094 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:26.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:26.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:26.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:26.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:26.117 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:26.117 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:26.117 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:26.117 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:26.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:26.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:26.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:26.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:26.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:26.215 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:43:26.692 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:43:27.170 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:43:27.647 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:43:28.125 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:43:28.602 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:43:29.080 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:43:29.557 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:43:30.035 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:43:30.513 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:43:30.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:30.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:30.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:30.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:30.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:30.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:30.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:30.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:30.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:30.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:30.631 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:30.631 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:30.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:30.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:30.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:30.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:30.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:30.990 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:43:31.468 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:43:31.946 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:43:32.423 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:43:32.901 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:43:33.378 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:43:33.856 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:43:34.334 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:43:34.811 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:43:34.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:34.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:34.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:34.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:34.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:34.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:34.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:34.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:34.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:34.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:34.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:34.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:34.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:35.005 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:35.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:35.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:35.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:35.288 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:43:35.766 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:43:36.244 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:43:36.722 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:43:37.200 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:43:37.678 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:43:38.156 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:43:38.634 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:43:39.112 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:43:39.590 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:43:39.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:39.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:39.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:39.607 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:39.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:39.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:39.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:39.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:39.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:39.626 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:39.626 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:39.626 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:39.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:39.683 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:43:39.683 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:43:39.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:39.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:40.068 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:43:40.546 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:43:41.024 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:43:41.503 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:43:41.980 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:43:42.458 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:43:42.937 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:43:43.415 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:43:43.893 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:43:44.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:44.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:44.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:44.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:44.059 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:43:44.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:44.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:44.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:44.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:44.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:44.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:44.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:44.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:44.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:44.137 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:43:44.137 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:43:44.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:44.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:44.371 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:43:44.849 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:43:45.328 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:43:45.806 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:43:46.285 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:43:46.763 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:43:47.241 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:43:47.720 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:43:48.198 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:43:48.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:48.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:48.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:48.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:48.506 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:43:48.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:48.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:48.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:48.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:48.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:48.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:48.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:48.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:48.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:48.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:48.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:48.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:48.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:48.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:48.676 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:43:49.154 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:43:49.633 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:43:50.111 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:43:50.589 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:43:51.067 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:43:51.545 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:43:52.023 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:43:52.502 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:43:52.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:52.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:52.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:52.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:52.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:52.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:52.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:52.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:52.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:52.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:52.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:52.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:52.980 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:43:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:53.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:53.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:53.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:53.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:53.456 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:43:53.934 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:43:54.413 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:43:54.891 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:43:55.369 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:43:55.847 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:43:56.326 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:43:56.804 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:43:57.282 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:43:57.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:57.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:57.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:57.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:57.399 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=8595 tn=1 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:43:57.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:43:57.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:43:57.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:43:57.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:57.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:57.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:57.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:43:57.419 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:43:57.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:43:57.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:43:57.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:43:57.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:43:57.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:57.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:43:57.759 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:43:58.238 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:43:58.716 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:43:59.194 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:43:59.672 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:44:00.150 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:44:00.628 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:44:01.106 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:44:01.584 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:44:02.062 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:44:02.540 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:44:02.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:02.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:02.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:02.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:02.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:02.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:02.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:02.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:02.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:02.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:02.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:02.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:02.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:02.766 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:02.766 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:44:02.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:02.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:03.017 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:44:03.496 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:44:03.974 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:44:04.453 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:44:04.931 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:44:05.410 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 04:44:05.889 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 04:44:06.367 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 04:44:06.846 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 04:44:07.324 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 04:44:07.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:07.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:07.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:07.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:07.581 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:07.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:07.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:07.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:07.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:07.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:07.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:07.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:07.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:07.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:07.658 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:07.658 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:44:07.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:07.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:07.803 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 04:44:08.282 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 04:44:08.760 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 04:44:09.237 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 04:44:09.715 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 04:44:10.194 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 04:44:10.673 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 04:44:11.150 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 04:44:11.629 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 04:44:12.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:12.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:12.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:12.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:12.029 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:12.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:12.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:12.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:12.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:12.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:12.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:12.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:12.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:12.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:12.107 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 04:44:12.110 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:12.110 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:12.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:12.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:12.585 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 04:44:13.064 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 04:44:13.542 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 04:44:14.019 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 04:44:14.498 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 04:44:14.976 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 04:44:15.473 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 04:44:15.951 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 04:44:16.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:16.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:16.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:16.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:16.224 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:16.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:16.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:16.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:16.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:16.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:16.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:16.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:16.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:16.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:16.294 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:16.294 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:16.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:16.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:16.429 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 04:44:16.907 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 04:44:17.385 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 04:44:17.863 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 04:44:18.341 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 04:44:18.820 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 04:44:19.298 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 04:44:19.776 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 04:44:20.254 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 04:44:20.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:20.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:20.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:20.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:20.563 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:20.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:20.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:20.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:20.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:20.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:20.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:20.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:20.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:20.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:20.636 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:20.636 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:20.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:20.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 04:44:21.211 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 04:44:21.689 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 04:44:22.166 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 04:44:22.644 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 04:44:23.122 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 04:44:23.600 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 04:44:24.078 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 04:44:24.556 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 04:44:24.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:24.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:24.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:24.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:24.887 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:24.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:24.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:24.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:24.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:24.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:24.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:24.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:24.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:24.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:24.960 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:24.960 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:24.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:24.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:25.034 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 04:44:25.513 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 04:44:25.991 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 04:44:26.468 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 04:44:26.947 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 04:44:27.425 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 04:44:27.903 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 04:44:28.381 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 04:44:28.859 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 04:44:29.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:29.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:29.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:29.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:29.206 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:29.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:29.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:29.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:29.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:29.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:29.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:29.255 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:29.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:29.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:29.306 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:29.306 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:29.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:29.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:29.337 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 04:44:29.815 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 04:44:30.293 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 04:44:30.771 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 04:44:31.249 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 04:44:31.727 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 04:44:32.205 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 04:44:32.683 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 04:44:33.161 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 04:44:33.639 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 04:44:33.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:33.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:33.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:33.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:33.689 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:33.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:33.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:33.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:33.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:33.710 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:33.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:33.710 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:33.710 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:33.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:33.762 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:33.762 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:33.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:33.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:34.117 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 04:44:34.595 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 04:44:35.073 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 04:44:35.552 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 04:44:36.030 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 04:44:36.509 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 04:44:36.987 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 04:44:37.465 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 04:44:37.944 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 04:44:38.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:38.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:38.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:38.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:38.008 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:38.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:38.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:38.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:38.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:38.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:38.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:38.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:38.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:38.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:38.079 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:38.079 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:38.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:38.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:38.422 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-19 04:44:38.899 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-19 04:44:39.378 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-19 04:44:39.857 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-19 04:44:40.335 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-19 04:44:40.813 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-19 04:44:41.291 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-19 04:44:41.769 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-19 04:44:42.248 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-19 04:44:42.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:42.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:42.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:42.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:42.333 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:42.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:42.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:42.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:42.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:42.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:42.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:42.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:42.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:42.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:42.402 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:44:42.402 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:44:42.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:42.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:42.726 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-19 04:44:43.204 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-19 04:44:43.682 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-19 04:44:44.161 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-19 04:44:44.639 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-19 04:44:45.117 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-19 04:44:45.595 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-19 04:44:46.074 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-19 04:44:46.552 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-19 04:44:46.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:46.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:46.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:46.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:46.655 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:44:46.655 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=19098 tn=3 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:44:46.656 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=19098 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:44:46.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:44:46.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:44:46.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:44:46.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:44:46.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:44:46.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:44:46.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:44:46.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:44:46.661 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:44:46.661 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:44:46.661 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:44:51.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:44:51.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:44:51.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:44:51.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:44:51.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:44:51.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:44:51.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:44:51.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:44:51.677 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:51.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:44:51.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:44:51.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:44:51.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:44:51.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:44:51.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:51.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:44:51.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:44:51.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:44:51.682 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:44:51.683 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:44:51.684 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:44:51.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:44:51.684 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:51.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:44:51.684 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:44:51.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:44:51.684 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:44:51.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:44:51.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:44:51.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:44:51.686 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:51.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:44:51.686 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:44:51.686 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:44:51.686 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:44:51.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:44:51.689 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:44:51.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:51.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:44:51.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:44:51.691 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:51.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:44:56.695 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:44:56.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:44:56.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:44:56.699 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:44:56.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:44:56.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:44:56.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:44:56.708 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:56.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:44:56.708 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:44:56.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:44:56.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:44:56.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:44:56.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:56.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:44:56.712 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:44:56.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:44:56.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:44:56.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:44:56.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:44:56.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:44:56.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:56.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:44:56.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:44:56.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:44:56.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:44:56.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:44:56.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:44:56.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:44:56.717 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:44:56.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:44:56.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:44:56.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:44:56.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:44:56.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:44:56.720 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:44:56.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:44:56.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:44:56.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:44:56.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:44:57.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:44:57.256 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:44:57.258 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:44:57.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:57.260 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:44:57.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:57.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:57.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:57.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:57.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:57.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:57.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:57.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:57.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:57.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:57.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:57.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:57.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:57.684 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:44:57.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:44:57.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:44:57.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:44:57.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:44:58.161 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:44:58.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:58.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:58.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:58.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:58.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:58.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:58.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:58.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:58.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:58.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:58.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:58.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:58.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:58.441 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:58.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:58.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:58.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:58.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:44:58.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:44:58.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:44:58.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:44:58.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:44:59.116 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:44:59.594 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:44:59.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:44:59.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:44:59.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:44:59.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:44:59.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:59.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:59.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:59.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:59.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:44:59.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:44:59.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:44:59.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:59.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:59.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:59.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:44:59.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:44:59.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:44:59.885 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:44:59.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:44:59.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:44:59.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:00.071 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:45:00.549 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:45:00.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:00.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:00.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:00.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:00.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:00.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:00.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:00.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:00.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:01.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:01.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:01.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:01.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:01.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:01.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:01.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:01.026 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:45:01.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:01.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:01.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:01.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:01.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:01.504 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:45:01.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:01.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:01.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:01.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:01.981 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:45:02.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:02.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:02.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:02.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:02.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:02.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:02.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:02.459 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:45:02.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:02.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:02.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:02.461 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:02.461 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:02.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:02.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:02.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:02.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:02.936 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:45:03.415 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:45:03.893 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:45:04.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:04.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:04.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:04.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:04.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:04.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:04.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:04.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:04.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:04.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:04.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:04.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:04.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:04.094 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:04.094 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:45:04.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:04.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:04.370 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:45:04.848 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:45:05.327 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:45:05.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:05.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:05.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:05.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:05.546 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:05.546 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1885 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:45:05.546 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1885 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:45:05.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:05.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:05.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:05.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:05.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:05.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:05.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:05.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:05.618 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:05.618 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:45:05.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:05.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:05.806 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:45:06.284 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:45:06.762 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:45:07.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:07.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:07.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:07.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:07.070 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:07.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:07.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:07.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:07.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:07.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:07.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:07.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:07.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:07.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:07.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:07.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:07.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:07.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:07.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:07.240 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:45:07.718 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:45:08.196 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:45:08.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:08.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:08.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:08.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:08.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:08.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:08.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:08.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:08.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:08.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:08.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:08.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:08.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:08.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:08.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:08.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:08.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:08.673 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:45:09.152 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:45:09.630 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:45:10.107 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:45:10.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:10.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:10.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:10.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:10.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:10.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:10.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:10.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:10.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:10.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:10.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:10.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:10.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:10.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:10.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:10.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:10.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:10.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:10.584 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:45:11.062 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:45:11.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:11.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:11.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:11.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:11.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:11.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:11.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:11.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:11.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:11.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:11.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:11.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:11.540 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:45:11.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:11.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:11.595 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:45:11.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:11.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:12.018 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:45:12.496 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:45:12.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:12.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:12.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:12.975 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:45:12.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:12.975 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:12.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:12.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:12.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:12.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:12.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:12.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:12.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:12.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:13.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:13.043 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:13.044 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:45:13.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:13.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:13.452 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:45:13.931 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:45:14.410 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:45:14.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:14.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:14.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:14.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:14.506 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:14.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:14.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:14.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:14.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:14.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:14.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:14.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:14.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:14.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:14.579 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:14.580 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:14.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:14.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:14.888 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:45:15.366 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:45:15.845 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:45:16.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:16.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:16.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:16.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:16.004 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:16.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:16.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:16.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:16.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:16.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:16.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:16.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:16.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:16.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:16.084 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:16.084 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:16.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:16.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:16.323 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:45:16.802 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:45:17.280 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:45:17.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:17.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:17.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:17.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:17.458 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:17.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:17.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:17.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:17.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:17.470 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:17.470 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:17.470 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:17.470 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:17.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:17.527 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:17.527 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:17.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:17.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:17.758 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:45:18.236 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:45:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:45:18.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:18.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:18.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:18.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:18.911 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:18.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:18.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:18.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:18.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:18.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:18.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:18.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:18.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:18.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:18.982 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:18.982 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:18.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:18.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:19.192 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:45:19.670 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:45:20.149 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:45:20.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:20.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:20.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:20.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:20.363 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:20.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:20.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:20.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:20.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:20.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:20.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:20.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:20.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:20.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:20.423 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:20.423 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:20.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:20.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:45:21.105 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:45:21.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:21.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:21.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:21.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:21.500 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:21.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:21.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:21.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:21.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:21.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:21.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:21.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:21.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:21.579 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:21.579 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:21.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:21.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:21.583 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:45:22.062 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:45:22.540 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:45:22.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:22.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:22.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:22.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:22.953 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:22.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:22.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:22.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:22.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:22.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:22.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:22.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:22.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:23.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:23.019 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:45:23.021 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:23.021 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:23.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:23.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:23.496 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:45:23.974 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:45:24.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:24.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:24.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:24.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:24.406 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:24.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:24.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:24.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:24.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:24.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:24.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:24.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:24.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:24.452 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:45:24.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:24.478 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:24.478 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:24.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:24.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:24.930 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:45:25.408 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:45:25.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:25.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:25.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:25.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:25.858 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:25.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:25.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:25.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:25.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:25.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:45:25.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:45:25.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:45:25.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:45:25.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:45:25.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:45:25.864 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:45:30.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:45:30.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:45:30.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:45:30.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:45:30.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:45:30.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:45:30.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:45:30.888 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:45:30.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:45:30.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:45:30.889 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:45:30.894 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:45:30.894 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:45:30.895 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:45:30.895 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:45:30.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:45:30.896 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:45:30.896 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:45:30.896 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:45:30.898 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:45:30.898 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:45:30.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:45:30.898 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:45:30.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:45:30.898 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:45:30.898 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:45:30.898 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:45:30.900 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:45:30.901 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:45:30.901 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:45:30.901 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:45:30.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:45:30.901 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:45:30.901 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:45:30.901 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:45:30.905 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:45:30.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:45:30.906 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:45:30.906 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:45:30.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:45:30.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:45:30.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:45:30.911 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:45:31.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:45:31.442 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:45:31.444 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:45:31.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:31.446 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:45:31.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:31.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:31.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:31.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:31.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:31.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:31.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:31.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:31.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:31.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:31.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:31.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:31.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:31.871 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:45:31.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:31.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:31.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:31.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:32.349 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:45:32.827 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:45:32.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:32.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:32.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:32.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:33.305 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:45:33.783 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:45:33.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:33.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:33.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:34.261 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:45:34.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:34.739 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:45:34.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:34.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:34.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:34.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:35.217 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:45:35.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:35.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:35.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:35.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:35.293 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:45:35.293 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:45:35.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:35.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:35.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:35.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:35.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:35.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:35.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:35.312 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:35.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:35.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:35.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:35.695 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:45:35.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:45:35.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:45:35.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:45:35.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:45:36.173 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:45:36.651 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:45:37.129 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:45:37.607 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:45:38.085 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:45:38.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:38.562 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:45:39.040 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:45:39.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:39.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:39.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:39.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:39.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:39.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:39.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:39.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:39.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:39.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:39.211 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:39.211 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:39.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:39.261 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:39.261 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:45:39.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:39.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:39.517 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:45:39.995 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:45:40.474 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:45:40.952 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:45:41.431 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:45:41.910 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:45:42.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:42.402 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:45:42.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:42.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:42.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:42.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:42.857 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:42.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:42.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:42.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:42.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:42.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:42.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:42.874 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:42.874 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:45:42.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:42.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:42.880 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:45:43.359 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:45:43.837 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:45:44.315 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:45:44.794 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:45:45.272 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:45:45.751 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:45:45.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:46.229 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:45:46.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:46.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:46.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:46.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:46.278 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:46.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:46.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:46.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:46.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:46.301 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:46.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:46.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:46.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:46.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:46.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:46.348 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:46.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:46.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:46.708 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:45:47.185 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:45:47.663 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:45:48.141 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:45:48.618 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:45:49.096 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:45:49.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:49.574 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:45:50.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:50.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:50.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:50.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:50.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:50.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:50.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:50.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:50.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:50.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:50.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:50.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:50.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:50.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:50.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:50.052 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:45:50.529 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:45:51.007 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:45:51.485 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:45:51.962 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:45:52.440 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:45:52.918 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:45:53.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:53.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:53.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:53.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:53.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:53.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:53.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:53.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:53.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:53.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:53.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:53.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:53.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:53.395 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:45:53.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:53.419 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:53.419 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:53.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:53.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:53.873 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:45:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:45:54.830 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:45:55.308 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:45:55.787 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:45:56.266 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:45:56.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:56.744 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:45:57.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:45:57.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:57.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:45:57.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:45:57.139 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:45:57.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:45:57.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:57.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:45:57.141 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:45:57.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:45:57.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:45:57.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:45:57.166 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:45:57.166 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:45:57.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:57.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:45:57.223 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:45:57.701 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:45:58.179 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:45:58.658 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:45:59.137 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:45:59.614 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:46:00.093 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:46:00.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:00.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:00.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:00.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:00.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:00.487 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:00.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:00.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:00.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:00.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:46:00.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:46:00.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:46:00.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:46:00.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:46:00.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:46:00.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:46:00.502 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:46:00.502 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:00.502 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:00.502 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:00.502 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:05.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:46:05.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:46:05.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:46:05.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:46:05.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:46:05.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:46:05.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:46:05.517 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:46:05.517 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:05.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:46:05.518 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:46:05.523 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:46:05.523 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:46:05.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:46:05.524 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:05.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:46:05.525 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:46:05.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:46:05.525 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:46:05.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:46:05.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:46:05.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:46:05.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:05.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:46:05.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:46:05.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:46:05.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:46:05.530 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:46:05.530 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:46:05.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:46:05.530 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:05.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:46:05.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:46:05.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:46:05.531 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:46:05.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:46:05.534 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:46:05.534 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:46:05.534 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:05.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:05.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:05.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:05.539 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:46:06.022 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:46:06.069 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:46:06.071 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:46:06.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:06.074 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:46:06.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:06.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:06.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:06.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:06.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:06.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:06.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:06.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:06.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:06.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:06.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:06.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:06.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:06.500 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:46:06.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:06.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:06.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:06.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:46:06.977 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:46:07.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:46:07.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:07.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:46:07.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:07.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:07.933 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:46:08.411 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:46:08.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:08.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:46:08.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:08.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:08.888 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:46:09.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:09.367 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:46:09.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:09.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:46:09.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:09.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:09.845 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:46:09.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:09.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:09.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:09.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:09.923 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:09.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:09.924 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:09.924 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:09.924 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:09.924 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:09.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:09.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:09.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:09.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:09.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:10.324 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:46:10.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:10.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:10.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:46:10.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:10.801 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:46:11.279 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:46:11.758 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:46:12.236 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:46:12.714 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:46:12.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:13.192 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:46:13.670 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:46:13.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:13.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:13.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:13.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:13.819 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1768 tn=2 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:13.819 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1768 tn=3 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:13.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:13.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:13.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:13.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:13.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:13.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:13.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:13.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:13.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:13.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:13.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:14.148 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:46:14.626 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:46:15.103 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:46:15.582 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:46:16.059 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:46:16.537 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:46:16.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:17.015 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:46:17.493 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:46:17.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:17.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:17.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:17.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:17.717 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=2600 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:17.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:17.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:17.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:17.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:17.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:17.718 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:17.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:17.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:17.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:17.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:17.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:17.971 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:46:18.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:18.449 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:46:18.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:18.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:18.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:18.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:18.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:18.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:18.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:18.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:18.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:18.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:18.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:18.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:18.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:18.752 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:18.752 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:46:18.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:18.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:18.927 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:46:19.405 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:46:19.885 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:46:20.365 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:46:20.843 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:46:21.322 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:46:21.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:21.801 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:46:22.278 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:46:22.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:22.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:22.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:22.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:22.355 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:22.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:22.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:22.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:22.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:22.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:22.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:22.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:22.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:22.373 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:46:22.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:22.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:22.756 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:46:23.235 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:46:23.713 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:46:24.192 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:46:24.671 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:46:25.150 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:46:25.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:25.629 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:46:26.107 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:46:26.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:26.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:26.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:26.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:26.259 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:26.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:26.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:26.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:26.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:26.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:26.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:26.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:26.295 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:26.295 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:46:26.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:26.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:26.586 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:46:27.066 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:46:27.545 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:46:28.017 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:46:28.496 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:46:28.974 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:46:29.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:29.453 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:46:29.931 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:46:30.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:30.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:30.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:30.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:30.156 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:30.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:30.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:30.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:30.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:30.157 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:30.157 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:30.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:30.170 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:30.170 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:46:30.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:30.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:30.410 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:46:30.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:30.888 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:46:31.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:31.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:31.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:31.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:31.131 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:31.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:31.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:31.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:31.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:31.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:31.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:31.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:31.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:31.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:31.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:31.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:31.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:31.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:31.366 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:46:31.844 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:46:32.322 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:46:32.800 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:46:33.278 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:46:33.756 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:46:34.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:34.234 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:46:34.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:34.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:34.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:34.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:34.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:34.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:34.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:34.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:34.676 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:34.676 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:34.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:34.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:34.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:34.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:34.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:34.712 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:46:35.190 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:46:35.667 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:46:36.145 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:46:36.623 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:46:37.101 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:46:37.579 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:46:37.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:38.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:38.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:38.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:38.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:38.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:38.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:38.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:38.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:38.021 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:38.021 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:38.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:38.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:38.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:38.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:38.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:38.056 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:46:38.534 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:46:39.012 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:46:39.490 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:46:39.968 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:46:40.446 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:46:40.924 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:46:41.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:41.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:41.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:41.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:41.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:41.364 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=7645 tn=3 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:41.364 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=7645 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:41.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:41.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:41.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:41.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:41.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:41.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:41.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:41.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:41.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:41.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:41.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:41.401 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:46:41.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:41.879 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:46:42.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:42.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:42.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:42.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:42.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:42.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:42.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:42.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:42.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:42.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:42.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:42.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:42.357 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:46:42.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:42.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:42.380 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:46:42.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:42.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:42.835 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:46:43.313 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:46:43.791 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:46:44.270 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:46:44.749 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:46:45.226 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:46:45.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:45.705 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:46:46.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:46.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:46.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:46.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:46.099 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:46.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:46.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:46.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:46.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:46.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:46.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:46.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:46.127 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:46.127 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:46:46.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:46.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:46.183 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:46:46.662 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:46:47.140 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:46:47.618 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:46:48.096 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:46:48.574 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:46:49.052 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:46:49.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:49.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:49.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:49.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:49.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:49.448 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:49.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:49.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:49.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:49.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:49.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:49.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:49.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:49.475 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:49.475 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:46:49.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:49.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:49.531 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:46:50.009 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:46:50.488 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:46:50.966 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:46:51.444 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:46:51.922 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:46:52.400 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:46:52.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:52.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:52.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:52.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:52.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:52.794 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:52.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:52.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:52.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:52.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:52.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:52.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:52.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:46:52.821 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:46:52.822 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:46:52.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:52.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:52.878 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:46:53.356 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:46:53.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:53.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:53.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:53.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:53.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:53.751 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:46:53.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:53.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:53.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:53.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:46:53.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:46:53.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:46:53.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:46:53.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:46:53.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:46:53.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:46:53.768 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:46:53.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:53.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:53.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:53.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:53.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:53.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:46:58.766 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:46:58.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:46:58.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:46:58.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:46:58.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:46:58.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:46:58.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:46:58.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:46:58.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:58.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:46:58.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:46:58.787 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:46:58.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:46:58.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:46:58.787 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:58.787 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:46:58.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:46:58.787 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:46:58.787 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:46:58.791 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:46:58.791 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:46:58.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:46:58.791 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:58.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:46:58.791 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:46:58.791 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:46:58.791 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:46:58.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:46:58.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:46:58.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:46:58.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:46:58.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:46:58.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:46:58.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:46:58.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:46:58.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:46:58.797 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:46:58.797 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:46:58.797 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.797 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:46:58.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:46:58.802 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:46:59.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:46:59.322 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:46:59.322 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:46:59.322 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:46:59.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:46:59.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:46:59.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:46:59.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:46:59.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:46:59.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:46:59.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:46:59.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:46:59.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:46:59.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:46:59.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:46:59.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:46:59.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:46:59.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:00.235 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:47:00.709 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:47:00.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:00.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:00.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:00.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:01.184 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:47:01.659 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:47:01.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:01.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:01.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:01.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:02.134 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:47:02.607 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:47:02.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:02.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:02.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:02.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:03.080 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:47:03.556 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:47:03.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:03.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:03.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:03.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:04.031 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:47:04.509 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:47:04.984 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:47:05.457 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:47:05.935 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:47:06.409 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:47:06.887 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:47:07.364 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:47:07.838 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:47:08.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:47:08.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:47:08.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:08.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:08.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:08.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:08.187 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:08.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:08.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:08.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:08.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:47:08.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:47:08.188 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:47:08.188 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:08.188 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:08.188 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:08.189 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:08.189 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:08.189 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:13.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:47:13.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:47:13.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:13.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:13.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:13.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:13.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:13.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:47:13.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:13.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:47:13.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:47:13.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:47:13.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:47:13.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:47:13.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:13.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:13.202 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:47:13.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:47:13.203 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:47:13.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:47:13.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:47:13.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:47:13.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:13.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:13.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:47:13.205 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:47:13.205 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:47:13.207 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:47:13.207 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:47:13.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:47:13.207 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:13.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:13.207 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:47:13.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:47:13.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:47:13.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:47:13.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:47:13.210 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:47:13.210 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:47:13.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:13.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:13.215 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:47:13.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:47:13.733 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:13.734 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:47:13.734 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:47:13.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:47:13.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:47:13.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:47:13.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:47:13.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:47:13.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:47:13.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:47:13.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:47:13.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:47:14.174 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:47:14.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:14.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:14.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:14.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:14.650 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:47:15.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:47:15.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:15.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:15.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:15.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:15.596 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:47:16.070 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:47:16.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:16.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:16.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:16.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:16.544 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:47:17.016 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:47:17.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:17.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:17.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:17.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:17.490 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:47:17.964 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:47:18.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:18.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:18.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:18.437 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:47:18.911 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:47:19.385 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:47:19.860 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:47:20.338 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:47:20.814 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:47:21.290 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:47:21.764 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:47:22.242 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:47:22.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:47:22.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:47:22.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:22.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:22.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:47:22.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:47:22.580 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2012 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:22.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:22.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2012 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2012 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:22.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2013 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:47:27.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:47:27.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:47:27.582 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:27.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:27.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:27.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:27.593 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:27.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:47:27.595 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:27.595 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:47:27.595 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:47:27.600 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:47:27.600 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:47:27.600 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:47:27.600 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:27.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:27.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:47:27.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:47:27.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:47:27.604 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:47:27.604 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:47:27.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:47:27.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:27.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:27.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:47:27.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:47:27.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:47:27.607 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:47:27.607 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:47:27.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:47:27.607 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:27.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:27.607 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:47:27.607 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:47:27.607 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:47:27.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:47:27.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:47:27.611 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:47:27.611 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:47:27.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:27.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:27.616 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:47:28.100 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:47:28.140 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:28.142 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:47:28.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:47:28.144 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:47:28.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:47:28.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:47:28.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:47:28.579 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:47:28.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:28.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:28.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:28.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:29.057 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:47:29.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:47:29.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:47:29.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:47:29.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:47:29.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:47:29.531 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:47:29.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:29.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:29.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:29.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:30.003 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:47:30.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:47:30.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:30.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:30.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:30.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:30.956 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:47:31.433 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:47:31.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:31.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:31.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:31.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:31.910 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:47:32.382 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:47:32.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:32.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:32.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:32.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:32.859 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:47:33.333 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:47:33.811 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:47:34.284 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:47:34.756 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:47:35.230 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:47:35.703 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:47:36.178 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:47:36.650 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:47:37.124 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:47:37.598 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:47:38.074 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:47:38.550 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:47:39.028 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:47:39.506 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:47:39.983 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:47:40.461 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:47:40.940 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:47:41.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:47:41.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:41.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:47:41.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:47:41.021 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:47:46.025 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:47:46.025 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:47:46.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:46.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:46.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:46.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:46.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:46.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:47:46.044 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:46.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:47:46.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:47:46.046 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:47:46.046 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:47:46.046 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:47:46.046 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:46.046 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:46.047 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:47:46.047 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:47:46.047 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:47:46.048 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:47:46.048 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:47:46.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:47:46.048 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:46.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:46.048 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:47:46.048 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:47:46.048 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:47:46.049 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:47:46.049 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:47:46.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:47:46.049 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:47:46.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:47:46.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:46.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:47:46.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:47:46.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:47:46.051 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:47:46.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:47:46.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:47:46.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:47:46.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:47:46.581 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:46.583 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:47:46.584 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:47:46.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:47:46.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:47:46.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:47:46.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:47:46.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:47:46.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:47:46.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:47:46.589 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:47:46.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:47:47.016 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:47:47.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:47.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:47.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:47.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:47.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:47:47.629 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:47.972 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:47:48.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:48.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:48.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:48.176 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:48.449 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:47:48.698 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:48.927 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:47:49.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:49.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:49.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:49.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:49.405 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:47:49.883 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:47:50.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:50.057 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:50.057 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:50.057 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:50.360 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:47:50.720 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:50.838 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:47:51.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:51.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:51.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:51.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:51.227 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:51.316 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:47:51.753 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:51.793 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:47:52.270 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:47:52.283 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:52.748 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:47:53.226 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:47:53.702 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:47:54.180 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:47:54.305 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:47:54.658 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:47:55.135 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:47:55.613 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:47:56.091 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:47:56.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:47:56.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:47:56.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:47:56.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:47:56.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:47:56.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:47:56.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:47:56.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:47:56.320 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:47:56.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:47:56.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:47:56.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:47:56.320 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:48:01.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:01.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:01.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:01.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:01.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:01.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:01.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:01.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:01.335 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:01.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:01.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:48:01.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:48:01.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:48:01.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:01.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:01.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:01.342 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:48:01.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:01.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:48:01.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:48:01.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:48:01.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:01.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:01.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:01.348 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:48:01.348 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:01.348 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:48:01.351 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:48:01.352 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:48:01.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:01.352 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:01.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:01.352 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:48:01.352 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:01.352 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:48:01.357 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:48:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:48:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:48:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:48:01.375 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:48:01.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.377 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:48:01.377 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:48:01.377 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:48:01.377 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:48:01.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.379 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.379 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:01.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:01.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.382 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:48:01.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:01.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:01.865 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:48:01.920 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:48:01.922 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:48:01.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:01.925 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:48:01.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:01.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:01.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:01.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:01.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:01.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:01.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:01.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:01.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:01.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:01.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:01.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:01.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:02.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:02.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:02.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:02.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:02.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:02.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:02.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:02.342 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:48:02.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:02.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:02.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:02.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:02.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:02.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.579 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:02.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:02.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:02.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:48:02.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:02.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:02.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:02.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:02.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:02.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.901 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.901 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:02.901 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:02.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:02.910 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:02.910 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:48:02.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.915 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:02.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:02.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.923 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:02.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:02.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:02.961 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:02.961 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:48:02.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:02.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.968 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:02.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:02.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:02.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:02.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:02.978 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:02.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:02.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:02.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:03.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.054 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.054 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.073 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.073 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.075 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:03.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.147 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:03.147 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:48:03.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.164 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:03.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.178 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:03.193 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:48:03.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.210 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:03.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.242 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:03.242 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:03.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.291 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:48:03.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.356 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:03.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.377 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:03.377 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:03.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:03.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:03.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:03.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:03.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.611 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:03.611 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=480 tn=2 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:03.611 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=480 tn=3 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:03.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.667 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:03.667 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:03.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.768 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:48:03.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:03.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.886 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:03.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:03.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:03.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:03.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:03.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:03.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:03.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:03.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:03.954 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:03.954 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:03.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:03.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.127 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:04.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:04.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:04.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:04.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:04.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:04.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:04.195 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:04.195 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:04.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.245 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:48:04.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:04.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:04.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:04.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:04.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.387 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.388 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:04.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:04.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:04.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:04.408 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:04.408 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:04.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:04.432 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:04.432 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:04.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.642 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:04.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:04.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:04.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:04.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:04.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:04.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:04.664 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:04.664 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:04.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.721 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:48:04.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:04.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.912 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:04.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:04.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:04.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:04.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:04.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:04.934 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:04.934 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:04.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:04.963 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:48:04.963 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:48:04.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:04.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:05.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:05.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:05.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:05.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:05.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:05.156 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:05.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:05.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:05.164 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:48:10.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:10.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:10.169 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:10.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:10.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:10.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:10.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:10.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:10.175 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:10.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:10.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:48:10.177 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:48:10.177 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:48:10.177 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:10.177 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:10.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:10.178 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:48:10.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:10.178 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:48:10.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:48:10.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:48:10.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:10.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:10.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:10.181 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:48:10.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:10.181 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:48:10.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:48:10.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:48:10.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:10.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:10.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:10.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:48:10.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:10.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:48:10.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:48:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:48:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:48:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:48:10.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:48:10.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:48:10.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:48:10.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:48:10.189 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:48:10.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:10.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:10.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:48:10.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:48:10.717 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:48:10.717 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:48:10.720 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:48:10.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:10.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:10.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:10.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:10.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:10.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:10.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:10.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:10.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:10.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 04:48:10.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:10.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:10.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:10.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:10.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:11.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:48:11.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:11.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:11.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:11.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:11.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:48:12.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:48:12.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:12.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:12.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:12.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:12.588 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:48:12.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:12.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:12.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:12.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:12.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:12.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:12.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:12.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:12.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:12.844 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:48:12.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:12.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:12.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:12.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:12.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:12.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:12.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:12.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:17.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:17.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:17.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:17.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:17.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:17.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:17.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:17.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:17.856 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:17.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:17.857 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:48:17.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:48:17.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:48:17.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:17.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:17.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:17.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:48:17.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:17.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:48:17.866 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:48:17.866 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:48:17.866 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:17.866 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:17.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:17.867 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:48:17.867 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:17.867 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:48:17.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:48:17.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:48:17.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:17.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:17.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:17.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:48:17.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:17.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:48:17.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:48:17.877 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:48:17.878 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:48:17.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:48:17.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:17.880 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:17.880 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:17.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:22.883 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:22.883 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:22.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:22.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:22.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:22.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:22.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:22.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:22.897 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:22.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:22.897 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:48:22.901 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:48:22.902 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:48:22.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:22.902 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:22.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:22.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:48:22.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:22.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:48:22.905 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:48:22.906 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:48:22.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:22.906 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:22.906 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:22.906 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:48:22.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:22.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:48:22.909 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:48:22.909 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:48:22.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:22.909 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:22.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:22.909 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:48:22.909 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:22.910 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:48:22.912 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:48:22.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:48:22.912 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:48:22.912 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:48:22.912 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:48:22.912 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:48:22.913 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:48:22.913 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:48:22.913 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:22.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:22.918 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:48:23.400 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:48:23.446 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:48:23.448 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:48:23.450 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:48:23.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:23.878 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:48:23.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:23.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:23.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:23.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:24.357 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:48:24.835 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:48:24.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:24.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:24.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:24.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:25.313 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:48:25.791 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:48:25.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:25.918 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:25.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:25.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:26.270 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:48:26.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:48:26.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:26.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:26.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:26.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:27.232 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:48:27.713 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:48:27.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:27.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:27.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:27.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:28.191 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:48:28.670 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:48:28.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:28.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:28.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:28.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:28.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:28.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:28.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:28.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:28.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:28.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:28.933 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:48:33.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:33.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:33.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:33.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:33.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:33.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:33.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:33.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:33.946 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:33.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:33.947 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:48:33.948 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:48:33.948 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:48:33.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:33.949 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:33.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:33.949 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:48:33.949 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:33.949 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:48:33.951 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:48:33.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:48:33.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:33.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:33.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:33.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:48:33.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:33.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:48:33.953 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:48:33.953 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:48:33.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:33.954 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:33.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:33.954 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:48:33.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:33.954 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.958 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:48:33.958 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:48:33.958 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:33.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:33.963 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:48:34.447 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:48:34.491 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:48:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:34.493 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:48:34.495 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:48:34.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:48:34.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:34.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:34.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:34.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:35.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:48:35.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:48:35.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:35.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:35.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:35.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:36.359 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:48:36.840 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:48:36.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:36.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:36.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:36.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:37.318 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:48:37.797 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:48:37.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:37.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:37.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:37.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:38.275 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:48:38.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:48:38.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:38.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:38.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:38.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:39.230 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:48:39.504 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:39.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:39.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:39.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:39.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:39.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:39.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:39.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:39.505 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:48:39.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:39.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:39.505 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1183 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:39.505 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1183 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:39.505 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1183 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:39.505 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1183 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:39.505 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1183 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:39.505 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1183 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:48:44.508 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:44.508 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:44.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:44.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:44.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:44.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:44.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:44.520 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:44.520 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:44.520 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:44.520 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:48:44.523 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:48:44.524 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:48:44.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:44.524 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:44.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:44.525 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:48:44.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:44.525 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:48:44.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:48:44.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:48:44.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:44.527 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:44.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:44.527 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:48:44.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:44.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:48:44.529 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:48:44.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:48:44.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:44.530 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:44.530 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:44.530 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:48:44.530 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:44.530 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:48:44.533 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:48:44.533 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.533 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:48:44.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:44.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:44.535 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:44.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:49.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:48:49.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:48:49.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:49.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:49.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:49.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:49.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:48:49.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:49.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:49.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:48:49.551 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:48:49.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:48:49.554 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:48:49.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:49.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:49.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:48:49.555 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:48:49.555 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:48:49.555 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:48:49.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:48:49.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:48:49.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:49.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:49.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:48:49.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:48:49.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:48:49.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:48:49.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:48:49.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:48:49.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:49.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:48:49.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:48:49.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:48:49.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:48:49.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:48:49.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:48:49.562 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:48:49.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:48:49.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:48:49.567 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:48:50.051 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:48:50.085 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:48:50.086 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:48:50.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:48:50.088 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:48:50.091 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:48:50.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:48:50.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:48:50.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:48:50.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:50.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:50.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:50.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:51.007 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:48:51.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:48:51.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:48:51.093 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:48:51.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:48:51.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:48:51.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:48:51.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:51.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:51.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:51.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:51.956 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:48:52.433 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:48:52.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:52.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:52.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:52.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:52.909 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:48:53.386 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:48:53.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:53.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:53.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:53.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:53.860 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:48:54.339 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:48:54.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:48:54.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:48:54.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:48:54.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:48:54.814 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:48:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:48:55.762 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:48:56.237 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:48:56.712 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:48:57.186 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:48:57.661 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:48:58.138 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:48:58.615 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:48:59.092 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:48:59.567 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:49:00.042 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:49:00.520 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:49:00.998 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:49:01.476 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:49:01.954 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:49:02.431 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:49:02.909 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:49:03.386 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:49:03.864 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:49:04.342 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:49:04.820 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:49:04.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:04.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:04.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:04.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:04.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:04.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:04.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:04.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:04.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:04.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:04.935 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:04.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:04.936 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:49:04.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:04.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:04.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:04.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:04.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:04.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:04.936 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:04.937 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:09.934 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:09.935 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:09.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:09.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:09.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:09.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:09.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:09.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:09.947 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:09.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:09.947 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:49:09.951 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:49:09.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:49:09.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:09.951 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:09.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:09.952 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:49:09.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:09.952 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:49:09.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:49:09.955 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:49:09.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:09.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:09.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:09.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:49:09.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:09.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:49:09.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:49:09.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:49:09.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:09.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:09.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:09.958 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:49:09.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:09.958 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:49:09.960 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:49:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:49:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:49:09.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:49:09.960 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:49:09.961 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:49:09.961 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:09.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:09.966 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:49:10.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:49:10.489 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:10.491 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:10.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:10.493 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:49:10.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:10.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:10.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:49:10.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:10.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:10.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:10.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:49:10.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:49:10.541 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:10.544 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:10.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:10.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:10.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:10.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:10.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:10.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:49:10.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:10.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:10.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:10.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:11.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:49:11.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:49:11.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:11.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:11.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:11.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:12.359 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:49:12.837 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:49:12.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:12.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:12.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:12.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:13.315 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:49:13.793 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:49:13.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:13.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:13.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:13.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:14.271 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:49:14.749 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:49:14.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:14.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:14.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:14.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:15.226 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:49:15.705 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:49:16.183 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:49:16.661 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:49:17.139 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:49:17.617 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:49:18.095 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:49:18.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:18.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:18.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:18.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:18.558 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=1836 tn=1 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:18.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:18.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:18.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:18.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:18.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:18.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:18.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:18.570 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:49:18.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:18.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:18.570 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.570 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.570 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.570 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.570 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.570 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.570 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.571 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.571 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.571 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.571 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.571 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.571 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:18.571 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:23.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:23.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:23.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:23.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:23.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:23.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:23.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:23.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:23.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:23.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:23.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:49:23.586 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:49:23.586 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:49:23.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:23.586 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:23.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:23.586 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:49:23.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:23.587 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:49:23.591 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:49:23.591 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:49:23.591 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:23.591 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:23.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:23.591 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:49:23.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:23.592 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:49:23.596 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:49:23.596 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:49:23.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:23.596 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:23.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:23.596 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:49:23.596 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:23.596 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.602 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:49:23.602 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:49:23.602 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.603 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:23.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:23.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:23.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:23.608 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:49:24.089 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:49:24.138 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:24.140 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:24.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:24.142 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:49:24.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:24.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:24.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:49:24.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:24.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:24.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:24.171 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:49:24.171 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:49:24.181 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:24.185 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:24.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:24.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:24.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:24.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:24.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:24.567 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:49:24.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:24.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:24.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:24.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:25.045 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:49:25.523 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:49:25.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:25.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:25.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:25.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:26.001 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:49:26.479 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:49:26.609 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:26.609 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:26.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:26.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:26.957 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:49:27.435 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:49:27.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:27.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:27.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:27.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:27.913 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:49:28.391 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:49:28.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:28.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:28.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:28.613 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:28.869 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:49:29.347 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:49:29.825 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:49:30.304 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:49:30.782 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:49:31.260 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:49:31.738 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:49:32.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:32.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:32.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:32.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:32.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:32.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:32.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:32.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:32.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:32.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:32.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:32.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:32.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:32.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:32.214 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:49:32.214 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:32.214 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:32.214 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:32.214 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:32.214 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:32.214 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:37.216 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:37.216 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:37.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:37.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:37.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:37.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:37.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:37.237 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:37.237 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:37.238 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:37.238 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:49:37.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:49:37.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:49:37.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:37.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:37.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:37.245 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:49:37.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:37.246 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:49:37.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:49:37.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:49:37.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:37.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:37.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:37.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:49:37.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:37.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:49:37.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:49:37.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:49:37.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:37.252 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:37.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:37.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:49:37.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:37.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:49:37.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:49:37.256 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:49:37.256 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.256 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:37.261 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:49:37.744 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:49:37.785 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:37.788 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:37.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:37.790 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:49:37.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:37.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:37.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:49:37.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:37.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:37.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:37.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:49:37.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:49:37.836 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:37.840 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:37.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:37.849 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:49:37.849 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:49:37.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:37.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:38.222 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:49:38.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:38.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:38.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:38.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:38.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:38.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:38.416 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:49:38.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:38.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:38.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:38.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:38.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:38.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:38.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:38.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:38.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:38.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:38.425 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:49:38.425 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.425 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.426 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:38.427 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:43.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:43.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:43.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:43.426 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:43.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:43.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:43.437 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:43.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:43.439 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:43.439 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:43.439 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:49:43.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:49:43.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:49:43.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:43.444 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:43.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:43.444 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:49:43.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:43.445 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:49:43.448 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:49:43.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:49:43.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:43.449 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:43.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:43.449 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:49:43.449 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:43.449 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:49:43.452 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:49:43.453 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:49:43.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:43.453 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:43.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:43.453 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:49:43.453 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:43.453 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:49:43.459 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:49:43.459 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:43.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:49:43.948 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:49:43.992 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:43.995 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:43.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:43.998 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:49:44.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:44.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:44.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:49:44.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:44.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:44.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:44.034 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:49:44.034 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:49:44.040 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:44.042 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:44.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:44.049 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:49:44.049 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:49:44.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:44.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:44.426 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:49:44.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:44.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:44.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:44.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:44.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:44.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:44.621 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:49:44.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:44.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:44.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:44.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:44.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:44.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:44.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:44.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:44.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:44.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:44.628 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:49:44.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:44.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:44.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:44.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:44.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:44.628 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:49:49.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:49.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:49.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:49.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:49.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:49.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:49.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:49.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:49.640 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:49.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:49.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:49:49.644 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:49:49.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:49:49.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:49.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:49.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:49.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:49:49.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:49.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:49:49.649 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:49:49.649 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:49:49.649 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:49.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:49.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:49.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:49:49.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:49.650 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:49:49.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:49:49.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:49:49.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:49.654 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:49.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:49.654 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:49:49.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:49.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:49:49.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:49:49.660 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:49:49.660 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:49.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:49.665 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:49:50.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:49:50.193 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:50.195 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:50.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:50.198 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:49:50.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:50.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:50.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:49:50.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:50.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:50.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:50.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:49:50.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:49:50.240 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:50.243 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:50.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:50.254 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:49:50.254 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:49:50.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:50.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:50.625 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:49:50.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:50.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:50.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:50.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:50.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:50.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:50.819 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:49:50.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:50.822 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:50.822 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:50.822 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:49:55.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:49:55.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:49:55.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:55.829 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:55.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:55.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:55.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:49:55.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:55.834 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:55.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:49:55.835 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:49:55.837 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:49:55.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:49:55.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:55.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:55.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:49:55.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:49:55.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:49:55.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:49:55.839 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:49:55.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:49:55.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:55.839 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:55.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:49:55.839 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:49:55.839 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:49:55.839 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:49:55.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:49:55.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:49:55.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:55.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:49:55.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:49:55.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:49:55.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:49:55.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:49:55.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:49:55.843 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:49:55.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:49:55.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:49:56.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:49:56.373 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:56.375 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:56.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:56.378 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:49:56.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:49:56.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:49:56.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:49:56.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:56.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:56.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:56.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:49:56.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:49:56.424 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:49:56.427 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:49:56.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:49:56.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:49:56.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:49:56.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:49:56.808 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:49:56.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:56.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:56.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:56.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:57.286 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:49:57.764 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:49:57.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:57.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:57.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:57.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:58.242 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:49:58.720 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:49:58.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:58.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:58.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:58.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:49:59.198 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:49:59.676 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:49:59.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:49:59.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:49:59.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:49:59.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:00.154 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:50:00.631 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:50:00.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:00.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:00.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:01.109 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:50:01.582 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:50:02.061 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:50:02.538 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:50:03.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:50:03.494 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:50:03.971 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:50:04.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:04.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:04.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:04.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:04.449 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:50:04.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:04.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:04.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:50:04.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:04.460 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:04.460 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:04.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:50:04.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:50:04.494 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:04.498 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:04.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:04.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:50:04.509 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:50:04.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:04.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:04.922 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:50:05.401 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:50:05.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:05.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:05.638 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:50:05.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:05.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:05.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:05.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:05.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:05.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:50:05.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:50:05.647 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:50:05.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:05.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:05.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:10.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:50:10.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:50:10.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:10.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:10.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:10.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:10.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:10.661 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:50:10.661 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:10.662 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:50:10.662 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:50:10.666 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:50:10.667 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:50:10.667 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:50:10.667 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:10.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:10.668 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:50:10.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:50:10.668 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:50:10.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:50:10.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:50:10.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:50:10.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:10.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:10.671 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:50:10.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:50:10.671 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:50:10.673 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:50:10.673 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:50:10.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:50:10.673 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:10.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:10.673 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:50:10.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:50:10.673 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:50:10.676 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:50:10.676 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:50:10.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:50:10.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:10.677 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:10.681 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:50:11.165 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:50:11.201 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:11.203 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:11.206 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:50:11.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:11.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:11.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:11.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:50:11.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:11.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:11.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:11.238 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:50:11.238 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:50:11.258 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:11.261 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:11.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:11.270 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:50:11.270 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:50:11.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:11.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:11.643 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:50:11.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:11.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:11.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:11.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:11.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:11.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:11.837 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:50:11.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:11.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:11.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:11.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:11.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:11.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:11.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:11.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:11.844 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:50:11.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:50:11.844 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:50:11.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:11.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:11.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:11.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:11.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:11.844 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:16.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:50:16.844 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:50:16.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:16.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:16.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:16.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:16.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:16.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:50:16.858 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:16.859 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:50:16.859 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:50:16.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:50:16.864 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:50:16.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:50:16.864 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:16.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:16.865 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:50:16.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:50:16.865 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:50:16.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:50:16.868 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:50:16.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:50:16.868 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:16.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:16.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:50:16.869 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:50:16.869 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:50:16.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:50:16.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:50:16.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:50:16.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:16.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:16.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:50:16.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:50:16.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:50:16.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:50:16.874 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:50:16.874 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:16.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:16.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:50:17.363 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:50:17.400 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:17.403 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:17.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:17.405 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:50:17.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:17.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:17.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:50:17.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:17.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:17.441 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:50:17.441 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:50:17.455 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:17.458 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:17.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:17.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:17.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:17.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:17.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:17.840 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:50:17.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:17.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:17.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:17.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:18.318 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:50:18.796 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:50:18.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:18.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:18.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:18.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:19.273 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:50:19.751 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:50:19.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:19.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:19.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:19.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:20.229 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:50:20.707 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:50:20.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:20.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:20.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:20.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:21.185 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:50:21.663 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:50:21.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:21.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:21.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:21.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:22.142 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:50:22.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:50:23.096 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:50:23.573 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:50:24.051 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:50:24.528 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:50:25.006 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:50:25.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:25.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:25.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:25.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:25.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:25.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:25.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:50:25.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:25.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:25.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:25.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:50:25.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:50:25.484 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:50:25.530 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:25.532 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:25.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:25.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:25.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:25.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:25.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:25.960 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:50:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:50:26.916 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:50:27.393 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:50:27.871 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:50:28.360 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:50:28.837 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:50:29.315 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:50:29.793 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:50:30.270 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:50:30.748 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:50:31.226 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:50:31.704 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:50:32.182 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:50:32.660 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:50:33.137 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:50:33.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:33.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:33.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:33.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:33.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:33.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:33.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:50:33.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:33.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:33.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:33.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:50:33.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:50:33.608 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:33.611 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:50:33.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:33.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:33.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:33.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:33.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:34.092 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:50:34.570 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:50:35.048 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:50:35.526 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:50:36.003 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:50:36.480 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:50:36.958 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:50:37.435 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:50:37.907 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:50:38.380 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:50:38.851 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:50:39.328 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:50:39.804 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:50:40.279 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:50:40.753 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:50:41.229 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:50:41.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:41.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:41.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:41.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:41.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:41.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:41.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:50:41.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:41.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:41.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:41.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:50:41.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:50:41.640 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:41.641 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:41.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:41.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:41.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:41.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:41.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:41.704 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:50:42.176 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:50:42.651 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:50:43.125 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:50:43.601 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:50:44.075 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:50:44.550 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:50:45.024 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:50:45.498 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:50:45.974 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:50:46.449 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:50:46.924 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:50:47.401 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:50:47.875 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:50:48.350 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:50:48.823 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:50:49.300 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:50:49.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:49.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:49.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:49.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:49.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:49.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:49.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:49.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:49.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:49.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:50:49.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:50:49.657 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:50:49.657 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:49.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:49.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:49.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:49.657 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:49.657 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:49.657 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:49.657 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:50:54.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:50:54.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:50:54.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:54.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:54.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:54.663 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:54.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:54.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:50:54.672 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:54.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:50:54.672 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:50:54.676 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:50:54.676 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:50:54.676 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:50:54.676 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:54.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:54.677 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:50:54.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:50:54.678 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:50:54.680 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:50:54.680 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:50:54.680 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:50:54.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:54.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:54.681 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:50:54.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:50:54.681 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:50:54.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:50:54.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:50:54.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:50:54.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:50:54.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:54.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:50:54.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:50:54.684 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:50:54.688 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.689 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:50:54.689 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:50:54.689 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:50:54.689 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:50:54.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:50:54.694 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:50:55.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:50:55.224 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:55.226 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:55.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:55.229 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:50:55.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:55.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:55.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:50:55.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:55.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:50:55.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:50:55.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:50:55.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:50:55.310 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:50:55.314 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:50:55.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:50:55.333 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:50:55.333 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:50:55.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:55.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:50:55.645 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:50:55.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:55.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:55.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:55.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:56.123 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:50:56.597 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:50:56.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:56.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:56.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:56.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:56.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:50:56.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:50:56.818 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:50:56.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:50:56.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:50:56.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:50:56.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:50:56.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:50:56.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:50:56.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:50:56.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:50:56.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:50:56.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:50:56.819 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:51:01.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:01.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:01.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:01.821 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:01.821 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:01.821 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:01.825 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:01.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:01.826 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:01.826 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:01.826 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:51:01.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:51:01.827 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:51:01.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:01.827 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:01.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:01.827 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:51:01.827 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:01.827 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:51:01.828 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:51:01.828 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:51:01.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:01.828 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:01.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:01.828 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:51:01.828 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:01.828 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:51:01.829 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:51:01.829 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:51:01.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:01.829 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:01.829 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:01.829 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:51:01.829 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:01.829 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:51:01.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:51:01.831 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:51:01.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:01.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:01.836 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:51:02.320 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:51:02.360 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:51:02.362 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:51:02.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:02.365 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:51:02.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:02.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:02.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:51:02.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:02.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:51:02.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:51:02.391 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:51:02.391 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:51:02.410 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:51:02.410 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:51:02.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:02.414 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:51:02.414 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:51:02.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:02.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:02.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:51:02.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:02.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:02.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:02.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:02.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:02.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:02.986 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:51:02.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:02.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:02.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:02.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:02.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:02.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:02.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:02.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:02.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:02.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:02.992 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:51:07.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:07.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:07.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:07.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:07.995 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:07.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:08.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:08.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:08.003 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:08.003 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:08.003 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:51:08.006 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:51:08.006 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:51:08.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:08.006 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:08.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:08.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:51:08.006 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:08.006 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:51:08.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:51:08.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:51:08.009 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:08.009 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:08.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:08.009 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:51:08.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:08.010 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:51:08.012 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:51:08.012 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:51:08.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:08.012 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:08.012 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:08.012 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:51:08.012 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:08.012 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:51:08.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:51:08.017 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:51:08.017 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:51:08.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:08.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:08.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:51:08.502 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:51:08.553 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:51:08.555 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:51:08.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:08.558 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:51:08.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:08.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:08.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:51:08.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:08.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:51:08.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:51:08.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:51:08.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:51:08.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:08.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:51:08.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:51:08.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:08.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:08.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:51:09.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:09.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:09.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:09.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:09.457 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:51:09.935 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:51:10.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:10.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:10.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:10.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:10.413 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:51:10.892 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:51:11.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:11.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:11.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:11.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:11.370 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:51:11.848 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:51:12.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:12.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:12.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:12.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:12.326 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:51:12.803 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:51:13.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:13.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:13.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:13.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:13.281 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:51:13.759 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:51:14.237 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:51:14.715 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:51:15.193 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:51:15.672 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:51:16.150 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:51:16.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:16.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:16.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:16.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:16.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:16.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:16.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:16.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:16.627 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:51:16.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:16.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:16.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:16.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:16.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:16.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:16.629 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:51:16.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:16.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:16.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:16.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:16.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:16.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1839 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:21.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:21.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:21.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:21.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:21.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:21.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:21.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:21.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:21.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:21.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:21.639 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:51:21.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:51:21.643 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:51:21.643 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:21.643 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:21.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:21.644 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:51:21.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:21.644 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:51:21.647 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:51:21.647 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:51:21.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:21.648 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:21.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:21.648 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:51:21.648 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:21.648 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:51:21.651 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:51:21.651 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:51:21.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:21.652 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:21.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:21.652 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:51:21.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:21.652 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:51:21.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:51:21.658 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:51:21.658 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:51:21.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:51:21.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:21.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:21.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:21.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:21.663 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:51:22.145 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:51:22.197 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:51:22.200 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:51:22.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:22.203 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:51:22.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:22.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:22.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:51:22.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:22.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:51:22.233 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:51:22.233 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:51:22.233 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:51:22.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:22.246 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:51:22.246 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:51:22.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:22.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:22.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:51:22.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:22.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:22.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:23.102 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:51:23.580 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:51:23.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:23.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:23.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:23.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:24.059 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:51:24.538 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:51:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:24.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:24.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:24.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:25.016 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:51:25.495 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:51:25.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:25.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:25.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:25.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:25.974 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:51:26.452 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:51:26.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:26.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:26.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:26.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:26.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:51:27.409 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:51:27.888 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:51:28.366 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:51:28.842 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:51:29.321 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:51:29.799 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:51:30.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:30.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:30.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:30.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:30.253 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:51:30.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:30.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:30.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:30.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:30.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:30.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:30.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:30.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:30.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:30.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:30.272 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:51:30.272 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:30.272 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:30.272 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:30.272 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:30.272 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:30.272 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1838 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:35.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:35.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:35.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:35.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:35.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:35.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:35.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:35.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:35.282 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:35.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:35.283 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:51:35.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:51:35.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:51:35.286 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:35.286 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:35.286 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:35.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:51:35.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:35.287 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:51:35.290 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:51:35.290 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:51:35.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:35.290 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:35.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:35.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:51:35.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:35.290 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:51:35.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:51:35.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:51:35.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:35.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:35.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:35.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:51:35.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:35.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:51:35.296 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:51:35.296 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:51:35.296 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:35.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:35.301 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:51:35.785 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:51:35.829 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:51:35.831 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:51:35.832 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:51:35.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:35.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:35.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:35.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:51:35.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:35.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:51:35.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:51:35.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:51:35.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:51:36.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:36.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:36.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:36.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:36.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:36.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:36.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:36.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:36.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:36.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:36.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:36.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:36.043 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:51:36.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=159 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:36.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=159 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:36.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=159 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:36.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=159 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:36.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=159 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:36.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=159 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:41.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:41.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:41.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:41.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:41.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:41.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:41.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:41.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:41.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:41.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:41.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:51:41.061 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:51:41.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:51:41.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:41.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:41.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:41.062 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:51:41.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:41.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:51:41.064 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:51:41.064 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:51:41.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:41.064 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:41.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:41.065 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:51:41.065 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:41.065 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:51:41.067 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:51:41.067 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:51:41.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:41.067 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:41.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:41.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:51:41.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:41.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:51:41.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:51:41.070 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:51:41.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:41.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:41.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:51:41.555 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:51:41.602 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:51:41.604 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:51:41.605 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:51:41.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:41.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:41.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:41.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:51:41.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:41.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:51:41.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:51:41.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:51:41.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:51:42.032 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:51:42.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:42.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:42.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:42.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:42.510 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:51:42.987 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:51:43.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:43.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:43.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:43.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:43.465 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:51:43.943 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:51:44.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:44.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:44.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:44.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:44.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:51:44.899 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:51:45.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:45.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:45.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:45.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:45.377 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:51:45.854 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:51:46.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:46.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:46.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:46.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:46.119 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:46.119 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:46.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:46.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:46.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:46.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:46.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:46.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:46.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.123 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1080 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:51:46.335 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:51:46.821 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:51:47.306 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:51:47.792 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:51:48.277 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:51:48.762 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:51:49.247 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:51:49.733 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:51:50.218 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:51:50.703 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:51:51.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:51.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:51.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:51.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:51.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:51.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:51.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:51.126 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:51:51.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:51.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:51.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:51.135 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:51.135 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:51.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:51:51.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:51:51.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:51:51.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:51.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:51.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:51.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:51:51.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:51.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:51:51.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:51:51.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:51:51.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:51.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:51.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:51.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:51:51.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:51.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:51:51.154 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:51:51.155 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:51:51.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:51.155 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:51.155 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:51.155 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:51:51.155 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:51.155 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:51:51.159 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:51:51.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:51:51.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:51:51.160 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:51:51.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:51.161 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:51.161 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:51.161 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:51:56.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:51:56.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:51:56.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:56.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:56.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:56.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:56.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:51:56.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:56.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:56.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:51:56.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:51:56.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:51:56.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:51:56.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:56.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:56.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:51:56.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:51:56.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:51:56.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:51:56.183 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:51:56.183 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:51:56.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:56.183 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:56.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:51:56.183 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:51:56.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:51:56.183 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:51:56.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:51:56.185 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:51:56.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:56.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:51:56.185 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:51:56.185 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:51:56.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:51:56.185 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:51:56.188 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:51:56.188 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:51:56.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:51:56.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:51:56.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:51:56.193 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:51:56.677 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:51:56.725 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:51:56.726 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:51:56.728 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:51:56.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:51:56.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:51:56.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:51:56.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:51:56.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:51:56.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:51:56.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:51:56.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:51:56.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:51:57.155 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:51:57.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:57.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:57.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:57.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:57.633 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:51:58.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:51:58.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:58.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:58.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:58.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:58.588 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:51:59.066 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:51:59.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:51:59.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:51:59.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:51:59.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:51:59.543 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:52:00.021 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:52:00.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:00.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:00.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:00.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:00.499 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:52:00.976 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:52:01.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:01.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:01.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:01.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:01.454 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:52:01.932 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:52:02.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:02.409 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:52:02.887 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:52:03.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:03.365 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:52:03.843 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:52:04.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:04.321 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:52:04.799 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:52:05.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:05.276 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:52:05.754 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:52:06.232 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:52:06.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:06.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:06.710 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:52:07.188 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:52:07.667 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:52:08.145 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:52:08.622 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:52:09.101 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:52:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:52:10.057 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:52:10.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:10.535 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:52:11.013 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:52:11.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:11.490 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:52:11.968 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:52:12.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:12.445 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:52:12.923 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:52:13.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:13.401 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:52:13.879 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:52:14.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:14.356 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:52:14.834 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:52:15.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:15.312 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:52:15.789 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:52:16.267 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:52:16.744 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:52:17.222 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:52:17.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:17.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:17.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:17.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:17.338 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:17.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:17.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:17.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:17.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:52:17.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:52:17.341 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:52:17.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:17.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:17.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4515 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:17.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4515 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:17.342 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4515 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:17.342 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4515 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:17.342 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4515 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:22.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:52:22.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:52:22.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:22.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:22.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:22.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:22.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:22.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:52:22.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:22.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:52:22.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:52:22.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:52:22.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:52:22.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:52:22.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:22.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:22.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:52:22.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:52:22.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:52:22.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:52:22.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:52:22.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:52:22.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:22.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:22.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:52:22.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:52:22.366 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:52:22.368 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:52:22.368 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:52:22.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:52:22.368 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:22.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:22.368 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:52:22.368 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:52:22.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:52:22.372 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:52:22.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:52:22.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:52:22.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:52:22.372 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:52:22.373 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:52:22.373 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:52:22.373 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:22.378 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:52:22.862 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:52:22.911 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:52:22.913 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:52:22.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:52:22.915 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:52:22.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:22.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:22.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:52:22.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:22.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:52:22.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:52:22.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:52:22.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:52:22.953 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:52:22.955 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:52:22.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:52:22.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:52:22.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:52:22.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:22.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:23.340 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:52:23.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:23.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:23.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:23.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:23.815 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:52:24.253 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:52:24.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:24.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:24.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:24.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:24.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:24.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:24.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:24.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:24.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:24.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:24.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:24.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:52:24.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:52:24.269 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:24.269 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:29.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:52:29.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:52:29.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:29.272 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:29.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:29.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:29.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:29.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:52:29.281 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:29.282 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:52:29.282 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:52:29.284 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:52:29.284 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:52:29.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:52:29.285 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:29.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:29.285 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:52:29.285 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:52:29.285 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:52:29.287 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:52:29.287 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:52:29.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:52:29.287 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:29.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:29.287 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:52:29.287 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:52:29.288 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:52:29.289 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:52:29.289 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:52:29.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:52:29.289 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:29.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:29.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:52:29.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:52:29.290 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:52:29.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:52:29.292 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:52:29.293 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:29.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:52:29.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:52:29.820 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:52:29.821 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:52:29.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:52:29.823 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:52:29.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:29.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:29.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:52:29.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:29.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:52:29.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:52:29.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:52:29.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:52:29.873 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:52:29.877 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:52:29.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:52:29.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:52:29.891 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:52:29.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:29.891 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:30.261 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:52:30.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:30.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:30.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:30.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:30.740 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:52:31.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 04:52:31.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:31.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:31.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:31.195 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:31.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:31.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:31.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:31.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:31.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:31.199 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:31.199 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:31.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:52:31.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:52:31.199 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:52:31.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:31.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:31.199 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:52:36.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:52:36.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:52:36.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:36.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:36.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:36.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:36.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:52:36.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:52:36.220 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:36.220 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:52:36.220 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:52:36.227 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:52:36.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:52:36.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:52:36.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:36.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:52:36.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:52:36.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:52:36.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:52:36.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:52:36.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:52:36.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:52:36.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:36.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:52:36.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:52:36.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:52:36.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:52:36.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:52:36.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:52:36.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:52:36.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:52:36.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:52:36.234 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:52:36.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:52:36.234 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:52:36.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:52:36.238 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:52:36.238 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:52:36.238 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:52:36.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:52:36.243 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:52:36.727 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:52:36.769 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:52:36.771 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:52:36.773 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:52:36.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:52:36.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:36.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:36.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:52:36.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:36.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:52:36.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:52:36.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:52:36.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:52:36.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:52:36.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:52:36.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:52:36.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:36.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:37.204 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:52:37.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:37.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:37.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:37.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:37.682 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:52:38.160 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:52:38.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:38.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:38.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:38.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:38.638 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:52:39.116 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:52:39.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:39.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:39.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:39.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:39.594 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:52:40.072 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:52:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:40.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:40.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:40.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:40.550 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:52:41.028 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:52:41.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:52:41.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:52:41.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:52:41.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:52:41.506 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:52:41.983 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:52:42.461 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:52:42.939 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:52:43.417 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:52:43.895 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:52:44.373 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:52:44.851 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:52:45.329 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:52:45.806 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:52:46.284 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:52:46.763 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:52:47.240 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:52:47.718 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:52:48.196 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:52:48.674 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:52:49.152 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:52:49.629 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:52:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:52:50.585 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:52:51.073 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:52:51.551 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:52:52.029 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:52:52.506 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:52:52.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:52:52.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:52.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:52.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:52.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:52:52.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:52:52.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:52:52.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:52.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:52:52.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:52:52.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:52:52.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:52:52.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:52:52.892 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:52:52.892 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 04:52:52.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:52.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:52:52.984 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:52:53.461 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:52:53.940 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:52:54.419 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:52:54.897 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:52:55.376 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:52:55.854 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:52:56.333 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:52:56.811 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:52:57.289 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:52:57.768 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:52:58.246 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:52:58.725 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:52:59.204 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:52:59.682 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:53:00.161 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:53:00.639 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:53:01.117 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:53:01.595 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:53:02.073 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:53:02.551 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:53:03.030 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:53:03.508 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:53:03.986 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:53:04.465 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:53:04.943 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:53:05.422 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:53:05.900 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:53:06.378 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:53:06.856 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:53:07.335 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:53:07.813 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:53:08.292 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:53:08.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:53:08.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:08.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:53:08.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:53:08.486 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:53:08.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:53:08.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:53:08.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:53:08.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:08.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:53:08.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:53:08.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:53:08.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:53:08.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:53:08.535 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:53:08.535 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 04:53:08.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:08.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:08.767 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:53:09.245 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:53:09.723 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:53:10.201 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:53:10.680 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 04:53:11.158 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 04:53:11.636 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 04:53:12.115 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 04:53:12.593 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 04:53:13.072 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 04:53:13.550 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 04:53:14.028 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 04:53:14.507 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 04:53:14.985 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 04:53:15.464 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 04:53:15.941 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 04:53:16.419 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 04:53:16.898 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 04:53:17.377 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 04:53:17.855 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 04:53:18.333 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 04:53:18.811 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 04:53:19.290 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 04:53:19.769 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 04:53:20.247 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 04:53:20.726 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 04:53:21.204 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 04:53:21.682 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 04:53:22.160 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 04:53:22.639 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 04:53:23.118 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 04:53:23.595 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 04:53:24.074 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 04:53:24.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:53:24.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:24.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:53:24.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:53:24.153 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:53:24.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:53:24.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:53:24.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:53:24.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:24.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:53:24.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:53:24.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:53:24.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:53:24.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:24.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:53:24.225 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:53:24.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:53:24.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:24.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:24.551 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 04:53:25.028 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 04:53:25.507 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 04:53:25.985 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 04:53:26.463 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 04:53:26.941 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 04:53:27.419 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 04:53:27.897 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 04:53:28.374 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 04:53:28.852 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 04:53:29.330 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 04:53:29.808 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 04:53:30.286 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 04:53:30.764 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 04:53:31.242 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 04:53:31.720 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 04:53:32.198 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 04:53:32.676 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 04:53:33.154 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 04:53:33.632 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 04:53:34.110 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 04:53:34.588 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 04:53:35.066 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 04:53:35.544 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 04:53:36.022 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 04:53:36.500 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 04:53:36.985 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 04:53:37.463 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 04:53:37.942 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 04:53:38.419 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 04:53:38.897 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 04:53:39.375 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 04:53:39.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:53:39.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:39.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:53:39.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:53:39.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:53:39.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:53:39.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:53:39.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:53:39.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:53:39.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:53:39.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:53:39.824 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:53:39.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:53:39.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:39.824 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:53:44.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:53:44.825 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:53:44.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:53:44.827 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:53:44.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:53:44.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:53:44.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:53:44.833 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:53:44.833 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:44.834 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:53:44.834 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:53:44.836 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:53:44.837 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:53:44.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:53:44.837 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:44.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:53:44.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:53:44.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:53:44.838 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:53:44.840 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:53:44.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:53:44.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:53:44.841 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:44.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:53:44.841 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:53:44.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:53:44.841 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:53:44.844 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:53:44.844 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:53:44.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:53:44.844 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:44.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:53:44.844 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:53:44.844 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:53:44.844 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:53:44.848 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.849 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:53:44.849 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:53:44.849 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:53:44.849 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.850 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.851 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:53:44.852 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:53:44.852 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:44.852 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:53:49.856 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:53:49.856 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:53:49.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:53:49.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:53:49.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:53:49.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:53:49.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:53:49.866 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:53:49.866 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:49.867 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:53:49.867 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:53:49.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:53:49.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:53:49.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:53:49.874 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:49.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:53:49.875 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:53:49.875 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:53:49.875 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:53:49.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:53:49.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:53:49.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:53:49.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:49.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:53:49.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:53:49.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:53:49.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:53:49.888 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:53:49.888 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:53:49.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:53:49.888 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:53:49.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:53:49.888 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:53:49.888 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:53:49.888 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:53:49.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:53:49.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:53:49.894 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:53:49.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:53:49.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:53:49.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:53:49.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:53:50.383 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:53:50.423 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:53:50.425 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:53:50.426 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:53:50.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:53:50.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:53:50.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:53:50.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:53:50.463 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:53:50.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:50.466 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:53:50.466 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:53:50.466 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:53:50.466 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:53:50.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:53:50.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:53:50.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:53:50.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:50.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:53:50.860 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:53:50.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:53:50.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:53:50.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:53:50.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:53:51.338 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:53:51.816 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:53:51.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:53:51.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:53:51.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:53:51.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:53:52.293 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:53:52.772 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:53:52.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:53:52.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:53:52.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:53:52.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:53:53.249 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:53:53.727 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:53:53.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:53:53.899 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:53:53.899 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:53:53.899 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:53:54.205 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:53:54.683 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:53:54.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:53:54.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:53:54.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:53:54.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:53:55.161 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:53:55.639 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:53:56.117 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:53:56.595 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:53:57.074 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:53:57.552 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:53:58.030 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:53:58.508 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:53:58.986 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:53:59.464 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:53:59.942 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:54:00.420 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:54:00.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:00.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:00.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:54:00.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:54:00.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:00.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:00.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:00.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:00.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:00.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:00.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:54:00.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:54:00.884 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:54:00.884 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:00.884 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:00.885 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:00.885 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:00.885 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:00.885 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:05.882 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:54:05.882 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:54:05.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:05.885 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:05.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:05.887 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:05.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:05.897 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:54:05.897 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:05.898 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:54:05.898 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:54:05.902 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:54:05.903 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:54:05.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:54:05.903 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:05.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:54:05.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:05.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:54:05.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:54:05.907 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:54:05.908 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:54:05.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:54:05.908 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:05.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:05.908 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:54:05.908 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:54:05.908 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:54:05.911 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:54:05.911 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:54:05.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:54:05.911 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:05.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:05.911 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:54:05.911 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:54:05.911 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:54:05.915 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:54:05.915 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:54:05.915 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:05.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:05.920 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:54:06.404 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:54:06.458 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:54:06.460 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:54:06.461 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:54:06.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:06.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:54:06.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:54:06.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:54:06.496 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:54:06.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:06.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:54:06.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:54:06.500 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:54:06.500 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:54:06.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:06.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:54:06.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:54:06.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:06.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:06.883 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:54:06.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:06.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:06.921 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:06.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:07.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:54:07.839 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:54:07.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:07.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:07.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:07.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:08.317 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:54:08.794 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:54:08.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:08.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:08.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:08.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:09.272 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:54:09.750 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:54:09.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:09.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:09.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:09.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:10.228 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:54:10.706 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:54:10.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:10.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:10.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:11.184 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:54:11.662 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:54:12.140 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:54:12.619 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:54:13.097 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:54:13.575 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:54:14.053 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:54:14.531 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:54:15.009 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:54:15.487 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:54:15.965 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:54:16.444 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:54:16.921 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:54:17.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:17.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:17.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:54:17.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:17.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:54:17.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:54:17.386 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:54:22.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:54:22.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:54:22.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:22.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:22.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:22.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:22.412 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:22.413 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:54:22.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:22.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:54:22.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:54:22.418 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:54:22.418 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:54:22.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:54:22.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:22.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:22.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:54:22.420 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:54:22.420 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:54:22.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:54:22.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:54:22.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:54:22.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:22.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:22.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:54:22.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:54:22.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:54:22.424 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:54:22.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:54:22.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:54:22.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:22.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:22.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:54:22.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:54:22.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:54:22.427 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:54:22.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:54:22.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:54:22.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:54:22.427 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:54:22.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:54:22.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:54:22.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:54:22.428 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:54:22.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:22.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:22.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:22.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:22.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:54:22.915 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:54:22.964 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:54:22.966 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:54:22.968 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:54:22.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:22.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:54:22.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:54:22.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:54:23.006 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:54:23.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:23.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:54:23.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:54:23.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:54:23.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:54:23.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:23.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:54:23.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:54:23.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:23.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:23.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:54:23.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:23.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:23.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:23.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:23.870 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:54:24.348 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:54:24.373 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:24.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:24.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:24.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:24.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:24.826 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:54:25.303 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:54:25.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:25.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:25.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:25.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:25.782 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:54:26.259 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:54:26.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:26.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:26.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:26.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:26.737 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:54:27.215 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:54:27.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:27.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:27.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:27.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:27.693 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:54:28.170 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:54:28.649 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:54:29.126 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:54:29.604 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:54:30.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:54:30.559 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:54:31.037 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:54:31.515 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:54:31.992 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:54:32.470 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:54:32.948 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:54:33.426 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:54:33.904 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:54:34.382 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:54:34.860 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:54:35.338 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:54:35.816 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:54:36.294 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:54:36.772 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:54:37.250 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:54:37.727 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:54:38.205 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:54:38.683 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:54:39.161 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:54:39.639 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:54:40.116 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:54:40.594 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:54:41.072 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:54:41.550 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:54:42.028 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:54:42.505 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:54:42.983 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:54:43.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:43.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:43.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:54:43.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:54:43.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:43.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:43.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:43.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:43.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:43.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:54:43.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:54:43.096 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:54:43.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:43.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:43.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:48.098 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:54:48.098 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:54:48.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:48.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:48.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:48.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:48.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:48.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:54:48.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:48.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:54:48.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:54:48.119 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:54:48.120 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:54:48.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:54:48.120 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:48.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:48.121 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:54:48.121 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:54:48.121 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:54:48.123 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:54:48.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:54:48.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:54:48.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:48.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:48.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:54:48.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:54:48.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:54:48.127 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:54:48.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:54:48.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:54:48.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:54:48.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:48.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:54:48.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:54:48.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:54:48.132 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:54:48.132 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:54:48.132 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:54:48.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:54:48.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:54:48.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:54:48.137 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:54:48.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:54:48.656 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:54:48.657 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:54:48.657 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:54:48.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:48.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:54:48.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:54:48.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:54:48.693 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:54:48.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:48.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:54:48.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:54:48.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:54:48.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:54:48.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:48.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:54:48.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:54:48.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:48.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:49.097 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:54:49.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:49.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:49.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:49.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:49.575 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:54:49.590 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:50.053 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:54:50.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:50.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:50.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:50.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:50.530 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:54:50.565 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:51.008 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:54:51.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:51.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:51.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:51.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:51.486 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:54:51.540 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:51.964 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:54:52.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:52.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:52.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:52.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:52.442 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:54:52.513 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:52.920 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:54:53.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:53.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:53.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:53.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:53.397 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:54:53.488 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:53.875 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:54:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:54:54.460 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:54.830 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:54:55.308 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:54:55.435 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:55.786 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:54:56.263 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:54:56.408 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:56.741 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:54:57.219 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:54:57.383 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:57.697 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:54:58.175 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:54:58.357 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:54:58.653 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:54:59.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:54:59.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:54:59.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:54:59.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:54:59.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:54:59.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:54:59.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:54:59.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:54:59.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:54:59.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:54:59.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:54:59.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:54:59.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:54:59.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:54:59.121 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2346 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:54:59.122 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:04.121 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:04.121 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:04.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:04.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:04.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:04.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:04.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:04.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:04.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:04.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:04.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:55:04.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:55:04.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:55:04.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:04.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:04.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:04.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:55:04.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:04.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:55:04.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:55:04.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:55:04.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:04.146 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:04.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:04.146 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:55:04.146 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:04.146 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:55:04.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:55:04.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:55:04.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:04.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:04.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:04.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:55:04.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:04.149 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:55:04.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:55:04.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:55:04.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:55:04.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:55:04.152 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:55:04.152 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:04.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:55:04.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:55:04.677 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:55:04.678 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:04.678 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:55:04.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:04.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:04.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:04.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:04.720 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:55:04.722 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:04.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:04.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:04.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:04.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:04.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:04.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:04.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:04.734 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:04.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:04.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:04.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:05.115 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:55:05.116 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:55:05.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:05.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:05.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:05.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:05.593 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:55:06.071 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:55:06.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:06.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:06.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:06.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:06.550 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:55:07.028 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:55:07.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:07.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:07.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:07.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:07.506 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:55:07.984 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:55:08.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:08.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:08.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:08.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:08.461 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:55:08.940 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:55:09.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:09.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:09.159 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:09.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:09.418 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:55:09.895 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:55:10.373 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:55:10.851 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:55:11.329 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:55:11.807 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:55:12.285 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:55:12.764 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:55:13.242 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:55:13.720 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:55:14.198 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:55:14.676 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:55:15.154 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:55:15.355 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:15.631 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:55:16.109 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:55:16.587 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:55:17.065 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:55:17.543 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:55:18.021 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:55:18.499 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:55:18.976 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:55:19.454 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:55:19.932 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:55:20.410 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:55:20.888 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:55:21.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:21.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:21.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:21.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:21.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:21.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:21.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:21.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:21.222 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:21.222 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:21.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:21.222 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:55:21.223 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:21.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:21.223 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:21.223 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:21.223 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:21.224 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:21.224 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:21.224 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:26.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:26.222 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:26.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:26.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:26.224 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:26.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:26.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:26.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:26.231 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:26.231 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:26.231 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:55:26.234 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:55:26.235 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:55:26.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:26.235 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:26.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:26.235 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:55:26.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:26.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:55:26.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:55:26.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:55:26.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:26.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:26.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:26.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:55:26.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:26.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:55:26.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:55:26.242 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:55:26.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:26.242 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:26.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:26.242 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:55:26.242 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:26.242 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.246 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:55:26.246 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:55:26.246 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:55:26.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:26.251 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:55:26.735 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:55:26.781 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:55:26.783 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:26.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:26.786 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:55:26.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:26.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:26.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:26.829 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:26.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:26.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:26.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:26.834 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:26.834 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:26.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:26.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:26.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:26.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:26.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:27.212 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:55:27.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:27.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:27.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:27.690 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:55:27.707 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:55:28.165 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:55:28.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:28.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:28.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:28.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:28.644 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:55:29.122 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:55:29.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:29.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:29.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:29.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:29.600 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:55:30.078 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:55:30.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:30.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:30.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:30.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:30.556 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:55:31.034 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:55:31.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:31.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:31.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:31.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:31.511 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:55:31.989 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:55:32.467 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:55:32.945 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:55:33.423 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:55:33.901 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:55:34.379 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:55:34.857 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:55:35.335 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:55:35.813 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:55:36.291 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:55:36.769 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:55:36.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:36.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:36.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:36.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:36.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:36.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:36.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:36.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:36.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:36.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:36.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:36.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:36.910 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:55:36.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:36.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:36.911 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2276 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:36.911 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2276 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:36.911 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2276 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:36.911 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2276 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:36.911 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2276 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:36.911 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2276 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:36.912 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2276 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:41.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:41.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:41.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:41.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:41.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:41.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:41.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:41.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:41.922 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:41.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:41.922 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:55:41.926 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:55:41.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:55:41.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:41.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:41.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:41.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:55:41.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:41.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:55:41.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:55:41.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:55:41.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:41.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:41.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:41.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:55:41.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:41.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:55:41.933 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:55:41.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:55:41.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:41.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:41.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:41.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:55:41.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:41.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:55:41.936 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:55:41.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:55:41.937 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:55:41.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:41.941 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:55:42.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:55:42.465 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:55:42.466 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:42.468 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:55:42.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:42.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:42.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:42.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:42.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:42.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:42.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:42.491 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:42.491 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:42.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:42.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:42.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:42.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:42.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:42.903 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:55:42.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:42.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:42.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:42.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:42.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:42.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:42.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:42.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:42.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:42.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:42.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:42.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:42.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:42.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:42.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:42.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:42.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:42.956 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:55:42.956 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:55:42.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:42.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.381 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:55:43.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:43.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:43.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:43.643 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:55:43.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:43.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:43.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:43.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:43.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:43.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:43.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:43.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:43.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:43.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:43.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:43.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:43.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:43.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:43.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:43.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:43.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:43.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:43.841 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:43.841 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:43.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:43.850 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:55:43.850 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:55:43.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:43.857 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:55:43.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:43.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:43.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:43.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:44.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:44.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:44.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:44.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:44.254 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:55:44.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:44.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:44.261 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:55:44.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:49.264 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:49.264 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:49.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:49.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:49.268 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:49.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:49.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:49.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:49.272 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:49.272 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:49.272 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:55:49.273 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:55:49.273 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:55:49.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:49.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:49.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:49.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:55:49.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:49.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:55:49.275 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:55:49.275 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:55:49.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:49.275 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:49.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:49.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:55:49.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:49.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:55:49.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:55:49.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:55:49.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:49.277 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:49.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:49.277 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:55:49.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:49.277 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:55:49.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:55:49.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:55:49.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:55:49.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:55:49.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:55:49.280 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:55:49.280 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:55:49.280 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:49.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:49.285 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:55:49.768 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:55:49.815 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:55:49.817 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:49.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:49.821 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:55:49.837 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:49.837 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:49.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:49.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:49.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:49.844 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:49.844 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:49.844 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:49.861 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:55:49.865 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 04:55:49.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:49.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:49.874 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:49.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:49.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:50.246 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:55:50.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:50.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:50.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:50.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:50.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:50.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:50.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:50.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:50.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:50.265 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:50.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:50.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:50.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:50.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:50.266 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:55:50.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.266 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:50.267 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:55:55.265 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:55:55.265 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:55:55.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:55.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:55.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:55.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:55.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:55:55.276 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:55.276 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:55.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:55:55.277 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:55:55.281 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:55:55.281 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:55:55.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:55.282 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:55.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:55:55.282 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:55:55.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:55:55.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:55:55.284 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:55:55.284 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:55:55.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:55.285 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:55.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:55:55.285 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:55:55.285 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:55:55.285 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:55:55.287 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:55:55.287 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:55:55.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:55.287 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:55:55.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:55:55.287 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:55:55.287 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:55:55.287 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:55:55.291 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:55:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:55:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:55:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:55:55.291 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:55:55.291 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:55:55.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:55:55.292 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:55:55.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:55:55.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:55:55.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:55:55.781 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:55:55.825 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:55:55.826 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:55:55.828 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:55:55.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:55.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:55.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:55.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:55.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:55.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:55.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:55.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:55.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:55.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:55.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:55.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:55.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:55.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:56.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:56.259 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:55:56.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:56.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:56.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:56.297 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:56.736 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:55:57.214 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:55:57.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:57.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:57.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:57.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:57.691 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:55:58.169 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:55:58.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:58.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:58.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:58.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:58.647 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:55:59.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:59.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:59.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:59.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:59.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:55:59.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:55:59.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:55:59.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:59.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:55:59.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:55:59.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:55:59.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:55:59.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:59.077 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:55:59.077 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 04:55:59.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:59.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:55:59.124 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:55:59.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:55:59.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:55:59.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:55:59.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:55:59.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:55:59.603 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:56:00.082 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:56:00.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:00.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:00.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:00.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:00.560 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:56:01.039 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:56:01.518 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:56:01.996 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:56:02.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:02.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:02.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:02.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:02.257 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:56:02.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:02.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:02.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:56:02.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:02.275 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:56:02.275 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:56:02.275 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:56:02.275 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:56:02.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:02.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:56:02.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:56:02.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:02.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:02.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:02.474 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:56:02.952 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:56:03.430 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:56:03.908 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:56:04.385 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:56:04.863 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:56:05.341 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:56:05.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:05.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:05.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:05.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:05.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:05.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:05.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:56:05.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:05.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:56:05.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:56:05.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:56:05.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:56:05.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:05.535 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:56:05.535 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:56:05.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:05.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:05.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:05.818 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:56:06.296 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:56:06.774 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:56:07.253 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:56:07.731 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:56:08.209 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:56:08.687 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:56:08.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:08.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:08.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:08.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:08.740 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:56:08.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:08.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:08.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:08.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:08.753 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:56:08.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:56:08.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:56:08.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:56:08.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:56:08.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:56:08.754 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:56:08.754 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:08.754 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:08.754 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:08.755 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:08.755 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:08.755 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2872 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:13.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:56:13.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:56:13.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:56:13.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:56:13.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:56:13.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:56:13.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:56:13.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:56:13.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:13.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:56:13.763 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:56:13.766 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:56:13.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:56:13.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:56:13.767 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:13.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:56:13.768 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:56:13.768 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:56:13.768 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:56:13.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:56:13.770 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:56:13.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:56:13.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:13.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:56:13.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:56:13.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:56:13.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:56:13.772 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:56:13.772 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:56:13.772 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:56:13.772 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:13.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:56:13.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:56:13.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:56:13.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:56:13.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:56:13.776 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:56:13.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:13.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:56:14.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:56:14.301 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:56:14.303 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:56:14.305 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:56:14.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:14.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:14.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:14.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:56:14.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:14.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:56:14.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:56:14.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:56:14.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:56:14.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:56:14.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:14.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:14.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:14.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:15.219 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:56:15.697 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:56:15.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:15.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:15.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:15.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:16.175 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:56:16.653 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:56:16.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:16.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:16.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:16.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:17.131 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:56:17.609 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:56:17.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:17.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:17.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:17.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:18.086 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:56:18.564 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:56:18.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:18.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:18.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:18.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:19.042 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:56:19.519 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:56:19.997 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:56:20.475 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:56:20.953 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:56:21.431 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:56:21.908 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:56:22.386 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:56:22.863 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:56:23.341 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:56:23.818 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:56:24.295 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:56:24.773 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:56:25.250 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:56:25.728 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:56:26.205 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:56:26.683 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:56:27.160 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:56:27.638 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:56:28.116 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:56:28.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:28.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:28.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:28.412 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:28.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:28.412 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:28.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:56:28.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:56:28.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:56:28.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:56:28.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:56:28.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:56:28.415 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:56:33.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:56:33.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:56:33.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:56:33.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:56:33.418 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:56:33.418 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:56:33.426 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:56:33.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:56:33.426 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:33.426 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:56:33.426 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:56:33.429 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:56:33.429 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:56:33.429 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:56:33.430 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:33.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:56:33.430 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:56:33.430 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:56:33.431 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:56:33.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:56:33.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:56:33.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:56:33.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:33.433 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:56:33.433 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:56:33.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:56:33.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:56:33.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:56:33.435 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:56:33.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:56:33.435 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:56:33.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:56:33.435 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:56:33.435 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:56:33.435 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:56:33.438 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:56:33.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:56:33.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:56:33.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:56:33.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:56:33.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:56:33.439 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:56:33.439 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:56:33.439 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:56:33.444 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:56:33.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:56:33.990 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:56:33.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:33.994 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:56:33.996 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:56:34.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:34.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:34.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:56:34.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:34.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:56:34.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:56:34.015 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:56:34.015 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:56:34.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:34.077 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 04:56:34.078 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 04:56:34.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:34.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:34.404 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:56:34.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:34.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:34.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:34.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:34.881 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:56:35.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:56:35.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:35.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:35.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:35.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:35.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:56:36.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:36.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:36.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:36.079 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 04:56:36.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:56:36.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:56:36.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:56:36.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:56:36.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:56:36.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:56:36.315 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:56:36.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:36.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:36.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:36.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:36.793 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:56:37.271 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:56:37.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:37.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:37.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:37.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:37.749 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:56:38.227 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:56:38.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:38.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:38.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:38.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:38.702 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:56:39.180 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:56:39.658 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:56:40.136 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:56:40.614 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:56:41.091 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:56:41.569 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:56:42.047 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:56:42.525 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:56:43.003 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:56:43.480 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:56:43.958 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:56:44.435 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:56:44.913 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:56:45.391 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:56:45.869 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:56:46.346 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:56:46.824 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:56:47.301 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:56:47.779 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:56:48.257 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:56:48.735 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:56:49.212 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:56:49.690 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:56:50.167 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:56:50.645 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:56:51.123 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:56:51.601 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:56:52.078 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:56:52.556 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:56:53.034 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:56:53.511 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:56:53.989 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:56:54.466 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:56:54.944 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:56:55.422 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:56:55.900 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:56:56.377 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:56:56.855 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:56:57.332 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:56:57.809 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:56:58.287 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:56:58.786 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:56:59.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:56:59.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:56:59.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:56:59.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:56:59.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:56:59.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:56:59.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:56:59.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:56:59.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:56:59.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:56:59.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:56:59.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:56:59.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:56:59.077 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5470 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:56:59.077 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:04.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:57:04.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:57:04.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:04.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:04.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:04.080 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:04.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:04.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:57:04.089 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:04.089 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:57:04.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:57:04.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:57:04.093 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:57:04.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:57:04.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:04.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:04.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:57:04.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:57:04.094 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:57:04.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:57:04.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:57:04.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:57:04.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:04.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:04.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:57:04.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:57:04.096 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:57:04.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:57:04.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:57:04.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:57:04.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:04.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:04.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:57:04.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:57:04.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:57:04.101 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:57:04.101 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:57:04.101 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:04.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:04.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:57:04.590 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:57:04.630 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:57:04.632 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:57:04.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:57:04.635 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:57:04.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:57:04.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:57:04.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:57:04.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:57:04.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:57:04.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:57:04.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:57:04.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:57:05.068 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:57:05.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:05.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:05.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:05.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:05.546 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:57:06.024 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:57:06.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:06.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:06.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:06.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:06.502 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:57:06.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:57:07.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:07.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:07.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:07.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:07.457 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:57:07.935 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:57:08.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:08.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:08.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:08.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:08.413 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:57:08.891 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:57:09.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:09.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:09.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:09.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:09.369 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:57:09.846 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:57:10.324 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:57:10.802 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:57:11.280 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:57:11.758 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:57:12.236 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:57:12.713 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:57:13.191 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:57:13.668 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:57:14.146 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:57:14.624 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:57:15.102 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:57:15.580 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:57:16.057 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:57:16.534 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:57:17.012 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:57:17.490 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:57:17.967 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:57:18.445 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:57:18.923 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:57:19.401 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:57:19.878 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:57:20.356 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:57:20.834 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:57:21.312 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:57:21.790 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:57:22.267 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:57:22.745 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:57:23.223 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:57:23.700 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:57:24.179 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:57:24.656 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:57:25.134 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:57:25.612 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:57:26.090 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:57:26.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:57:26.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:57:26.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:26.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:26.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:26.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:26.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:26.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:57:26.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:57:26.120 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:57:26.120 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4700 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:26.121 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:26.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:26.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:26.121 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4700 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:26.121 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4700 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:26.121 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4700 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:26.121 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4700 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:26.121 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4700 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:31.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:57:31.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:57:31.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:31.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:31.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:31.128 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:31.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:31.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:57:31.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:31.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:57:31.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:57:31.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:57:31.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:57:31.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:57:31.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:31.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:31.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:57:31.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:57:31.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:57:31.143 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:57:31.143 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:57:31.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:57:31.143 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:31.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:31.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:57:31.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:57:31.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:57:31.146 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:57:31.146 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:57:31.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:57:31.146 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:31.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:31.146 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:57:31.146 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:57:31.146 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:57:31.149 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:57:31.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:57:31.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:57:31.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:57:31.149 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:57:31.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:57:31.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:57:31.150 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:57:31.150 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:57:31.150 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:31.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:31.155 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:57:31.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:57:31.678 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:57:31.680 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:57:31.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:57:31.681 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:57:31.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:57:31.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:57:31.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:57:31.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:57:31.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:57:31.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:57:31.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:57:31.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:57:32.115 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:57:32.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:32.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:32.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:32.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:32.593 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:57:33.071 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:57:33.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:33.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:33.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:33.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:33.548 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:57:34.026 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:57:34.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:34.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:34.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:34.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:34.504 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:57:34.982 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:57:35.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:35.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:35.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:35.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:35.459 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:57:35.937 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:57:36.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:36.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:36.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:36.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:36.415 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:57:36.893 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:57:37.371 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:57:37.849 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:57:38.326 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:57:38.803 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:57:39.282 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:57:39.760 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:57:40.237 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:57:40.715 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:57:41.192 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:57:41.670 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:57:42.148 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:57:42.623 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:57:43.101 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:57:43.579 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:57:44.057 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:57:44.535 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:57:45.013 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:57:45.491 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:57:45.969 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:57:46.446 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:57:46.924 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:57:47.402 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:57:47.880 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:57:48.358 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:57:48.850 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:57:49.328 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:57:49.805 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:57:50.282 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:57:50.760 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:57:51.238 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:57:51.716 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:57:52.194 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:57:52.671 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:57:53.150 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:57:53.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:57:53.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:57:53.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:53.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:53.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:53.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:53.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:53.171 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:53.171 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:53.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:53.171 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:57:53.171 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:57:53.171 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:57:53.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4698 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:53.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4698 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:53.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4698 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:53.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4698 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:53.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4698 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:53.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4698 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:57:58.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:57:58.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:57:58.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:58.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:58.176 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:58.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:58.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:57:58.185 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:57:58.185 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:58.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:57:58.186 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:57:58.189 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:57:58.189 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:57:58.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:57:58.189 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:58.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:57:58.190 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:57:58.190 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:57:58.190 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:57:58.192 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:57:58.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:57:58.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:57:58.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:58.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:57:58.192 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:57:58.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:57:58.192 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:57:58.194 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:57:58.194 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:57:58.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:57:58.195 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:57:58.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:57:58.195 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:57:58.195 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:57:58.195 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:57:58.197 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:57:58.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:57:58.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:57:58.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:57:58.197 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:57:58.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:57:58.198 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:57:58.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:57:58.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:57:58.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:57:58.687 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:57:58.721 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:57:58.723 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:57:58.724 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:57:58.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:57:58.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:57:58.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:57:58.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:57:58.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:57:58.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:57:58.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:57:58.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:57:58.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:57:59.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:57:59.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:57:59.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:57:59.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:57:59.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:57:59.642 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:58:00.120 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:58:00.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:00.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:00.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:00.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:00.598 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:58:01.076 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:58:01.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:01.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:01.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:01.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:01.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:58:02.031 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:58:02.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:02.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:02.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:02.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:02.509 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:58:02.987 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:58:03.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:03.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:03.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:03.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:03.465 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:58:03.943 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:58:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:58:04.898 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:58:05.376 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:58:05.854 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:58:06.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:58:06.809 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:58:07.287 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:58:07.765 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:58:08.243 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:58:08.720 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:58:09.197 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:58:09.675 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:58:10.152 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:58:10.630 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:58:11.108 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:58:11.586 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:58:12.064 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:58:12.541 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:58:13.018 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:58:13.496 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:58:13.973 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:58:14.448 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:58:14.925 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:58:15.404 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:58:15.881 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:58:16.359 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:58:16.836 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:58:17.314 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:58:17.792 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:58:18.270 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:58:18.747 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:58:19.225 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:58:19.703 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:58:20.181 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:58:20.659 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:58:21.136 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:58:21.614 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:58:22.092 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:58:22.569 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:58:23.046 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:58:23.523 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:58:24.001 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:58:24.479 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:58:24.956 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:58:25.434 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:58:25.912 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:58:26.390 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 04:58:26.868 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 04:58:27.346 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 04:58:27.824 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 04:58:28.302 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 04:58:28.780 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 04:58:29.258 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 04:58:29.736 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 04:58:30.213 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 04:58:30.691 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 04:58:31.169 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 04:58:31.646 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 04:58:32.124 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 04:58:32.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:58:32.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:58:32.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:32.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:32.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:32.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:32.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:58:32.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:58:32.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:58:32.230 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:58:32.230 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7266 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:58:32.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:58:32.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:58:32.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:58:32.231 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7266 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:58:32.231 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7266 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:58:32.231 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7266 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:58:37.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:58:37.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:58:37.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:58:37.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:58:37.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:58:37.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:58:37.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:58:37.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:58:37.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:58:37.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:58:37.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:58:37.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:58:37.248 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:58:37.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:58:37.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:58:37.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:58:37.249 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:58:37.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:58:37.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:58:37.251 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:58:37.251 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:58:37.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:58:37.251 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:58:37.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:58:37.251 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:58:37.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:58:37.251 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:58:37.254 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:58:37.254 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:58:37.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:58:37.254 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:58:37.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:58:37.254 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:58:37.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:58:37.254 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:58:37.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:58:37.258 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:58:37.258 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:58:37.258 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:58:37.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:58:37.263 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:58:37.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:58:37.793 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:58:37.795 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:58:37.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:58:37.797 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:58:37.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:58:37.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:58:37.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:58:37.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:58:37.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:58:37.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:58:37.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:58:37.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:58:38.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:58:38.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:38.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:38.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:38.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:38.701 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:58:39.179 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:58:39.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:39.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:39.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:39.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:39.657 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:58:40.135 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:58:40.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:40.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:40.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:40.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:40.613 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:58:41.090 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:58:41.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:41.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:41.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:41.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:41.568 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:58:42.046 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:58:42.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:58:42.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:58:42.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:58:42.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:58:42.524 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:58:43.002 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:58:43.479 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:58:43.957 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:58:44.434 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:58:44.912 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:58:45.389 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:58:45.867 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 04:58:46.345 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 04:58:46.822 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 04:58:47.300 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 04:58:47.777 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 04:58:48.255 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 04:58:48.733 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 04:58:49.211 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 04:58:49.689 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 04:58:50.166 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 04:58:50.644 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 04:58:51.121 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 04:58:51.599 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 04:58:52.077 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 04:58:52.554 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 04:58:53.032 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 04:58:53.510 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 04:58:53.987 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 04:58:54.465 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 04:58:54.943 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 04:58:55.421 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 04:58:55.899 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 04:58:56.377 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 04:58:56.854 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 04:58:57.332 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 04:58:57.810 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 04:58:58.287 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 04:58:58.765 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 04:58:59.243 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 04:58:59.721 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 04:59:00.199 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 04:59:00.677 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 04:59:01.154 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 04:59:01.632 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 04:59:02.104 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 04:59:02.582 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 04:59:03.060 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 04:59:03.537 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 04:59:04.015 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 04:59:04.493 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 04:59:04.971 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 04:59:05.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:59:05.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:59:05.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:05.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:05.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:05.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:05.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:05.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:05.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:05.280 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:59:05.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:05.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:05.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:05.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5985 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:10.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:10.282 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:10.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:10.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:10.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:10.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:10.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:10.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:10.297 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:10.297 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:10.297 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:59:10.300 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:59:10.300 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:59:10.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:10.300 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:10.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:10.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:59:10.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:10.301 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:59:10.303 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:59:10.303 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:59:10.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:10.304 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:10.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:10.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:59:10.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:10.304 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:59:10.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:59:10.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:59:10.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:10.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:10.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:10.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:59:10.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:10.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:59:10.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:59:10.309 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:59:10.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:10.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:10.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:59:10.796 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:59:10.841 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:59:10.844 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:59:10.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:59:10.846 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:59:10.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:10.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:10.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:10.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:10.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:10.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:10.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:10.859 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:59:10.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:10.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:10.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:15.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:15.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:15.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:15.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:15.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:15.865 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:15.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:15.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:15.868 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:15.868 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:15.868 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:59:15.871 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:59:15.871 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:59:15.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:15.872 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:15.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:15.872 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:59:15.872 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:15.872 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:59:15.875 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:59:15.875 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:59:15.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:15.875 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:15.875 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:15.875 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:59:15.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:15.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:59:15.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:59:15.878 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:59:15.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:15.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:15.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:15.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:59:15.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:15.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:59:15.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:59:15.884 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:59:15.884 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:59:15.884 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:15.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:15.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:15.889 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:59:16.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:59:16.419 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:59:16.421 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:59:16.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:59:16.424 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:59:16.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:16.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:16.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:16.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:16.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:16.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:16.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:16.441 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:59:16.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:16.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:16.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:16.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:16.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:16.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:16.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:21.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:21.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:21.444 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:21.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:21.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:21.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:21.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:21.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:21.460 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:21.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:21.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:59:21.463 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:59:21.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:59:21.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:21.464 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:21.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:21.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:59:21.465 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:21.465 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:59:21.467 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:59:21.467 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:59:21.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:21.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:21.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:21.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:59:21.468 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:21.468 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:59:21.470 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:59:21.470 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:59:21.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:21.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:21.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:21.471 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:59:21.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:21.471 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:59:21.475 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:59:21.475 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:59:21.475 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.475 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:21.480 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:59:21.964 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:59:22.017 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:59:22.019 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:59:22.021 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:59:22.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:59:22.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:22.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:22.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:22.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:22.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:22.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:22.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:22.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:22.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:22.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:22.039 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:59:22.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:22.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:22.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:22.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:22.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:22.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:22.040 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:27.038 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:27.038 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:27.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:27.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:27.041 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:27.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:27.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:27.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:27.049 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:27.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:27.050 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:59:27.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:59:27.052 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:59:27.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:27.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:27.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:27.053 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:59:27.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:27.053 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:59:27.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:59:27.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:59:27.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:27.056 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:27.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:27.056 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:59:27.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:27.056 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:59:27.058 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:59:27.058 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:59:27.058 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:27.058 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:27.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:27.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:59:27.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:27.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:59:27.061 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:59:27.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:59:27.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:59:27.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:59:27.061 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:59:27.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:59:27.062 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:59:27.062 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:59:27.062 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:27.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:27.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:59:27.549 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:59:27.590 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:59:27.591 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:59:27.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:59:27.592 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:59:27.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:59:27.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:59:27.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:59:27.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:59:27.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:59:27.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:59:27.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:59:27.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:59:28.027 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:59:28.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:28.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:28.505 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:59:28.983 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:59:29.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:29.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:29.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:29.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:29.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:59:29.938 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:59:30.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:30.066 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:30.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:30.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:30.416 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:59:30.894 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:59:31.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:31.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:31.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:31.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:31.372 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:59:31.850 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:59:32.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:32.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:32.068 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:32.068 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:32.328 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:59:32.806 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:59:33.283 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:59:33.761 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:59:34.239 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:59:34.717 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:59:35.195 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:59:35.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:59:35.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:59:35.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:35.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:35.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:35.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:35.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:35.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:35.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:35.653 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:35.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:35.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:35.654 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:59:35.654 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:35.654 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:35.654 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:35.654 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:35.654 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:35.654 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:40.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:40.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:40.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:40.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:40.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:40.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:40.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:40.668 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:40.668 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:40.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:40.669 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:59:40.673 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:59:40.673 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:59:40.674 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:40.674 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:40.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:40.674 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:59:40.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:40.675 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:59:40.677 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:59:40.677 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:59:40.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:40.677 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:40.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:40.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:59:40.678 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:40.678 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:59:40.680 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:59:40.680 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:59:40.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:40.680 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:40.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:40.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:59:40.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:40.680 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:59:40.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:59:40.684 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:59:40.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:40.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:40.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:40.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:40.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:59:41.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:59:41.217 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:59:41.219 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:59:41.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:59:41.221 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:59:41.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:59:41.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:59:41.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:59:41.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:59:41.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:59:41.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:59:41.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:59:41.224 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:59:41.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:59:41.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:41.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:41.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:41.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:42.127 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:59:42.605 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:59:42.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:42.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:42.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:42.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:43.083 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:59:43.561 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:59:43.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:43.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:43.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:43.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:44.039 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:59:44.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:59:44.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:44.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:44.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:44.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:44.993 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:59:45.471 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:59:45.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:45.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:45.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:45.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:45.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 04:59:46.427 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 04:59:46.905 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 04:59:47.382 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 04:59:47.859 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 04:59:48.337 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 04:59:48.815 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 04:59:49.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:59:49.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:59:49.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:49.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:49.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:49.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:49.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:49.279 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:49.279 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:49.279 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 04:59:49.279 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:49.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:49.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:49.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.280 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.281 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.281 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.281 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.281 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.281 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:49.281 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 04:59:54.280 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 04:59:54.280 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 04:59:54.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:54.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:54.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:54.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:54.291 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 04:59:54.291 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:54.291 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:54.292 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 04:59:54.292 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 04:59:54.294 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 04:59:54.294 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 04:59:54.295 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:54.295 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:54.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 04:59:54.295 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 04:59:54.296 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 04:59:54.296 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 04:59:54.298 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 04:59:54.298 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 04:59:54.298 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:54.298 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:54.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 04:59:54.299 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 04:59:54.299 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 04:59:54.299 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 04:59:54.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 04:59:54.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 04:59:54.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:54.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 04:59:54.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 04:59:54.301 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 04:59:54.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 04:59:54.301 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 04:59:54.305 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 04:59:54.305 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 04:59:54.305 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 04:59:54.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 04:59:54.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 04:59:54.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 04:59:54.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 04:59:54.792 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 04:59:54.838 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 04:59:54.840 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 04:59:54.841 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 04:59:54.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 04:59:54.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 04:59:54.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 04:59:54.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 04:59:54.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 04:59:54.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 04:59:54.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 04:59:54.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 04:59:54.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 04:59:55.270 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 04:59:55.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:55.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:55.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:55.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:55.747 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 04:59:56.225 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 04:59:56.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:56.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:56.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:56.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:56.703 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 04:59:57.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 04:59:57.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:57.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:57.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:57.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:57.658 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 04:59:58.136 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 04:59:58.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:58.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:58.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:58.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:58.614 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 04:59:59.092 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 04:59:59.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 04:59:59.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 04:59:59.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 04:59:59.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 04:59:59.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:00:00.048 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:00:00.526 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:00:01.003 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:00:01.481 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:00:01.959 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:00:02.437 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:00:02.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:02.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:02.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:02.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:02.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:02.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:02.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:02.895 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:02.895 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:02.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:02.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:02.895 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:02.895 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:00:02.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:02.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:02.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:02.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:02.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:02.895 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:07.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:07.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:07.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:07.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:07.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:07.901 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:07.906 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:07.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:07.908 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:07.909 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:07.909 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:00:07.913 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:00:07.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:00:07.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:07.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:07.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:07.914 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:00:07.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:07.914 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:00:07.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:00:07.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:00:07.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:07.916 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:07.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:07.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:00:07.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:07.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:00:07.918 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:00:07.918 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:00:07.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:07.918 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:07.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:07.918 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:00:07.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:07.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:00:07.920 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:00:07.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:00:07.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:00:07.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:00:07.920 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:00:07.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:00:07.921 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:00:07.921 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:00:07.921 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:07.925 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:00:08.405 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:00:08.453 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:00:08.455 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:00:08.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:00:08.457 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:00:08.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:08.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:08.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:00:08.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:00:08.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:00:08.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:00:08.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:00:08.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:00:08.882 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:00:08.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:08.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:08.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:08.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:09.360 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:00:09.838 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:00:09.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:09.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:09.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:09.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:10.315 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:00:10.792 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:00:10.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:10.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:10.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:10.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:11.270 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:00:11.748 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:00:11.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:11.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:11.928 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:11.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:12.226 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:00:12.704 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:00:12.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:12.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:12.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:12.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:13.182 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:00:13.660 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:00:14.138 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:00:14.616 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:00:15.094 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:00:15.571 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:00:16.049 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:00:16.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:16.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:16.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:16.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:16.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:16.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:16.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:16.507 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:16.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:16.507 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:00:16.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:16.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:16.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:16.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:16.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:16.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:16.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:16.507 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:21.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:21.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:21.513 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:21.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:21.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:21.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:21.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:21.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:21.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:21.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:21.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:00:21.525 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:00:21.525 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:00:21.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:21.525 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:21.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:21.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:00:21.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:21.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:00:21.528 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:00:21.528 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:00:21.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:21.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:21.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:21.529 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:00:21.529 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:21.529 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:00:21.531 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:00:21.531 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:00:21.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:21.531 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:21.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:21.531 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:00:21.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:21.531 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:00:21.535 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:00:21.536 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:00:21.536 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:00:21.536 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:21.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:21.541 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:00:22.024 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:00:22.074 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:00:22.077 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:00:22.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:00:22.079 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:00:22.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:22.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:22.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:00:22.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:00:22.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:00:22.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:00:22.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:00:22.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:00:22.501 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:00:22.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:22.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:22.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:22.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:22.978 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:00:23.455 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:00:23.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:23.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:23.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:23.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:23.933 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:00:24.411 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:00:24.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:24.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:24.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:24.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:24.889 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:00:25.366 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:00:25.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:25.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:25.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:25.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:25.845 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:00:26.322 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:00:26.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:26.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:26.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:26.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:26.800 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:00:27.277 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:00:27.755 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:00:28.233 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:00:28.711 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:00:29.189 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:00:29.667 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:00:30.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:30.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:30.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:30.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:30.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:30.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:30.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:30.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:30.132 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:30.132 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:30.132 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:00:30.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:30.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:30.133 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:30.133 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:30.133 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:30.133 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:30.133 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:30.133 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:30.133 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:00:35.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:35.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:35.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:35.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:35.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:35.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:35.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:35.140 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:35.141 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:35.141 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:35.141 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:00:35.144 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:00:35.144 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:00:35.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:35.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:35.145 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:35.145 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:00:35.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:35.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:00:35.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:00:35.147 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:00:35.147 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:35.147 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:35.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:35.147 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:00:35.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:35.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:00:35.149 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:00:35.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:00:35.149 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:35.149 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:35.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:35.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:00:35.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:35.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:00:35.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:00:35.156 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:00:35.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:35.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:35.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:35.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:35.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:00:35.644 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:00:35.688 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:00:35.690 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:00:35.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:00:35.692 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:00:35.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:35.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:35.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:00:35.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:00:35.697 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:00:35.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:00:35.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:00:35.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:00:36.122 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:00:36.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:36.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:36.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:36.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:36.599 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:00:37.077 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:00:37.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:37.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:37.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:37.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:37.555 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:00:38.033 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:00:38.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:38.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:38.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:38.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:38.510 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:00:38.988 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:00:39.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:39.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:39.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:39.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:39.465 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:00:39.944 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:00:40.163 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:40.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:40.163 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:40.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:40.421 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:00:40.898 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:00:41.376 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:00:41.853 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:00:42.331 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:00:42.809 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:00:43.287 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:00:43.765 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:00:44.243 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:00:44.721 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:00:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:00:45.677 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:00:46.155 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:00:46.633 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:00:47.110 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:00:47.588 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:00:48.065 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:00:48.543 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:00:49.021 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:00:49.498 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:00:49.976 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:00:50.454 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:00:50.931 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:00:51.408 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:00:51.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:51.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:51.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:51.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:51.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:51.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:51.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:51.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:51.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:51.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:51.754 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:00:51.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:51.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:56.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:00:56.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:00:56.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:56.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:56.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:56.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:56.766 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:00:56.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:56.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:56.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:00:56.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:00:56.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:00:56.773 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:00:56.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:56.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:56.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:00:56.774 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:00:56.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:00:56.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:00:56.776 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:00:56.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:00:56.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:56.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:56.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:00:56.777 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:00:56.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:00:56.777 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:00:56.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:00:56.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:00:56.779 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:56.779 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:00:56.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:00:56.780 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:00:56.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:00:56.780 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:00:56.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:00:56.783 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:00:56.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:00:56.788 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:00:57.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:00:57.314 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:00:57.316 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:00:57.319 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:00:57.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:00:57.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:00:57.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:00:57.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:00:57.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:00:57.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:00:57.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:00:57.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:00:57.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:00:57.748 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:00:57.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:57.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:58.226 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:00:58.704 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:00:58.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:00:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:58.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:59.182 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:00:59.660 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:00:59.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:00:59.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:00:59.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:00:59.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:00.138 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:01:00.616 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:01:00.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:00.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:00.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:00.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:01.093 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:01:01.571 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:01:01.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:01.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:01.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:01.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:02.049 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:01:02.527 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:01:03.004 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:01:03.482 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:01:03.982 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:01:04.460 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:01:04.937 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:01:05.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:05.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:05.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:05.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:05.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:05.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:05.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:05.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:05.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:05.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:05.387 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:01:05.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:05.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:05.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:05.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:05.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:05.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:05.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:05.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:05.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:10.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:10.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:10.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:10.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:10.389 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:10.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:10.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:10.398 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:10.398 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:10.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:10.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:01:10.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:01:10.403 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:01:10.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:10.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:10.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:10.404 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:01:10.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:10.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:01:10.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:01:10.407 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:01:10.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:10.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:10.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:10.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:01:10.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:10.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:01:10.411 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:01:10.411 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:01:10.411 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:10.411 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:10.412 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:10.412 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:01:10.412 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:10.412 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:01:10.416 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.417 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:01:10.417 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:01:10.417 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:01:10.418 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:10.422 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:01:10.907 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:01:10.957 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:01:10.960 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:01:10.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:01:10.962 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:01:10.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:10.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:10.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:01:10.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:01:10.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:01:10.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:01:10.973 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:01:10.973 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:01:11.384 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:01:11.422 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:11.422 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:11.422 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:11.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:11.862 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:01:12.340 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:01:12.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:12.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:12.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:12.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:12.818 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:01:13.296 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:01:13.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:13.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:13.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:13.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:13.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:01:14.252 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:01:14.425 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:14.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:14.425 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:14.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:14.730 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:01:15.207 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:01:15.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:15.426 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:15.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:15.426 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:15.686 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:01:16.164 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:01:16.642 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:01:17.119 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:01:17.597 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:01:18.074 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:01:18.552 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:01:19.030 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:01:19.508 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:01:19.986 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:01:20.464 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:01:20.942 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:01:21.420 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:01:21.898 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:01:22.376 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:01:22.854 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:01:23.332 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:01:23.810 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:01:24.287 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:01:24.765 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:01:25.242 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:01:25.720 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:01:26.196 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:01:26.673 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:01:27.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:27.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:27.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:27.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:27.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:27.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:27.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:27.027 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:27.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:27.027 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:27.027 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:01:27.027 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:27.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:27.028 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3546 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:27.028 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3546 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:27.028 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3546 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:27.028 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3546 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:27.028 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3546 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:27.028 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3546 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:32.027 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:32.028 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:32.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:32.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:32.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:32.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:32.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:32.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:32.039 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:32.039 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:32.039 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:01:32.042 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:01:32.042 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:01:32.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:32.042 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:32.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:32.042 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:01:32.042 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:32.042 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:01:32.045 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:01:32.045 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:01:32.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:32.045 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:32.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:32.045 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:01:32.045 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:32.045 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:01:32.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:01:32.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:01:32.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:32.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:32.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:32.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:01:32.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:32.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:01:32.051 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:01:32.051 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:01:32.051 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:32.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:32.056 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:01:32.539 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:01:32.585 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:01:32.587 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:01:32.590 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:01:32.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:01:32.607 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:32.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:32.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:01:32.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:32.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:32.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:32.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:32.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:32.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:32.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:32.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:32.626 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:01:32.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:32.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:37.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:37.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:37.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:37.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:37.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:37.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:37.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:37.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:37.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:37.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:37.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:01:37.639 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:01:37.640 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:01:37.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:37.640 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:37.640 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:37.640 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:01:37.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:37.640 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:01:37.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:01:37.644 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:01:37.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:37.644 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:37.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:37.644 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:01:37.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:37.644 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:01:37.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:01:37.647 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:01:37.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:37.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:37.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:37.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:01:37.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:37.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:01:37.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:01:37.651 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:01:37.652 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:37.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:37.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:01:38.133 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:01:38.176 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:01:38.177 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:01:38.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:01:38.179 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:01:38.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:38.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:38.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:01:38.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:38.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:38.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:38.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:38.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:38.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:38.232 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:38.232 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:38.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:38.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:38.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:38.232 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:43.232 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:43.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:43.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:43.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:43.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:43.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:43.246 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:43.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:43.248 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:43.248 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:43.249 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:01:43.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:01:43.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:01:43.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:43.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:43.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:43.255 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:01:43.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:43.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:01:43.258 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:01:43.258 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:01:43.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:43.259 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:43.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:43.259 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:01:43.259 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:43.259 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:01:43.261 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:01:43.261 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:01:43.261 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:43.261 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:43.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:43.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:01:43.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:43.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:01:43.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:01:43.265 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:01:43.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:01:43.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:43.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:43.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:01:43.752 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:01:43.792 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:01:43.795 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:01:43.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:01:43.797 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:01:43.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:43.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:43.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:01:43.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:43.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:43.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:43.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:43.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:43.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:43.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:43.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:43.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:43.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:43.842 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:01:43.842 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:43.842 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:43.842 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:43.842 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:43.843 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:43.843 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:48.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:48.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:48.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:48.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:48.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:48.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:48.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:48.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:48.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:48.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:48.856 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:01:48.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:01:48.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:01:48.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:48.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:48.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:48.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:01:48.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:48.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:01:48.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:01:48.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:01:48.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:48.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:48.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:48.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:01:48.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:48.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:01:48.869 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:01:48.869 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:01:48.869 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:48.869 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:48.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:48.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:01:48.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:48.870 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:01:48.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:01:48.875 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:01:48.875 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:01:48.875 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:48.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:01:49.363 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:01:49.410 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:01:49.412 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:01:49.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:01:49.415 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:01:49.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:49.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:49.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:01:49.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:49.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:49.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:49.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:49.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:49.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:49.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:49.467 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:49.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:49.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:49.467 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:01:54.466 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:54.466 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:54.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:54.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:54.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:54.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:54.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:54.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:54.478 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:54.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:01:54.479 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:01:54.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:01:54.482 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:01:54.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:54.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:54.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:54.483 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:01:54.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:01:54.483 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:01:54.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:01:54.486 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:01:54.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:54.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:54.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:54.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:01:54.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:01:54.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:01:54.488 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:01:54.488 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:01:54.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:54.489 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:01:54.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:54.489 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:01:54.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:01:54.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:01:54.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:01:54.492 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:01:54.492 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:01:54.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:01:54.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:01:54.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:01:54.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:01:55.023 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:01:55.025 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:01:55.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:01:55.027 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:01:55.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:55.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:55.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:01:55.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:01:55.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:01:55.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:01:55.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:01:55.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:01:55.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:01:55.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:01:55.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:01:55.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:01:55.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:01:55.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:01:55.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:01:55.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:01:55.072 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:02:00.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:00.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:00.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:00.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:00.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:00.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:00.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:00.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:00.090 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:00.091 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:00.091 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:02:00.094 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:02:00.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:02:00.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:00.095 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:00.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:00.096 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:02:00.096 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:00.096 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:02:00.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:02:00.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:02:00.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:00.100 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:00.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:00.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:02:00.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:00.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:02:00.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:02:00.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:02:00.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:00.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:00.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:00.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:02:00.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:00.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:02:00.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:02:00.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.110 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:02:00.110 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:02:00.110 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:02:00.111 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:00.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:00.116 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:02:00.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:02:00.651 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:02:00.653 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:02:00.655 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:02:00.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:02:00.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:02:00.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:02:00.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:02:00.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:02:00.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:02:00.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:02:00.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:00.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:00.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:00.707 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:00.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:00.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:00.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:00.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:00.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:00.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:00.708 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:02:00.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:00.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:00.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:00.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:00.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:00.708 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:05.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:05.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:05.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:05.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:05.713 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:05.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:05.722 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:05.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:05.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:05.724 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:05.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:02:05.727 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:02:05.727 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:02:05.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:05.727 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:05.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:05.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:02:05.728 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:05.728 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:02:05.730 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:02:05.730 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:02:05.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:05.731 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:05.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:05.731 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:02:05.731 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:05.731 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:02:05.734 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:02:05.734 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:02:05.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:05.734 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:05.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:05.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:02:05.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:05.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:02:05.738 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:02:05.738 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:02:05.738 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:05.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:05.743 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:02:06.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:02:06.265 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:02:06.267 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:02:06.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:02:06.269 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:02:06.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:02:06.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:02:06.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:02:06.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:02:06.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:02:06.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:02:06.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:02:06.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:02:06.702 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:02:06.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:06.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:06.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:06.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:07.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:02:07.658 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:02:07.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:07.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:07.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:07.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:08.136 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:02:08.613 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:02:08.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:08.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:08.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:08.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:09.091 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:02:09.569 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:02:09.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:09.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:09.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:09.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:10.047 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:02:10.525 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:02:10.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:10.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:10.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:10.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:11.002 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:02:11.480 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:02:11.958 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:02:12.436 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:02:12.914 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:02:13.392 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:02:13.870 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:02:14.348 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:02:14.826 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:02:15.304 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:02:15.781 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:02:16.260 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:02:16.737 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:02:17.215 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:02:17.692 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:02:18.170 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:02:18.647 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:02:19.125 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:02:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:02:20.080 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:02:20.558 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:02:21.036 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:02:21.514 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:02:21.991 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:02:22.469 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:02:22.946 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:02:23.423 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:02:23.900 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:02:24.378 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:02:24.855 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:02:25.333 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:02:25.811 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:02:26.288 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:02:26.766 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:02:27.244 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:02:27.721 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:02:28.199 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:02:28.677 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:02:29.154 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:02:29.632 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:02:30.109 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:02:30.587 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:02:31.065 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:02:31.543 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:02:32.020 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:02:32.498 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:02:32.975 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:02:33.452 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:02:33.930 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:02:34.408 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:02:34.886 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:02:35.363 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:02:35.841 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:02:36.318 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:02:36.796 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:02:37.274 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:02:37.751 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:02:38.228 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:02:38.706 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:02:39.183 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:02:39.661 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:02:39.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:02:39.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:39.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:39.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:39.767 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:02:39.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:39.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:39.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:39.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:39.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:39.768 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7267 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:44.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:44.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:44.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:44.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:44.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:44.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:44.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:44.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:44.785 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:44.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:44.785 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:02:44.790 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:02:44.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:02:44.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:44.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:44.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:44.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:02:44.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:44.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:02:44.794 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:02:44.794 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:02:44.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:44.794 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:44.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:44.794 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:02:44.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:44.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:02:44.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:02:44.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:02:44.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:44.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:44.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:44.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:02:44.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:44.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:02:44.800 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:02:44.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:02:44.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:02:44.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:02:44.800 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:02:44.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:02:44.801 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:02:44.801 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:02:44.801 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:44.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:44.806 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:02:45.289 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:02:45.337 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:02:45.339 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:02:45.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:02:45.341 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:02:45.767 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:02:45.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:45.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:45.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:45.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:46.246 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:02:46.724 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:02:46.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:46.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:46.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:46.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:47.201 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:02:47.679 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:02:47.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:47.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:47.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:47.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:48.158 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:02:48.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:02:48.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:48.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:48.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:48.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:48.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:48.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:48.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:48.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:48.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:48.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:48.367 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=760 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=760 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=760 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=760 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=760 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:48.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:53.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:53.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:53.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:53.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:53.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:53.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:53.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:53.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:53.381 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:53.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:02:53.382 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:02:53.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:02:53.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:02:53.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:53.388 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:53.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:53.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:02:53.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:02:53.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:02:53.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:02:53.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:02:53.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:53.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:53.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:53.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:02:53.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:02:53.393 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:02:53.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:02:53.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:02:53.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:53.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:02:53.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:53.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:02:53.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:02:53.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:02:53.399 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:02:53.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:02:53.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:02:53.400 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:02:53.400 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:02:53.400 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:02:53.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:02:53.405 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:02:53.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:02:53.938 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:02:53.939 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:02:53.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:02:53.941 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:02:54.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:02:54.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:54.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:54.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:54.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:54.844 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:02:55.321 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:02:55.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:55.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:55.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:55.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:55.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:02:56.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:02:56.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:56.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:56.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:56.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:56.757 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:02:57.235 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:02:57.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:57.407 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:57.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:57.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:57.713 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:02:58.192 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:02:58.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:58.408 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:58.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:58.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:58.674 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:02:59.151 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:02:59.630 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:02:59.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:02:59.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:02:59.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:02:59.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:02:59.956 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:02:59.956 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:02:59.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:02:59.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:02:59.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:02:59.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:02:59.956 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:02:59.956 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:59.956 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:59.956 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:59.956 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:59.956 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:02:59.956 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:04.956 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:04.956 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:04.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:04.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:04.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:04.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:04.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:04.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:04.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:04.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:04.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:03:04.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:03:04.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:03:04.970 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:04.970 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:04.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:04.970 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:03:04.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:04.971 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:03:04.973 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:03:04.974 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:03:04.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:04.974 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:04.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:04.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:03:04.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:04.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:03:04.977 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:03:04.977 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:03:04.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:04.977 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:04.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:04.977 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:03:04.977 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:04.977 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:03:04.981 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:03:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:03:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:03:04.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:03:04.981 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:03:04.982 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:03:04.982 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:03:04.982 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.983 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.984 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:04.984 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:04.984 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:04.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:04.987 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:03:05.470 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:03:05.516 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:03:05.518 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:03:05.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:05.521 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:03:05.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:03:05.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:05.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:05.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:05.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:06.432 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:03:06.913 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:03:06.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:06.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:06.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:06.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:03:07.885 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:03:07.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:07.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:08.362 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:03:08.840 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:03:08.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:08.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:08.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:08.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:09.318 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:03:09.796 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:03:09.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:09.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:09.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:09.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:10.274 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:03:10.752 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:03:11.231 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:03:11.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:11.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:11.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:11.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:11.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:11.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:11.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:11.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:11.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:11.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:11.536 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:03:11.536 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:11.536 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:11.536 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:11.537 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:11.537 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:11.537 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:11.537 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:16.538 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:16.538 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:16.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:16.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:16.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:16.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:16.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:16.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:16.546 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:16.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:16.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:03:16.549 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:03:16.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:03:16.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:16.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:16.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:16.549 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:03:16.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:16.549 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:03:16.552 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:03:16.553 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:03:16.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:16.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:16.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:16.553 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:03:16.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:16.553 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:03:16.556 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:03:16.556 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:03:16.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:16.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:16.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:16.556 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:03:16.557 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:16.557 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:03:16.560 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:03:16.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:03:16.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:03:16.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:03:16.560 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:03:16.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:03:16.561 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:03:16.561 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:03:16.561 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:03:16.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:16.566 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:03:17.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:03:17.095 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:03:17.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:17.099 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:03:17.101 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:03:17.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:03:17.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:17.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:17.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:17.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:18.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:03:18.490 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:03:18.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:18.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:18.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:18.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:18.971 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:03:19.451 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:03:19.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:19.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:19.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:19.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:19.932 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:03:20.412 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:03:20.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:20.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:20.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:20.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:20.891 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:03:21.370 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:03:21.570 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:21.570 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:21.571 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:21.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:21.848 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:03:22.327 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:03:22.805 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:03:23.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:23.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:23.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:23.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:23.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:23.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:23.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:23.116 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:23.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:23.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:23.117 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:03:23.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:23.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:23.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:23.117 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:28.118 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:28.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:28.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:28.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:28.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:28.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:28.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:28.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:28.131 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:28.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:28.131 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:03:28.135 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:03:28.135 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:03:28.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:28.135 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:28.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:28.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:03:28.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:28.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:03:28.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:03:28.139 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:03:28.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:28.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:28.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:28.140 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:03:28.140 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:28.140 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:03:28.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:03:28.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:03:28.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:28.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:28.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:28.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:03:28.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:28.144 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:03:28.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:03:28.148 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:03:28.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:28.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:28.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:03:28.637 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:03:28.676 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:03:28.678 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:03:28.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:28.680 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:03:29.114 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:03:29.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:29.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:29.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:29.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:29.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:03:30.070 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:03:30.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:30.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:30.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:30.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:30.549 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:03:31.027 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:03:31.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:31.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:31.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:31.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:03:31.982 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:03:32.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:32.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:32.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:32.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:32.460 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:03:32.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:32.938 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:03:33.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:33.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:33.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:33.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:33.417 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:03:33.896 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:03:34.374 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:03:34.855 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:03:35.333 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:03:35.811 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:03:36.289 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:03:36.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:36.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:36.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:36.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:36.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:36.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:36.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:36.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:36.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:36.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:36.718 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:03:36.718 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:36.718 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:36.718 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:36.718 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:36.718 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:36.718 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1829 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:41.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:41.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:41.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:41.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:41.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:41.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:41.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:41.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:41.735 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:41.735 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:41.735 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:03:41.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:03:41.741 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:03:41.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:41.741 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:41.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:41.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:03:41.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:41.742 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:03:41.746 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:03:41.746 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:03:41.746 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:41.746 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:41.746 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:41.746 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:03:41.747 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:41.747 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:03:41.750 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:03:41.750 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:03:41.750 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:41.751 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:41.751 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:41.751 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:03:41.751 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:41.751 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:03:41.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:03:41.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:03:41.756 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:03:41.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:41.761 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:03:42.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:03:42.289 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:03:42.289 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:03:42.291 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:03:42.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:42.720 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:03:42.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:42.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:42.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:42.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:43.198 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:03:43.676 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:03:43.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:43.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:43.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:43.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:44.153 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:03:44.632 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:03:44.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:44.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:44.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:44.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:45.110 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:03:45.589 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:03:45.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:45.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:45.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:45.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:46.069 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:03:46.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:46.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:46.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:46.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:46.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:46.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:46.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:46.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:46.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:46.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:46.307 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:03:46.308 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=971 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:46.308 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=971 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:46.308 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=971 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:46.308 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=971 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:46.308 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=971 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:46.308 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=971 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:51.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:51.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:51.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:51.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:51.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:51.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:51.317 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:51.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:51.319 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:51.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:51.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:03:51.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:03:51.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:03:51.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:51.324 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:51.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:51.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:03:51.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:51.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:03:51.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:03:51.327 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:03:51.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:51.327 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:51.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:51.327 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:03:51.327 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:51.327 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:03:51.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:03:51.330 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:03:51.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:51.330 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:51.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:51.330 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:03:51.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:51.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:03:51.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:03:51.333 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:03:51.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:51.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:51.338 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:03:51.822 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:03:51.867 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:03:51.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:51.871 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:03:51.873 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:03:51.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:51.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:51.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:51.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:51.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:51.888 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:51.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:51.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:51.888 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:03:51.889 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:51.889 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:51.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:51.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:51.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:51.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:51.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:51.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:51.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:56.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:56.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:56.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:56.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:56.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:56.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:56.895 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:56.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:56.896 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:56.896 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:03:56.896 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:03:56.900 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:03:56.900 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:03:56.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:56.900 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:56.900 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:56.900 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:03:56.900 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:03:56.900 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:03:56.904 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:03:56.904 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:03:56.904 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:56.904 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:56.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:56.904 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:03:56.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:03:56.905 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:03:56.908 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:03:56.908 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:03:56.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:56.908 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:03:56.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:56.908 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:03:56.908 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:03:56.909 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:03:56.913 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:03:56.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:03:56.913 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:03:56.913 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:03:56.913 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:03:56.913 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:03:56.914 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:03:56.914 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:03:56.914 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:03:56.914 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:03:56.919 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:03:57.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:03:57.451 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:03:57.453 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:03:57.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:57.456 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:03:57.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:03:57.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:03:57.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:03:57.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:03:57.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:03:57.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:03:57.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:03:57.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:03:57.477 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:03:57.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:03:57.477 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:03:57.477 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:03:57.477 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:57.477 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:57.477 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:57.477 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:57.478 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:03:57.478 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:02.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:02.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:02.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:02.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:02.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:02.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:02.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:02.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:02.486 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:02.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:02.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:04:02.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:04:02.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:04:02.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:02.489 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:02.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:02.490 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:04:02.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:02.490 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:04:02.492 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:04:02.492 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:04:02.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:02.492 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:02.492 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:02.492 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:04:02.492 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:02.493 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:04:02.495 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:04:02.495 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:04:02.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:02.495 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:02.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:02.495 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:04:02.495 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:02.495 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:04:02.497 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:04:02.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:04:02.498 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:04:02.498 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:04:02.498 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.499 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:02.503 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:04:02.986 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:04:03.024 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:04:03.026 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:04:03.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:03.028 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:04:03.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:03.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:03.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:03.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:03.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:03.043 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:03.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:03.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:03.043 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:03.043 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:03.043 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:04:03.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:03.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:03.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:03.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:03.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:03.043 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:08.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:08.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:08.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:08.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:08.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:08.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:08.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:08.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:08.055 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:08.055 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:08.055 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:04:08.058 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:04:08.058 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:04:08.058 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:08.058 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:08.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:08.059 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:04:08.059 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:08.059 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:04:08.063 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:04:08.063 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:04:08.063 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:08.063 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:08.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:08.063 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:04:08.064 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:08.064 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:04:08.066 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:04:08.066 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:04:08.066 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:08.066 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:08.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:08.067 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:04:08.067 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:08.067 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:04:08.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:04:08.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:04:08.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:04:08.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:04:08.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:04:08.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:04:08.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:04:08.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:04:08.070 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:04:08.070 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:08.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:04:08.557 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:04:08.605 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:04:08.607 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:04:08.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:08.609 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:04:08.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:08.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:08.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:04:08.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:08.617 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:04:08.617 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:04:08.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:04:08.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:04:09.035 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:04:09.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:09.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:09.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:09.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:09.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:04:09.991 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:04:10.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:10.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:10.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:10.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:10.468 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:04:10.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:04:11.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:11.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:11.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:11.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:11.423 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:04:11.667 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:04:11.667 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:04:11.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:11.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:11.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:11.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:11.712 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:04:11.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:11.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:11.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:11.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:11.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:11.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:11.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:11.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:11.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:11.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:11.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:11.719 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=779 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=779 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.719 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:11.720 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=780 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:16.721 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:16.721 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:16.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:16.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:16.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:16.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:16.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:16.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:16.734 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:16.734 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:16.734 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:04:16.737 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:04:16.738 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:04:16.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:16.738 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:16.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:16.739 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:04:16.739 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:16.739 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:04:16.742 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:04:16.742 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:04:16.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:16.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:16.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:16.743 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:04:16.743 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:16.743 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:04:16.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:04:16.746 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:04:16.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:16.746 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:16.746 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:16.746 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:04:16.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:16.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:04:16.750 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:04:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:04:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:04:16.750 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:04:16.750 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:04:16.751 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:04:16.751 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:04:16.751 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.751 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:16.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:16.756 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:04:17.240 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:04:17.284 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:04:17.286 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:04:17.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:17.289 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:04:17.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:17.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:17.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:04:17.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:17.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:04:17.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:04:17.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:04:17.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:04:17.717 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:04:17.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:17.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:17.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:17.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:18.195 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:04:18.673 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:04:18.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:18.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:18.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:18.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:19.151 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:04:19.629 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:04:19.757 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:19.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:19.757 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:19.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:20.106 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:04:20.349 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:04:20.349 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:04:20.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:20.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:20.584 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:04:20.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:20.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:20.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:20.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:21.062 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:04:21.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:21.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:21.074 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:04:21.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:21.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:21.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:21.081 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:04:21.081 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:21.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:21.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:21.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:21.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:21.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:21.082 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:26.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:26.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:26.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:26.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:26.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:26.088 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:26.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:26.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:26.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:26.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:26.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:04:26.099 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:04:26.100 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:04:26.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:26.100 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:26.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:26.101 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:04:26.101 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:26.101 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:04:26.103 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:04:26.103 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:04:26.103 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:26.103 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:26.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:26.103 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:04:26.104 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:26.104 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:04:26.106 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:04:26.106 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:04:26.106 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:26.106 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:26.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:26.106 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:04:26.107 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:26.107 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:04:26.109 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:04:26.109 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:04:26.109 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:04:26.110 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:26.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:26.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:26.114 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:04:26.596 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:04:26.643 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:04:26.645 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:04:26.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:26.647 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:04:26.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:26.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:26.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:04:26.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:26.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:04:26.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:04:26.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:04:26.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:04:27.074 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:04:27.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:27.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:27.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:27.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:27.552 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:04:28.029 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:04:28.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:28.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:28.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:28.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:28.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:04:28.985 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:04:29.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:29.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:29.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:29.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:04:29.705 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:04:29.706 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:04:29.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:29.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:29.941 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:04:30.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:30.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:30.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:30.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:30.419 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:04:30.897 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:04:31.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:31.115 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:31.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:31.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:31.376 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:04:31.854 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:04:32.332 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:04:32.810 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:04:33.288 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:04:33.766 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:04:34.244 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:04:34.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:34.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:34.709 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:04:34.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:34.722 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:04:34.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:34.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:34.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:34.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:34.727 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:34.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:34.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:34.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:34.727 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:34.727 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:34.727 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:04:39.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:39.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:39.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:39.731 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:39.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:39.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:39.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:39.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:39.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:39.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:39.749 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:04:39.754 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:04:39.754 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:04:39.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:39.754 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:39.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:39.754 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:04:39.754 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:39.755 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:04:39.757 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:04:39.757 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:04:39.757 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:39.757 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:39.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:39.758 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:04:39.758 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:39.758 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:04:39.761 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:04:39.761 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:04:39.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:39.761 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:39.761 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:04:39.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:39.761 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:39.761 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.765 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:04:39.765 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:04:39.765 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:04:39.766 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:39.766 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:39.770 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:04:40.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:04:40.299 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:04:40.302 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:04:40.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:40.304 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:04:40.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:40.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:40.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:04:40.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:40.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:04:40.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:04:40.313 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:04:40.313 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:04:40.731 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:04:40.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:40.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:40.769 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:40.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:41.208 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:04:41.686 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:04:41.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:41.769 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:41.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:41.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:42.164 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:04:42.641 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:04:42.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:42.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:42.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:42.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:43.119 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:04:43.363 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:04:43.363 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:04:43.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:43.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:43.597 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:04:43.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:43.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:43.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:43.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:44.075 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:04:44.553 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:04:44.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:44.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:44.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:44.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:45.031 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:04:45.510 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:04:45.987 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:04:46.464 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:04:46.943 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:04:47.421 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:04:47.899 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:04:48.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:48.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:48.368 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:04:48.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:48.377 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:04:48.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:48.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:48.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:48.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:48.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:48.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:48.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:48.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:48.387 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:04:48.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:48.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:48.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:48.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:48.387 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:48.388 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:48.388 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:04:53.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:04:53.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:04:53.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:53.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:53.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:53.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:53.389 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:04:53.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:53.389 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:53.389 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:04:53.389 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:04:53.390 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:04:53.390 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:04:53.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:53.390 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:53.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:04:53.390 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:04:53.390 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:04:53.390 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:04:53.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:04:53.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:04:53.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:53.391 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:53.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:04:53.391 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:04:53.391 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:04:53.391 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:04:53.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:04:53.392 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:04:53.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:53.392 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:04:53.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:04:53.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:04:53.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:04:53.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:04:53.394 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:04:53.394 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:04:53.394 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:04:53.399 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:04:53.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:04:53.915 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:04:53.916 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:04:53.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:04:53.918 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:04:53.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:04:53.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:04:53.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:04:53.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:53.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:04:53.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:04:53.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:04:53.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:04:54.378 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:04:54.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:54.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:54.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:54.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:54.855 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:04:55.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:04:55.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:55.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:55.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:55.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:55.810 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:04:56.288 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:04:56.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:56.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:56.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:56.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:56.766 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:04:56.991 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:04:56.991 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:04:56.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:56.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:04:57.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:04:57.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:57.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:57.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:57.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:57.722 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:04:58.201 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:04:58.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:04:58.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:04:58.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:04:58.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:04:58.679 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:04:59.157 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:04:59.635 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:05:00.113 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:05:00.591 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:05:01.069 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:05:01.547 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:05:01.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:01.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:01.994 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:05:01.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:02.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:02.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:02.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:02.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:02.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:02.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:02.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:02.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:02.013 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:05:02.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:02.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:02.013 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:02.013 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:02.013 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:02.013 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:02.013 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:07.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:07.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:07.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:07.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:07.018 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:07.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:07.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:07.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:07.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:07.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:07.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:05:07.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:05:07.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:05:07.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:07.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:07.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:07.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:05:07.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:07.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:05:07.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:05:07.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:05:07.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:07.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:07.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:07.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:05:07.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:07.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:05:07.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:05:07.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:05:07.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:07.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:07.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:07.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:05:07.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:07.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:05:07.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:05:07.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:05:07.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:05:07.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:05:07.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:05:07.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:05:07.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:05:07.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:05:07.050 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:05:07.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:07.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:05:07.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:05:07.579 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:05:07.582 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:05:07.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:07.584 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:05:07.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:07.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:07.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:05:07.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:07.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:05:07.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:05:07.595 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:05:07.595 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:05:07.630 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:05:07.630 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:05:07.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:07.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:08.016 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:05:08.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:08.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:08.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:08.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:08.493 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:05:08.971 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:05:09.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:09.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:09.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:09.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:09.449 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:05:09.927 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:05:10.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:10.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:10.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:10.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:10.405 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:05:10.883 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:05:11.057 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:11.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:11.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:11.058 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:11.362 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:05:11.841 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:05:12.058 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:12.058 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:12.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:12.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:12.319 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:05:12.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:12.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:12.632 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:05:12.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:12.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:12.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:12.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:12.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:12.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:12.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:12.647 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:05:12.647 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1194 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:12.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:12.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:12.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:12.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1194 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:12.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1194 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:12.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1194 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:12.648 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1194 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:17.646 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:17.646 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:17.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:17.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:17.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:17.653 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:17.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:17.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:17.667 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:17.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:17.668 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:05:17.670 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:05:17.670 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:05:17.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:17.671 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:17.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:17.671 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:05:17.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:17.672 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:05:17.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:05:17.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:05:17.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:17.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:17.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:17.675 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:05:17.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:17.675 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:05:17.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:05:17.677 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:05:17.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:17.677 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:17.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:17.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:05:17.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:17.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.681 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:05:17.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:05:17.682 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:05:17.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:17.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:17.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:05:18.170 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:05:18.214 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:05:18.216 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:05:18.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:18.218 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:05:18.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:18.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:18.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:05:18.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:18.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:05:18.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:05:18.228 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:05:18.228 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:05:18.647 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:05:18.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:18.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:18.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:18.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:19.125 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:05:19.603 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:05:19.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:19.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:19.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:19.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:20.080 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:05:20.558 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:05:20.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:20.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:20.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:20.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:21.035 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:05:21.278 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:05:21.278 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:05:21.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:21.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:21.514 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:05:21.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:21.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:21.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:21.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:21.992 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:05:22.470 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:05:22.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:22.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:22.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:22.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:22.948 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:05:23.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:23.281 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:23.281 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:05:23.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:23.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:23.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:23.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:23.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:23.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:23.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:23.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:23.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:23.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:23.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:23.293 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:05:23.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:23.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:23.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:23.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:23.293 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:28.294 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:28.294 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:28.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:28.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:28.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:28.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:28.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:28.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:28.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:28.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:28.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:05:28.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:05:28.315 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:05:28.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:28.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:28.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:28.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:05:28.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:28.317 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:05:28.318 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:05:28.318 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:05:28.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:28.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:28.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:28.319 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:05:28.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:28.319 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:05:28.321 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:05:28.321 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:05:28.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:28.321 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:28.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:28.321 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:05:28.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:28.321 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:05:28.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:05:28.324 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:05:28.324 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:05:28.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:28.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:05:28.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:05:28.855 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:05:28.859 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:05:28.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:28.861 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:05:28.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:28.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:28.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:05:28.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:28.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:05:28.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:05:28.872 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:05:28.872 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:05:29.291 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:05:29.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:29.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:29.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:29.768 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:05:30.246 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:05:30.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:30.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:30.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:30.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:30.724 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:05:31.202 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:05:31.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:31.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:31.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:31.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:31.679 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:05:31.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:31.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:31.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:31.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:31.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:31.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:31.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:31.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:31.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:31.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:31.984 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=781 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:31.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:31.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=781 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=781 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:31.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=782 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:36.988 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:36.988 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:36.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:36.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:36.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:36.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:36.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:36.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:36.998 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:36.998 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:36.998 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:05:37.000 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:05:37.000 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:05:37.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:37.000 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:37.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:37.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:05:37.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:37.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:05:37.005 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:05:37.005 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:05:37.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:37.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:37.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:37.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:05:37.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:37.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:05:37.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:05:37.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:05:37.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:37.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:37.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:37.010 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:05:37.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:37.010 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:05:37.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:05:37.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:05:37.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:05:37.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:05:37.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:05:37.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:05:37.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:05:37.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:05:37.016 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:05:37.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:37.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:05:37.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:05:37.550 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:05:37.552 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:05:37.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:37.555 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:05:37.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:37.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:37.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:05:37.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:37.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:05:37.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:05:37.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:05:37.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:05:37.981 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:05:38.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:38.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:38.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:38.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:38.459 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:05:38.937 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:05:39.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:39.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:39.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:39.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:39.415 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:05:39.892 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:05:40.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:40.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:40.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:40.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:40.370 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:05:40.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:40.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:40.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:40.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:40.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:40.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:40.692 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:40.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:40.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:40.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:40.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:40.693 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:40.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:40.693 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:05:40.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:40.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:40.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:40.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:40.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:40.693 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:45.694 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:45.694 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:45.696 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:45.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:45.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:45.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:45.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:45.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:45.707 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:45.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:45.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:05:45.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:05:45.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:05:45.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:45.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:45.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:45.710 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:05:45.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:45.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:05:45.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:05:45.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:05:45.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:45.713 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:45.713 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:45.713 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:05:45.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:45.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:05:45.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:05:45.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:05:45.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:45.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:45.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:45.715 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:05:45.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:45.715 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:05:45.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:05:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:05:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:05:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:05:45.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:05:45.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:05:45.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:05:45.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:05:45.719 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:05:45.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:45.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:45.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:05:46.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:05:46.250 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:05:46.252 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:05:46.254 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:05:46.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:46.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:46.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:46.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:05:46.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:46.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:05:46.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:05:46.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:05:46.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:05:46.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:46.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:46.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:46.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:46.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:46.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:46.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:46.529 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:46.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:46.529 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:05:46.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:46.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:46.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:46.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:46.529 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:51.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:51.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:51.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:51.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:51.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:51.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:51.533 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:51.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:51.534 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:51.534 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:51.534 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:05:51.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:05:51.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:05:51.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:51.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:51.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:51.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:05:51.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:51.536 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:05:51.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:05:51.539 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:05:51.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:51.539 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:51.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:51.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:05:51.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:51.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:05:51.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:05:51.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:05:51.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:51.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:51.543 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:51.543 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:05:51.543 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:51.543 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:05:51.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:05:51.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:05:51.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:05:51.548 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:05:51.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:51.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:51.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:05:52.036 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:05:52.083 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:05:52.085 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:05:52.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:52.088 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:05:52.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:52.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:52.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:05:52.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:52.098 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:05:52.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:05:52.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:05:52.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:05:52.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:52.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:52.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:52.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:52.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:52.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:52.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:52.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:52.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:52.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:52.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:52.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:52.313 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:05:52.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:52.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:52.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:52.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:52.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:52.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:52.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:05:57.314 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:05:57.314 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:05:57.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:57.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:57.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:57.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:57.326 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:05:57.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:57.327 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:57.327 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:05:57.327 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:05:57.329 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:05:57.329 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:05:57.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:57.330 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:57.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:05:57.330 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:05:57.330 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:05:57.330 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:05:57.332 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:05:57.332 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:05:57.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:57.332 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:57.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:05:57.332 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:05:57.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:05:57.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:05:57.334 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:05:57.334 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:05:57.334 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:57.334 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:05:57.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:05:57.335 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:05:57.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:05:57.335 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.339 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:05:57.339 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:05:57.339 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:05:57.340 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:05:57.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:05:57.344 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:05:57.827 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:05:57.872 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:05:57.874 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:05:57.876 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:05:57.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:05:57.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:05:57.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:05:57.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:05:57.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:05:57.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:05:57.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:05:57.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:05:57.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:05:58.304 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:05:58.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:58.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:58.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:58.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:58.781 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:05:59.259 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:05:59.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:05:59.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:05:59.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:05:59.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:05:59.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:06:00.216 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:06:00.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:00.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:00.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:00.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:00.693 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:06:01.172 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:06:01.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:01.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:01.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:01.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:01.650 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:06:02.128 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:06:02.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:02.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:02.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:02.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:02.606 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:06:03.083 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:06:03.561 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:06:04.039 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:06:04.517 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:06:04.994 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:06:05.472 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:06:05.950 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:06:06.428 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:06:06.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:06:06.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:06:06.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:06.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:06.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:06.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:06.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:06.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:06.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:06.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:06.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:06.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:06.784 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:06:06.784 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:06.784 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:06.784 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:06.784 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:06.784 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:11.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:11.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:11.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:11.788 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:11.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:11.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:11.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:11.802 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:11.802 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:11.803 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:11.803 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:06:11.805 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:06:11.805 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:06:11.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:11.806 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:11.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:11.806 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:06:11.806 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:11.806 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:06:11.809 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:06:11.809 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:06:11.809 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:11.810 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:11.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:11.810 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:06:11.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:11.811 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:06:11.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:06:11.813 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:06:11.813 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:11.813 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:11.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:11.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:06:11.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:11.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.819 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:06:11.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:06:11.820 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:06:11.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:06:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:06:11.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:11.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:11.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:11.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:06:12.308 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:06:12.350 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:06:12.352 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:06:12.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:06:12.355 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:06:12.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:06:12.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:06:12.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:06:12.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:06:12.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:06:12.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:06:12.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:06:12.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:06:12.786 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:06:12.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:12.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:12.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:12.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:13.263 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:06:13.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:06:13.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:13.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:13.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:13.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:14.219 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:06:14.696 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:06:14.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:14.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:14.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:14.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:15.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:06:15.652 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:06:15.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:15.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:15.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:15.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:16.130 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:06:16.608 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:06:16.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:16.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:16.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:16.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:17.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:06:17.563 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:06:18.041 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:06:18.519 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:06:18.997 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:06:19.475 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:06:19.953 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:06:20.430 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:06:20.908 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:06:21.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:06:21.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:06:21.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:21.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:21.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:21.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:21.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:21.298 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:21.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:21.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:21.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:21.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:21.298 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:06:21.298 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2024 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:21.298 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2024 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:21.298 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2024 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:21.298 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2024 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:21.298 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2024 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:21.298 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2024 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:26.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:26.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:26.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:26.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:26.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:26.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:26.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:26.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:26.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:26.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:26.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:06:26.314 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:06:26.314 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:06:26.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:26.315 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:26.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:26.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:06:26.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:26.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:06:26.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:06:26.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:06:26.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:26.318 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:26.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:26.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:06:26.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:26.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:06:26.320 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:06:26.320 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:06:26.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:26.320 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:26.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:26.320 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:06:26.320 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:26.320 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:06:26.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:06:26.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:06:26.324 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:06:26.324 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:26.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:06:26.809 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:06:26.857 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:06:26.859 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:06:26.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:06:26.861 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:06:26.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:06:26.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:06:26.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:06:26.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:06:26.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:06:26.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:06:26.870 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:06:26.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:06:27.286 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:06:27.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:27.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:27.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:27.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:27.764 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:06:28.242 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:06:28.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:28.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:28.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:28.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:28.720 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:06:29.198 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:06:29.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:29.329 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:29.675 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:06:29.918 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:06:29.918 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-02-19 05:06:29.918 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:06:29.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:06:29.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:06:30.153 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:06:30.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:30.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:30.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:30.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:30.631 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:06:30.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:06:30.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:06:30.954 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:06:30.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:06:30.962 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:30.962 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:30.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:30.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:30.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:30.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:30.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:30.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:30.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:30.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:30.966 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:06:30.966 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:30.966 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:30.967 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:30.967 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:30.967 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:30.967 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:06:35.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:35.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:35.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:35.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:35.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:35.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:35.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:35.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:35.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:35.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:35.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:06:35.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:06:35.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:06:35.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:35.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:35.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:35.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:06:35.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:35.995 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:06:35.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:06:35.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:06:35.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:35.998 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:35.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:35.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:06:35.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:35.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:06:36.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:06:36.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:06:36.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:36.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:36.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:36.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:06:36.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:36.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:06:36.004 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:06:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:06:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:06:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:06:36.004 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:06:36.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:06:36.005 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:06:36.005 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:06:36.005 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:36.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:36.010 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:06:36.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:06:36.532 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:06:36.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:06:36.536 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:06:36.539 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:06:36.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:36.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:36.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:36.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:36.650 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:36.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:36.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:36.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:36.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:36.650 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:06:36.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:41.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:41.653 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:41.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:41.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:41.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:41.658 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:41.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:41.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:41.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:41.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:41.666 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:06:41.669 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:06:41.670 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:06:41.670 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:41.670 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:41.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:41.670 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:06:41.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:41.671 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:06:41.672 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:06:41.673 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:06:41.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:41.673 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:41.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:41.673 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:06:41.673 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:41.673 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:06:41.675 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:06:41.675 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:06:41.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:41.675 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:41.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:41.675 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:06:41.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:41.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.678 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:06:41.678 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:06:41.678 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:06:41.678 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:41.683 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:06:42.166 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:06:42.205 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:06:42.207 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:06:42.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:06:42.209 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:06:42.644 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:06:42.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:42.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:42.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:42.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:43.121 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:06:43.599 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:06:43.683 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:43.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:43.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:43.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:44.077 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:06:44.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:06:44.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:44.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:44.684 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:44.684 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:45.035 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:06:45.513 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:06:45.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:45.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:45.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:45.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:45.992 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:06:46.470 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:06:46.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:46.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:46.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:46.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:46.951 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:06:47.432 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:06:47.910 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:06:48.388 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:06:48.866 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:06:49.344 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:06:49.822 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:06:50.300 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:06:50.778 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:06:51.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:06:51.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:51.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:51.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:51.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:51.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:51.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:51.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:51.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:51.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:51.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:51.244 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:06:56.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:06:56.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:06:56.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:56.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:56.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:56.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:56.257 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:06:56.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:56.258 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:56.258 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:06:56.258 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:06:56.261 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:06:56.261 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:06:56.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:56.262 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:56.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:06:56.262 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:06:56.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:06:56.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:06:56.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:06:56.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:06:56.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:56.265 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:56.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:06:56.265 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:06:56.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:06:56.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:06:56.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:06:56.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:06:56.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:56.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:06:56.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:06:56.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:06:56.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:06:56.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:06:56.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:06:56.271 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:06:56.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:06:56.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:06:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:06:56.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:06:56.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:06:56.759 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:06:56.800 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:06:56.802 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:06:56.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:06:56.804 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:06:57.238 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:06:57.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:57.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:57.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:57.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:57.719 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:06:58.198 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:06:58.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:58.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:58.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:58.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:58.676 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:06:59.153 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:06:59.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:06:59.276 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:06:59.276 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:06:59.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:06:59.631 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:07:00.109 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:07:00.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:00.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:00.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:00.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:00.587 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:07:01.065 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:07:01.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:01.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:01.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:01.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:01.544 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:07:02.022 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:07:02.500 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:07:02.978 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:07:03.457 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:07:03.935 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:07:04.413 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:07:04.891 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:07:05.370 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:07:05.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:05.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:05.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:05.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:05.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:05.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:05.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:05.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:05.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:05.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:05.841 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:05.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:10.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:10.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:10.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:10.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:10.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:10.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:10.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:10.856 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:10.856 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:10.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:10.857 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:07:10.860 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:07:10.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:07:10.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:10.861 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:10.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:10.861 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:07:10.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:10.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:07:10.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:07:10.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:07:10.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:10.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:10.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:10.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:07:10.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:10.866 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:07:10.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:07:10.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:07:10.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:10.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:10.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:10.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:07:10.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:10.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:07:10.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:07:10.871 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:07:10.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:10.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:10.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:07:11.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:07:11.400 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:07:11.403 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:07:11.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:11.405 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:07:11.839 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:07:11.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:11.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:11.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:11.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:12.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:07:12.797 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:07:12.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:12.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:12.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:12.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:13.276 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:07:13.754 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:07:13.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:13.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:14.232 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:07:14.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:14.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:14.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:14.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:14.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:14.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:14.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:14.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:14.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:14.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:14.446 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:14.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:19.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:19.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:19.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:19.452 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:19.452 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:19.452 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:19.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:19.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:19.461 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:19.461 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:19.461 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:07:19.466 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:07:19.466 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:07:19.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:19.466 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:19.466 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:19.466 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:07:19.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:19.467 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:07:19.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:07:19.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:07:19.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:19.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:19.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:19.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:07:19.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:19.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:07:19.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:07:19.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:07:19.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:19.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:19.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:19.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:07:19.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:19.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:07:19.477 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:07:19.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:07:19.478 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:07:19.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:19.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:19.483 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:07:19.966 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:07:20.006 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:07:20.008 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:07:20.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:20.010 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:07:20.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:20.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:20.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:07:20.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:07:20.051 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:07:20.051 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:07:20.051 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:07:20.051 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:07:20.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:20.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:07:20.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:07:20.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:07:20.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:07:20.443 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:07:20.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:20.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:07:20.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:20.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:20.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:20.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:20.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:20.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:20.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:20.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:20.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:20.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:20.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:20.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:20.460 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:20.460 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:20.460 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:20.460 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:20.460 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:20.460 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:20.460 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:25.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:25.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:25.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:25.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:25.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:25.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:25.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:25.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:25.475 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:25.476 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:25.476 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:07:25.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:07:25.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:07:25.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:25.480 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:25.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:25.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:07:25.481 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:25.481 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:07:25.483 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:07:25.483 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:07:25.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:25.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:25.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:25.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:07:25.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:25.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:07:25.487 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:07:25.487 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:07:25.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:25.487 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:25.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:25.487 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:07:25.487 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:25.487 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:07:25.491 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:07:25.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:07:25.491 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:07:25.491 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:07:25.491 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:07:25.491 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:07:25.492 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:07:25.492 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:07:25.492 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.492 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:25.497 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:07:25.982 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:07:26.025 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:07:26.027 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:07:26.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:26.030 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:07:26.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:26.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:26.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:26.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:26.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:26.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:26.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:26.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:26.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:26.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:26.046 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:26.046 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:26.046 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:26.046 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:26.046 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:26.046 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:26.046 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:31.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:31.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:31.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:31.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:31.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:31.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:31.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:31.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:31.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:31.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:31.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:07:31.060 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:07:31.061 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:07:31.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:31.061 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:31.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:31.062 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:07:31.062 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:31.062 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:07:31.065 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:07:31.065 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:07:31.066 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:31.066 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:31.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:31.066 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:07:31.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:31.067 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:07:31.069 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:07:31.069 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:07:31.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:31.070 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:31.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:31.070 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:07:31.070 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:31.070 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.075 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:07:31.076 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:07:31.076 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:07:31.076 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:07:31.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:07:31.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:31.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:31.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:31.081 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:07:31.565 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:07:31.606 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:07:31.608 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:07:31.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:31.610 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:07:32.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:07:32.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:32.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:32.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:32.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:32.520 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:07:32.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:07:33.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:33.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:33.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:33.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:33.476 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:07:33.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:33.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:33.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:33.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:33.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:33.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:33.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:33.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:33.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:33.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:33.630 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:33.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=545 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:33.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=545 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:33.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=545 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:33.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=545 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:33.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=545 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:33.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=545 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:33.630 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=545 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:38.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:38.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:38.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:38.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:38.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:38.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:38.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:38.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:38.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:38.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:38.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:07:38.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:07:38.646 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:07:38.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:38.646 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:38.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:38.647 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:07:38.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:38.647 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:07:38.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:07:38.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:07:38.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:38.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:38.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:38.650 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:07:38.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:38.650 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:07:38.655 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:07:38.655 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:07:38.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:38.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:38.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:38.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:07:38.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:38.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:07:38.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:07:38.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:07:38.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:07:38.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:07:38.660 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:07:38.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:07:38.661 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:07:38.661 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:07:38.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:38.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:38.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:07:39.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:07:39.193 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:07:39.196 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:07:39.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:39.196 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:07:39.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:39.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:39.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:07:39.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:07:39.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:07:39.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:07:39.200 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:07:39.200 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:07:39.628 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:07:39.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:39.666 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:39.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:39.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:40.105 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:07:40.583 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:07:40.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:40.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:40.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:40.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:41.061 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:07:41.539 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:07:41.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:41.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:41.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:41.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:42.016 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:07:42.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:42.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:42.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:42.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:42.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:42.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:42.042 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:42.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:42.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:42.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:42.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:42.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:42.042 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:47.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:47.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:47.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:47.047 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:47.047 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:47.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:47.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:47.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:47.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:47.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:47.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:07:47.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:07:47.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:07:47.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:47.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:47.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:47.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:07:47.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:47.075 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:07:47.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:07:47.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:07:47.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:47.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:47.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:47.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:07:47.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:47.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:07:47.081 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:07:47.081 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:07:47.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:47.081 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:47.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:47.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:07:47.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:47.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:07:47.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:07:47.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:07:47.085 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:07:47.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:47.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:47.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:07:47.574 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:07:47.617 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:07:47.619 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:07:47.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:47.622 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:07:47.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:47.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:47.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:07:47.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:07:47.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:07:47.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:07:47.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:07:47.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:07:48.051 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:07:48.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:48.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:48.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:48.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:48.529 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:07:49.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:07:49.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:49.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:49.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:49.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:49.484 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:07:49.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:49.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:49.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:49.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:49.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:49.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:49.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:49.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:49.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:49.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:49.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:49.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:49.743 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:49.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:54.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:54.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:54.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:54.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:54.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:54.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:54.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:54.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:54.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:54.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:07:54.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:07:54.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:07:54.764 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:07:54.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:54.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:54.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:54.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:07:54.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:07:54.766 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:07:54.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:07:54.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:07:54.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:54.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:54.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:54.769 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:07:54.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:07:54.769 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:07:54.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:07:54.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:07:54.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:54.771 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:07:54.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:54.771 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:07:54.771 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:07:54.771 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:07:54.775 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:07:54.775 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:07:54.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:07:54.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:07:54.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:07:55.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:07:55.306 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:07:55.308 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:07:55.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:07:55.310 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:07:55.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:55.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:55.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:07:55.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:07:55.317 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:07:55.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:07:55.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:07:55.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:07:55.740 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:07:55.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:55.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:55.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:55.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:56.218 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:07:56.696 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:07:56.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:56.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:56.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:56.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:57.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:07:57.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:07:57.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:57.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:57.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:57.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:58.129 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:07:58.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:07:58.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:07:58.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:07:58.156 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:07:58.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:07:58.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:07:58.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:07:58.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:07:58.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:07:58.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:07:58.159 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:07:58.159 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:07:58.159 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:07:58.160 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:58.160 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:58.160 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:58.160 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:58.160 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:58.160 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:07:58.160 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=722 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:03.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:03.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:03.160 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:03.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:03.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:03.162 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:03.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:03.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:03.170 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:03.170 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:03.170 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:03.172 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:03.172 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:03.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:03.173 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:03.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:03.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:03.174 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:03.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:03.176 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:03.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:03.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:03.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:03.176 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:03.176 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:03.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:03.176 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:03.178 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:03.178 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:03.178 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:03.178 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:03.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:03.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:03.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:03.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:03.181 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:03.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:03.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:03.182 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:03.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:03.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:03.670 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:03.713 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:03.716 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:03.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:03.718 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:03.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:03.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:03.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:08:03.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:08:03.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:08:03.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:08:03.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:08:03.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:08:04.147 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:08:04.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:04.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:04.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:04.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:04.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:08:05.103 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:08:05.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:05.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:05.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:05.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:05.581 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:08:05.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:05.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:05.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:05.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:05.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:05.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:05.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:05.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:05.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:05.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:05.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:05.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:05.845 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:05.845 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:10.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:10.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:10.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:10.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:10.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:10.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:10.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:10.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:10.858 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:10.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:10.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:10.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:10.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:10.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:10.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:10.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:10.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:10.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:10.862 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:10.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:10.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:10.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:10.864 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:10.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:10.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:10.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:10.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:10.866 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:10.866 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:10.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:10.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:10.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:10.867 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:10.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:10.867 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:10.870 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:10.870 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:10.871 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:10.871 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:10.871 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:10.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:10.876 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:11.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:11.409 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:11.411 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:11.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:11.413 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:11.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:11.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:11.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:08:11.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:08:11.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:08:11.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:08:11.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:08:11.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:08:11.837 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:08:11.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:11.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:11.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:11.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:12.315 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:08:12.792 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:08:12.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:12.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:12.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:12.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:13.270 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:08:13.748 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:08:13.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:13.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:13.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:13.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:14.225 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:08:14.703 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:08:14.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:14.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:14.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:14.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:15.181 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:08:15.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:15.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:15.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:15.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:15.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:15.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:15.209 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:15.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:15.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:15.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:15.209 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:15.209 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:15.209 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:15.209 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:15.209 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:15.209 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:15.210 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:15.210 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:15.210 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:20.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:20.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:20.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:20.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:20.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:20.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:20.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:20.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:20.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:20.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:20.224 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:20.226 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:20.226 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:20.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:20.227 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:20.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:20.227 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:20.227 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:20.227 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:20.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:20.231 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:20.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:20.231 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:20.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:20.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:20.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:20.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:20.235 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:20.235 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:20.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:20.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:20.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:20.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:20.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:20.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:20.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:20.242 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:20.242 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:20.242 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:20.247 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:20.731 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:20.780 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:20.783 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:20.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:20.785 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:20.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:20.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:20.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:08:20.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:08:20.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:08:20.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:08:20.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:08:20.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:08:21.208 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:08:21.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:21.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:21.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:21.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:21.686 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:08:22.164 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:08:22.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:22.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:22.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:22.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:22.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:08:23.119 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:08:23.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:23.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:23.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:23.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:23.596 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:08:23.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:23.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:23.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:23.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:23.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:23.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:23.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:23.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:23.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:23.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:23.862 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:23.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:23.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:23.862 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=773 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:23.862 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=773 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:23.862 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=773 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:23.862 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=773 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:23.862 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=773 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:23.862 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=773 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:28.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:28.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:28.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:28.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:28.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:28.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:28.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:28.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:28.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:28.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:28.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:28.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:28.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:28.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:28.881 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:28.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:28.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:28.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:28.882 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:28.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:28.884 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:28.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:28.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:28.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:28.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:28.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:28.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:28.887 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:28.887 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:28.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:28.887 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:28.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:28.887 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:28.887 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:28.887 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.891 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:28.892 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:28.892 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:28.892 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.892 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:28.897 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:29.380 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:29.424 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:29.426 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:29.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:29.428 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:29.858 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:08:29.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:29.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:29.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:29.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:30.336 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:08:30.814 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:08:30.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:30.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:30.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:30.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:31.295 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:08:31.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:31.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:31.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:31.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:31.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:31.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:31.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:31.441 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:31.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:31.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:31.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:31.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:31.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:31.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:31.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:31.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:31.441 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=543 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:36.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:36.444 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:36.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:36.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:36.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:36.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:36.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:36.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:36.458 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:36.458 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:36.459 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:36.462 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:36.463 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:36.463 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:36.463 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:36.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:36.464 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:36.464 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:36.464 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:36.466 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:36.466 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:36.466 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:36.467 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:36.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:36.467 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:36.467 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:36.467 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:36.469 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:36.469 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:36.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:36.469 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:36.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:36.469 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:36.469 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:36.469 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.472 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:36.472 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:36.472 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:36.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:36.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:36.477 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:36.960 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:37.002 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:37.004 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:37.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:37.006 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:37.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:37.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:37.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:08:37.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:37.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:37.441 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:08:37.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:37.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:37.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:37.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:37.920 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:08:38.397 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:08:38.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:38.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:38.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:38.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:38.876 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:08:39.353 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:08:39.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:39.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:39.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:39.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:39.832 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:08:40.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:40.058 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:40.059 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:40.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:40.059 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:40.060 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:40.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:40.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:40.060 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:40.060 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:40.060 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:40.060 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:40.060 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=765 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:40.060 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=765 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:40.060 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=765 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:40.060 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=765 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:40.060 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=765 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:40.060 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=765 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:45.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:45.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:45.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:45.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:45.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:45.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:45.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:45.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:45.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:45.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:45.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:45.083 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:45.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:45.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:45.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:45.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:45.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:45.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:45.084 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:45.086 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:45.086 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:45.086 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:45.086 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:45.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:45.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:45.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:45.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:45.089 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:45.089 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:45.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:45.089 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:45.089 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:45.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:45.089 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:45.089 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:45.093 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:45.093 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:45.093 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:45.098 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:45.582 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:45.621 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:45.623 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:45.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:45.625 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:45.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:45.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:45.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:08:45.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:45.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:45.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:45.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:45.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:45.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:45.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:45.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:45.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:45.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:45.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:45.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:45.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:45.673 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:45.673 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:45.673 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:45.673 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:45.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:45.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:45.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:50.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:50.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:50.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:50.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:50.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:50.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:50.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:50.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:50.686 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:50.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:50.686 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:50.691 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:50.692 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:50.692 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:50.692 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:50.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:50.693 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:50.693 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:50.693 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:50.696 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:50.696 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:50.696 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:50.696 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:50.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:50.697 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:50.697 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:50.697 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:50.700 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:50.700 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:50.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:50.700 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:50.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:50.700 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:50.700 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:50.700 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:50.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:50.707 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:50.707 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:50.707 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:50.712 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:51.195 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:51.242 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:51.244 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:51.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:51.246 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:51.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:51.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:51.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:08:51.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:51.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:51.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:08:51.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:51.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:51.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:51.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:52.157 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:08:52.634 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:08:52.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:52.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:52.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:52.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:53.115 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:08:53.595 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:08:53.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:53.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:53.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:53.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:54.072 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:08:54.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:54.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:54.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:54.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:54.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:54.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:54.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:54.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:54.297 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:54.297 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:54.297 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:54.297 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:54.297 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:59.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:59.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:59.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:59.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:59.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:59.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:59.312 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:59.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:59.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:59.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:08:59.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:08:59.317 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:08:59.317 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:08:59.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:59.318 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:59.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:59.318 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:08:59.318 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:08:59.318 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:08:59.320 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:08:59.320 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:08:59.320 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:59.321 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:59.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:59.321 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:08:59.321 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:08:59.321 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:08:59.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:08:59.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:08:59.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:59.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:08:59.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:59.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:08:59.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:08:59.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:08:59.325 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:08:59.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:08:59.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:08:59.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:08:59.325 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:08:59.326 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:08:59.326 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:08:59.326 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:08:59.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.331 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:08:59.815 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:08:59.858 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:08:59.860 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:08:59.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:59.863 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:08:59.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:08:59.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:08:59.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:08:59.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:59.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:08:59.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:08:59.914 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:08:59.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:08:59.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:08:59.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:08:59.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:08:59.917 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:08:59.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:08:59.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:08:59.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:08:59.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:08:59.918 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:08:59.918 [WARNING] transceiver.py:257 (TRX3@172.18.36.20:5700/3) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:59.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:59.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:59.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:59.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:59.918 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:08:59.919 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:04.917 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:04.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:04.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:04.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:04.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:04.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:04.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:04.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:04.933 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:04.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:04.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:04.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:04.939 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:04.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:04.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:04.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:04.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:04.941 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:04.941 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:04.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:04.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:04.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:04.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:04.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:04.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:04.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:04.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:04.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:04.948 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:04.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:04.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:04.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:04.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:04.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:04.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:04.954 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:04.954 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:04.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:04.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:04.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:04.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:04.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:04.955 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:04.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:04.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:04.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:04.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:05.444 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:05.497 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:05.500 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:05.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:05.502 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:05.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:05.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:05.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:05.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:05.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:05.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:05.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:05.519 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:05.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:05.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:05.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:05.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:05.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:05.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:05.520 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:05.521 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:05.521 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:05.521 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:05.521 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:10.519 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:10.519 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:10.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:10.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:10.522 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:10.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:10.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:10.531 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:10.531 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:10.532 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:10.532 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:10.535 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:10.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:10.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:10.536 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:10.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:10.537 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:10.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:10.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:10.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:10.539 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:10.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:10.539 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:10.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:10.540 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:10.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:10.540 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:10.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:10.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:10.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:10.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:10.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:10.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:10.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:10.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:10.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:10.545 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:10.546 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:10.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:10.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:11.035 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:11.077 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:11.080 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:11.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:11.081 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:11.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:11.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:11.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:11.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:11.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:11.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:11.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:11.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:11.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:11.095 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:11.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:11.095 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:16.094 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:16.094 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:16.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:16.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:16.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:16.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:16.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:16.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:16.109 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:16.109 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:16.109 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:16.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:16.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:16.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:16.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:16.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:16.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:16.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:16.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:16.118 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:16.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:16.119 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:16.119 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:16.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:16.119 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:16.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:16.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:16.121 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:16.121 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:16.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:16.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:16.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:16.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:16.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:16.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:16.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:16.125 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:16.126 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:16.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:16.130 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:16.613 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:16.654 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:16.656 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:16.657 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:16.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:16.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:16.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:16.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:16.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:16.670 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:16.670 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:16.670 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:16.670 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:16.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:16.670 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:16.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:16.670 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:16.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:16.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:16.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:16.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:16.670 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:21.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:21.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:21.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:21.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:21.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:21.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:21.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:21.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:21.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:21.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:21.694 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:21.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:21.698 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:21.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:21.699 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:21.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:21.699 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:21.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:21.700 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:21.702 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:21.702 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:21.703 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:21.703 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:21.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:21.703 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:21.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:21.704 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:21.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:21.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:21.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:21.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:21.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:21.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:21.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:21.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:21.711 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:21.711 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:21.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:21.712 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:21.712 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:21.712 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:21.717 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:22.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:22.246 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:22.249 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:22.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:22.251 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:22.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:22.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:22.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:22.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:22.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:22.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:22.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:22.260 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:22.260 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:22.260 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:22.260 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:22.261 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:22.261 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:22.261 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:27.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:27.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:27.264 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:27.265 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:27.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:27.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:27.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:27.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:27.274 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:27.274 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:27.274 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:27.276 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:27.277 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:27.277 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:27.277 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:27.277 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:27.277 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:27.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:27.278 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:27.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:27.281 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:27.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:27.281 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:27.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:27.281 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:27.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:27.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:27.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:27.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:27.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:27.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:27.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:27.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:27.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:27.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:27.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:27.288 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:27.288 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:27.288 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:27.293 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:27.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:27.823 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:27.825 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:27.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:27.827 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:28.255 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:09:28.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:28.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:28.732 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:09:29.210 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:09:29.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:29.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:29.688 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:09:30.169 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:09:30.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:30.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:30.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:30.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:30.647 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:09:30.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:09:30.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:09:30.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:09:30.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:09:30.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:09:30.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:09:30.852 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:09:30.852 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:09:31.124 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:09:31.295 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:31.295 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:31.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:31.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:31.603 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:09:32.080 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:09:32.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:32.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:32.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:32.297 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:32.558 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:09:33.036 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:09:33.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:09:33.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:09:33.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:33.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:33.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:33.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:33.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:33.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:33.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:33.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:33.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:33.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:33.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:33.170 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.171 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.172 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:33.172 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:38.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:38.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:38.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:38.172 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:38.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:38.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:38.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:38.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:38.182 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:38.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:38.182 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:38.187 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:38.187 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:38.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:38.187 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:38.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:38.187 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:38.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:38.188 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:38.192 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:38.192 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:38.192 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:38.192 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:38.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:38.193 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:38.193 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:38.193 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:38.197 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:38.197 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:38.197 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:38.197 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:38.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:38.197 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:38.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:38.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:38.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:38.203 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:38.203 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:38.203 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:38.203 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:38.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:38.204 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:38.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:38.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:38.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:38.692 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:38.735 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:38.736 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:38.738 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:38.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:38.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:09:38.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:09:38.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:09:38.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:38.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:38.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:38.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:38.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:38.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:38.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:38.779 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:38.779 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:38.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:38.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:38.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:38.779 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:38.780 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:38.780 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:38.780 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:43.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:43.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:43.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:43.783 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:43.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:43.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:43.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:43.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:43.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:43.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:43.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:43.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:43.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:43.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:43.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:43.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:43.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:43.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:43.797 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:43.799 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:43.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:43.800 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:43.800 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:43.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:43.800 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:43.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:43.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:43.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:43.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:43.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:43.804 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:43.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:43.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:43.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:43.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.809 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:43.809 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:43.809 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:43.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:43.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:43.814 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:44.297 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:44.346 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:44.349 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:44.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:44.352 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:44.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:09:44.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:09:44.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:09:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:44.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:44.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:44.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:44.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:44.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:44.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:44.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:44.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:44.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:44.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:44.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:44.386 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:44.386 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:44.386 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:44.386 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:44.386 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:44.386 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:44.386 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:44.386 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:49.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:49.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:49.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:49.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:49.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:49.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:49.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:49.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:49.400 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:49.400 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:49.400 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:49.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:49.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:49.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:49.403 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:49.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:49.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:49.404 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:49.404 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:49.406 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:49.406 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:49.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:49.406 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:49.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:49.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:49.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:49.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:49.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:49.408 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:49.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:49.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:49.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:49.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:49.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:49.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:49.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:49.412 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:49.413 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:49.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:49.901 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:49.957 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:49.959 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:49.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:49.962 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:49.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:09:49.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:09:49.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:09:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:49.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:50.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:50.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:50.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:50.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:50.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:50.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:50.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:50.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:50.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:50.006 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:50.007 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:50.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:50.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:50.007 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:50.007 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:50.007 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:50.007 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:55.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:55.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:55.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:55.009 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:55.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:55.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:55.025 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:55.027 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:55.027 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:55.028 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:09:55.028 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:09:55.032 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:09:55.033 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:09:55.033 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:55.033 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:55.034 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:55.034 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:09:55.034 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:09:55.034 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:09:55.038 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:09:55.039 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:09:55.039 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:55.039 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:55.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:55.039 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:09:55.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:09:55.040 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:09:55.043 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:09:55.043 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:09:55.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:55.044 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:09:55.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:55.044 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:09:55.044 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:09:55.044 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.049 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:09:55.049 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:09:55.049 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:09:55.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:09:55.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:09:55.538 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:09:55.587 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:09:55.589 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:09:55.591 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:09:55.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:09:55.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:09:55.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:09:55.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:09:55.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:09:55.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:09:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:09:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:09:55.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:09:55.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:09:55.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:09:55.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:09:55.643 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:09:55.643 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:09:55.643 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:09:55.643 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:09:55.643 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:55.643 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:55.643 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:55.643 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:55.643 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:09:55.643 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:00.644 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:00.644 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:00.645 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:00.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:00.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:00.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:00.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:00.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:00.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:00.666 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:00.666 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:10:00.674 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:10:00.675 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:10:00.675 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:00.676 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:00.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:00.677 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:10:00.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:00.677 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:10:00.680 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:10:00.681 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:10:00.681 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:00.681 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:00.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:00.682 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:10:00.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:00.682 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:10:00.684 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:10:00.684 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:10:00.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:00.684 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:00.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:00.684 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:10:00.684 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:00.684 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.687 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:10:00.687 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:10:00.687 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:10:00.688 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:00.688 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:00.692 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:10:01.176 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:10:01.218 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:10:01.220 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:10:01.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:01.223 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:10:01.225 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 05:10:01.225 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 200
2026-02-19 05:10:01.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 05:10:01.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:01.654 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:10:01.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:01.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:01.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:01.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:01.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:02.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:02.134 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:10:02.612 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:10:02.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:02.867 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 05:10:02.867 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 0
2026-02-19 05:10:02.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 05:10:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:02.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:02.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:02.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:02.873 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:02.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:02.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:02.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:02.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:02.874 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:02.874 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:02.874 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:10:02.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:07.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:07.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:07.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:07.880 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:07.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:07.882 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:07.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:07.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:07.890 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:07.890 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:07.890 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:10:07.893 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:10:07.893 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:10:07.893 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:07.893 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:07.894 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:07.894 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:10:07.894 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:07.894 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:10:07.897 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:10:07.897 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:10:07.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:07.897 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:07.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:07.897 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:10:07.897 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:07.897 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:10:07.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:10:07.899 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:10:07.899 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:07.899 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:07.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:07.900 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:10:07.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:07.900 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:10:07.902 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:10:07.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:10:07.903 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:10:07.903 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:10:07.903 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:07.908 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:10:08.389 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:10:08.416 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:10:08.417 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:10:08.417 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:10:08.417 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 05:10:08.418 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 200
2026-02-19 05:10:08.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 05:10:08.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:08.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:08.867 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:10:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:09.020 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:09.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:09.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:09.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:09.348 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:10:09.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:09.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:09.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:09.826 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:10:10.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:10.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:10.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:10.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.226 [DEBUG] fake_trx.py:382 (BTS@172.18.36.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-02-19 05:10:10.226 [INFO] fake_trx.py:385 (BTS@172.18.36.20:5700) Artificial TRXC delay set to 0
2026-02-19 05:10:10.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-02-19 05:10:10.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:10.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:10.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:10.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:10.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:10.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:10.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:10.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:10.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:10.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:10.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:10.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:10.235 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:10:15.237 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:15.237 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:15.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:15.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:15.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:15.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:15.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:15.249 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:15.249 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:15.250 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:15.250 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:10:15.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:10:15.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:10:15.256 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:15.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:15.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:15.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:10:15.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:15.258 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:10:15.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:10:15.261 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:10:15.261 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:15.261 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:15.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:15.261 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:10:15.262 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:15.262 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:10:15.264 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:10:15.264 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:10:15.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:15.265 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:15.265 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:15.265 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:10:15.265 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:15.265 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.270 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:10:15.270 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:10:15.270 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:10:15.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:15.275 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:10:15.758 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:10:15.800 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:10:15.801 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:10:15.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:15.803 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:10:15.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:15.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:15.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:15.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:15.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:15.841 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:15.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:15.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:15.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:15.843 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:15.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:15.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:15.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:15.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:15.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:15.843 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:10:15.843 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:15.843 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:15.843 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:15.843 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:15.843 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:20.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:20.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:20.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:20.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:20.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:20.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:20.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:20.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:20.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:20.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:20.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:10:20.861 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:10:20.861 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:10:20.862 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:20.862 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:20.862 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:10:20.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:20.863 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:10:20.865 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:10:20.865 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:10:20.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:20.865 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:20.865 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:20.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:10:20.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:20.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:10:20.868 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:10:20.868 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:10:20.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:20.868 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:20.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:20.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:10:20.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:20.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:10:20.871 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:10:20.872 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:10:20.872 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:10:20.872 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:20.877 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:10:21.360 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:10:21.398 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:10:21.398 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:10:21.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:21.400 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:10:21.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:21.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:21.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:21.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:21.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:21.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:21.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:21.454 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:21.458 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:21.458 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:21.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:21.458 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:10:21.459 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:21.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:21.459 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:21.459 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:21.459 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:21.459 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:21.459 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:10:26.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:10:26.458 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:10:26.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:26.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:26.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:26.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:26.468 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:10:26.469 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:26.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:26.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:10:26.470 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:10:26.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:10:26.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:10:26.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:26.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:26.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:10:26.473 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:10:26.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:10:26.474 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:10:26.475 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:10:26.475 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:10:26.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:26.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:26.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:10:26.476 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:10:26.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:10:26.476 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:10:26.478 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:10:26.478 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:10:26.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:26.478 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:10:26.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:10:26.478 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:10:26.478 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:10:26.478 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:10:26.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:10:26.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:10:26.481 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:10:26.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:10:26.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:10:26.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:10:27.013 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:10:27.015 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:10:27.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:27.017 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:10:27.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:27.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:27.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:27.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:27.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:27.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:27.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:27.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:27.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:27.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:27.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:27.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:27.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:27.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:27.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:27.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:27.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:27.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:27.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:27.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:27.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:27.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:27.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:27.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:27.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:27.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:27.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:27.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:27.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:27.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:27.446 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:10:27.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:27.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:27.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:27.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:27.924 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:10:28.402 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:10:28.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:28.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:28.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:28.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:28.877 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:10:29.350 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:10:29.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:29.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:29.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:29.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:29.828 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:10:30.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:30.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:30.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:30.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:30.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:30.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:30.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:30.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:30.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:30.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:30.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:30.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:30.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:30.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:30.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:30.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:30.305 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:10:30.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:30.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:30.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:30.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:30.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:30.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:30.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:30.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:30.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:30.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:30.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:30.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:30.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:30.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:30.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:30.783 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:10:31.261 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:10:31.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:10:31.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:10:31.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:10:31.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:10:31.738 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:10:32.215 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:10:32.693 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:10:33.171 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:10:33.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:33.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:33.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:33.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:33.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:33.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:33.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:33.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:33.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:33.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:33.390 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:33.390 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:33.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:33.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:33.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:33.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:33.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:33.648 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:10:34.127 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:10:34.605 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:10:35.082 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:10:35.560 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:10:36.038 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:10:36.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:36.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:36.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:36.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:36.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:36.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:36.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:36.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:36.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:36.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:36.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:36.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:36.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:36.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:36.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:36.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:36.515 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:10:36.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:36.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:36.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:36.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:36.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:36.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:36.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:36.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:36.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:36.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:36.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:10:37.471 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:10:37.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:37.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:37.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:37.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:37.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:37.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:37.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:37.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:37.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:37.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:37.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:37.706 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:37.706 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:10:37.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:37.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:37.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:37.777 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:37.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:37.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:37.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:37.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:37.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:37.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:37.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:37.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:37.856 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:37.856 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:10:37.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:37.948 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:10:38.425 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:10:38.904 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:10:39.382 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:10:39.860 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:10:40.339 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:10:40.817 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:10:40.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:40.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:40.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:40.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:40.863 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:40.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:40.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:40.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:40.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:40.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:40.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:40.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:40.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:40.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:40.918 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:40.918 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:10:40.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:40.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:40.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:40.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:40.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:40.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:40.988 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:41.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:41.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:41.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:41.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:41.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:41.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:41.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:41.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:41.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:41.056 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:41.056 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:10:41.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:41.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:41.293 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:10:41.771 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:10:42.249 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:10:42.727 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:10:43.206 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:10:43.684 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:10:44.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:44.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:44.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:44.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:44.063 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:44.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:44.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:44.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:44.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:44.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:44.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:44.085 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:44.085 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:44.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:44.110 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:44.110 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:10:44.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:44.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:44.162 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:10:44.641 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:10:45.120 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:10:45.598 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:10:46.076 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:10:46.555 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:10:47.033 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:10:47.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:47.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:47.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:47.119 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:47.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:47.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:47.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:47.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:47.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:47.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:47.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:47.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:47.182 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:47.182 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:10:47.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:47.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:47.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:47.243 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:47.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:47.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:47.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:47.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:47.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:47.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:47.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:47.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:47.321 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:47.321 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:10:47.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:47.506 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:10:47.984 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:10:48.463 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:10:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:48.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:48.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:48.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:48.646 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:48.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:48.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:48.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:48.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:48.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:48.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:48.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:48.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:48.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:48.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:48.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:48.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:48.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:48.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:48.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:48.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:48.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:48.940 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:10:48.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:48.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:48.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:48.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:48.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:48.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:48.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:48.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:48.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:48.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:48.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:48.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:48.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:49.418 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:10:49.896 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:10:50.374 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:10:50.852 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:10:51.329 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:10:51.806 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:10:52.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:52.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:52.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:52.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:52.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:52.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:52.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:52.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:52.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:52.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:52.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:52.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:52.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:52.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:52.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:52.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:52.284 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:10:52.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:52.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:52.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:52.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:52.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:52.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:52.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:52.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:52.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:52.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:52.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:52.761 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:10:53.239 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:10:53.716 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:10:54.194 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:10:54.672 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:10:55.149 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:10:55.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:55.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:55.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:55.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:55.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:55.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:55.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:55.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:55.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:55.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:55.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:55.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:55.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:55.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:55.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:55.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:55.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:55.627 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:10:56.105 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:10:56.582 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:10:57.060 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:10:57.538 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:10:58.016 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:10:58.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:58.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:58.394 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:58.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:58.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:58.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:58.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:58.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:58.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:58.416 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:58.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:58.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:58.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:58.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:58.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:58.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:58.493 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:10:58.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:58.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:58.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:58.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:58.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:58.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:58.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:58.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:58.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:58.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:58.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:58.971 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:10:59.448 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:10:59.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:59.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:59.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:59.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:59.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:59.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:59.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:59.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:59.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:59.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:59.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:59.549 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:59.549 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:10:59.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:59.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:59.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:59.608 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:10:59.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:10:59.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:10:59.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:10:59.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:10:59.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:10:59.628 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:10:59.628 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:10:59.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:10:59.632 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:10:59.632 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:10:59.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:10:59.925 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:11:00.403 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:11:00.882 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 05:11:01.360 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 05:11:01.838 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 05:11:02.317 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 05:11:02.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:02.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:02.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:02.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:02.640 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:02.660 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:02.660 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:02.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:02.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:02.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:02.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:02.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:02.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:02.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:02.697 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:02.697 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:02.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:02.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:02.794 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 05:11:03.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:03.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:03.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:03.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:03.187 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:03.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:03.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:03.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:03.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:03.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:03.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:03.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:03.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:03.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:03.213 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:03.213 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:03.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:03.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:03.272 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 05:11:03.750 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 05:11:04.228 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 05:11:04.707 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 05:11:05.185 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 05:11:05.664 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 05:11:06.142 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 05:11:06.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:06.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:06.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:06.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:06.221 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:06.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:06.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:06.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:06.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:06.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:06.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:06.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:06.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:06.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:06.284 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:06.284 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:06.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:06.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:06.619 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 05:11:07.097 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 05:11:07.575 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 05:11:08.054 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 05:11:08.532 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 05:11:09.010 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 05:11:09.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:09.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:09.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:09.292 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:09.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:09.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:09.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:09.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:09.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:09.314 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:09.314 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:09.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:09.348 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:09.348 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:09.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:09.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:09.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:09.404 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:09.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:09.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:09.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:09.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:09.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:09.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:09.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:09.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:09.486 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 05:11:09.490 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:09.490 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:09.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:09.964 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 05:11:10.442 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 05:11:10.920 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 05:11:11.398 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 05:11:11.876 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 05:11:12.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:12.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:12.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:12.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:12.335 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:12.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:12.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:12.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:12.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:12.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:12.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:12.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:12.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:12.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:12.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:12.348 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:11:12.348 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=9794 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:12.349 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=9794 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:12.349 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=9794 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:12.349 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=9794 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:12.349 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=9794 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:12.349 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=9794 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:12.349 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=9794 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:17.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:17.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:17.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:17.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:17.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:17.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:17.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:17.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:17.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:17.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:17.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:11:17.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:11:17.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:11:17.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:17.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:17.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:17.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:11:17.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:17.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:11:17.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:11:17.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:11:17.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:17.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:17.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:17.359 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:11:17.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:17.359 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:11:17.361 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:11:17.361 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:11:17.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:17.361 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:17.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:17.361 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:11:17.361 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:17.361 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.364 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:11:17.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:11:17.365 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:11:17.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:17.369 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:11:17.853 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:11:17.898 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:11:17.900 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:11:17.902 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:11:17.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:17.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:17.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:17.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:17.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:17.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:17.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:17.932 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:17.932 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:17.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:17.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:17.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:17.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:17.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:18.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:18.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:18.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:18.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:18.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:18.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:18.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:18.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:18.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:18.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:18.036 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:18.036 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:11:18.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:18.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:18.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:18.133 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:18.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:18.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:18.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:18.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:18.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:18.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:18.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:18.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:18.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:18.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:18.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:18.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:18.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:18.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:18.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:18.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:18.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:18.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:18.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:18.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:18.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:18.272 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:18.272 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:18.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.326 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:11:18.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:18.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:18.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:18.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:18.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:18.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:18.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:18.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:18.411 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:18.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:18.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:18.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:18.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:18.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:18.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:18.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:18.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:18.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:18.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:18.420 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:11:23.421 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:23.421 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:23.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:23.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:23.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:23.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:23.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:23.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:23.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:23.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:23.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:11:23.436 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:11:23.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:11:23.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:23.437 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:23.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:23.438 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:11:23.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:23.438 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:11:23.440 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:11:23.440 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:11:23.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:23.440 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:23.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:23.440 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:11:23.440 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:23.440 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:11:23.442 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:11:23.442 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:11:23.442 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:23.443 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:23.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:23.443 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:11:23.443 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:23.443 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:11:23.446 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:11:23.446 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:11:23.446 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.446 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:23.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:23.451 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:11:23.934 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:11:23.981 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:11:23.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:23.985 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:11:23.987 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:11:24.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:24.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:24.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:24.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:24.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:24.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:24.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:24.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:24.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:24.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:24.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:24.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:24.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:24.411 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:11:24.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:24.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:24.418 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:24.418 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:24.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:24.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:24.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:24.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:24.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:24.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:24.437 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:24.437 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:24.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:24.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:24.451 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:24.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:24.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:24.459 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:24.459 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:11:24.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:24.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:24.889 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:11:25.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:25.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:25.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:25.152 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:25.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:25.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:25.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:25.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:25.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:25.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:25.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:25.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:25.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:25.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:25.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:25.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:25.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:25.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:25.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:25.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:25.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:25.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:25.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:25.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:25.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:25.359 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:25.359 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:25.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.367 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:11:25.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:25.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:25.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:25.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:25.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:25.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:25.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:25.763 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:25.763 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:25.770 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:25.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:25.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:25.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:25.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:25.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:25.771 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:25.771 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:25.771 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:25.771 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:25.771 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:11:30.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:30.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:30.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:30.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:30.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:30.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:30.788 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:30.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:30.789 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:30.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:30.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:11:30.792 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:11:30.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:11:30.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:30.793 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:30.793 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:30.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:11:30.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:30.794 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:11:30.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:11:30.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:11:30.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:30.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:30.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:30.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:11:30.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:30.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:11:30.802 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:11:30.802 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:11:30.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:30.802 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:30.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:30.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:11:30.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:30.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:11:30.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:11:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:11:30.810 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:11:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.810 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:11:30.810 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:11:30.810 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:11:30.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:11:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:30.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:30.815 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:11:31.299 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:11:31.346 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:11:31.348 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:11:31.350 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:11:31.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:31.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:31.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:31.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:31.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:31.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:31.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:31.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:31.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:31.402 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:31.402 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:31.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:31.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:31.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:31.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:31.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:31.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:31.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:31.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:31.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:31.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:31.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:31.638 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:31.638 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:11:31.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.776 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:11:31.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:31.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:31.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:31.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:31.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:31.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:31.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:31.924 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:31.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:31.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:31.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:31.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:31.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:31.944 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:31.944 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:31.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:31.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:31.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:31.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:31.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:32.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:32.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:32.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:32.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:32.252 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:11:32.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:32.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:32.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:32.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:32.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:32.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:32.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:32.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:32.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:32.308 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:32.309 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:32.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:32.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:32.729 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:11:32.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:32.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:32.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:32.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:33.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:33.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:33.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:33.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:33.120 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:33.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:33.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:33.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:33.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:33.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:33.126 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:33.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:33.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:33.126 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:33.126 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:33.126 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:11:38.128 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:38.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:38.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:38.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:38.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:38.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:38.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:38.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:38.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:38.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:38.140 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:11:38.143 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:11:38.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:11:38.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:38.144 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:38.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:38.144 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:11:38.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:38.145 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:11:38.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:11:38.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:11:38.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:38.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:38.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:38.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:11:38.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:38.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:11:38.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:11:38.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:11:38.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:38.152 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:38.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:38.152 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:11:38.152 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:38.152 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:11:38.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:11:38.156 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:11:38.157 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:38.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:38.161 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:11:38.641 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:11:38.686 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:11:38.686 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:11:38.688 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:11:38.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:38.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:38.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:38.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:38.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:38.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:38.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:38.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:38.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:38.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:38.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:38.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:38.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:38.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:38.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:38.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:38.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:38.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:38.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:38.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:38.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:38.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:38.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:38.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:38.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:38.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:38.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:38.972 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:38.972 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:11:38.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:38.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.117 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:11:39.160 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:39.160 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:39.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:39.161 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:39.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:39.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:39.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:39.265 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:39.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:39.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:39.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:39.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:39.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:39.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:39.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:39.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:39.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:39.308 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:39.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:39.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:39.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:39.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:11:39.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:39.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:39.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:39.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:39.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:39.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:39.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:39.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:39.650 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:39.650 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:39.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:39.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:40.071 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:11:40.161 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:40.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:40.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:40.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:40.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:40.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:40.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:40.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:40.464 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:40.471 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:40.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:40.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:40.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:40.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:40.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:40.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:40.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:40.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:40.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:40.475 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:11:40.475 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:40.475 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:40.475 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:40.475 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:40.475 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:40.475 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:11:45.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:11:45.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:11:45.477 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:45.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:45.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:45.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:45.488 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:11:45.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:45.488 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:45.488 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:11:45.488 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:11:45.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:11:45.492 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:11:45.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:45.493 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:45.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:11:45.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:11:45.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:11:45.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:11:45.498 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:11:45.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:11:45.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:45.499 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:45.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:11:45.499 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:11:45.499 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:11:45.499 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:11:45.502 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:11:45.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:11:45.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:45.503 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:11:45.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:11:45.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:11:45.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:11:45.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:11:45.508 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:11:45.508 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:11:45.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:11:45.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:11:45.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:11:46.040 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:11:46.043 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:11:46.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:46.046 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:11:46.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:46.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:46.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:46.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:46.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:46.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:46.075 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:46.075 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:46.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:46.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:46.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:46.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:46.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:46.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:11:46.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:46.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:46.952 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:11:47.430 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:11:47.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:47.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:47.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:47.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:47.908 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:11:47.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:47.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:47.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:47.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:47.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:47.978 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:47.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:47.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:47.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:47.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:47.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:47.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:48.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:48.007 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:48.007 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:11:48.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:48.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:48.386 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:11:48.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:48.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:48.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:48.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:48.865 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:11:49.341 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:11:49.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:49.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:49.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:49.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:49.819 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:11:50.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:50.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:50.153 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:50.153 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:50.154 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:11:50.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:50.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:50.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:50.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:50.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:50.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:50.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:50.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:50.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:50.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:50.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:50.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:50.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:50.297 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:11:50.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:11:50.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:11:50.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:11:50.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:11:50.775 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:11:51.253 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:11:51.731 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:11:51.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:51.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:51.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:51.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:51.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:11:51.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:11:51.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:11:51.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:51.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:11:51.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:11:51.793 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:11:51.793 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:11:51.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:11:51.831 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:11:51.831 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:11:51.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:51.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:11:52.209 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:11:52.687 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:11:53.165 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:11:53.642 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:11:54.120 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:11:54.598 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:11:55.077 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:11:55.555 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:11:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:11:56.512 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:11:56.990 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:11:57.469 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:11:57.947 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:11:58.425 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:11:58.904 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:11:59.382 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:11:59.861 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:12:00.339 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:12:00.817 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:12:01.295 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:12:01.774 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:12:02.251 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:12:02.730 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:12:03.208 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:12:03.686 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:12:04.164 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:12:04.642 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:12:05.121 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:12:05.599 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:12:06.077 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:12:06.555 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:12:07.034 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:12:07.512 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:12:07.990 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:12:08.467 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:12:08.946 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:12:09.425 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:12:09.903 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:12:10.382 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:12:10.860 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:12:11.338 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:12:11.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:11.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:11.795 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:12:11.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:11.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:11.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:11.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:11.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:12:11.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:12:11.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:12:11.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:12:11.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:12:11.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:12:11.798 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:12:11.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5609 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:12:11.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5609 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:12:11.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5609 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:12:11.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5609 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:12:11.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5609 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:12:11.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5609 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:12:16.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:12:16.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:12:16.803 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:12:16.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:12:16.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:12:16.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:12:16.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:12:16.813 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:12:16.813 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:16.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:12:16.814 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:12:16.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:12:16.817 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:12:16.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:12:16.817 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:16.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:12:16.818 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:12:16.818 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:12:16.818 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:12:16.820 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:12:16.820 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:12:16.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:12:16.820 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:16.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:12:16.820 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:12:16.820 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:12:16.820 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:12:16.822 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:12:16.822 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:12:16.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:12:16.822 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:16.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:12:16.823 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:12:16.823 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:12:16.823 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:12:16.825 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:12:16.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:12:16.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:12:16.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:12:16.825 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:12:16.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:12:16.826 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:12:16.826 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:12:16.826 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:16.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:16.831 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:12:17.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:12:17.350 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:12:17.353 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:12:17.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:17.353 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:12:17.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:17.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:17.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:17.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:17.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:17.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:17.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:17.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:17.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:17.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:17.419 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:17.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:17.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:17.792 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:12:17.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:17.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:17.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:17.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:18.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:12:18.748 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:12:18.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:18.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:18.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:18.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:19.226 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:12:19.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:19.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:19.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:19.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:19.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:19.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:19.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:19.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:19.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:19.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:19.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:19.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:19.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:19.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:12:19.325 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:12:19.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:19.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:19.703 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:12:19.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:19.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:19.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:19.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:20.182 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:12:20.660 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:12:20.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:20.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:20.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:20.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:21.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:12:21.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:21.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:21.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:21.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:21.471 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:12:21.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:21.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:21.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:21.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:21.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:21.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:21.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:21.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:21.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:21.518 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:21.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:21.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:21.616 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:12:21.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:21.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:21.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:21.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:22.094 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:12:22.571 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:12:23.049 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:12:23.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:23.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:23.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:23.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:23.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:23.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:23.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:23.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:23.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:23.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:23.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:23.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:23.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:23.146 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:12:23.146 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:12:23.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:23.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:23.524 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:12:24.002 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:12:24.479 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:12:24.957 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:12:25.436 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:12:25.914 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:12:26.392 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:12:26.871 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:12:27.349 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:12:27.827 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:12:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:12:28.784 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:12:29.262 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:12:29.741 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:12:30.219 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:12:30.697 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:12:31.175 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:12:31.654 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:12:32.132 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:12:32.611 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:12:33.089 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:12:33.567 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:12:34.045 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:12:34.523 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:12:35.002 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:12:35.480 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:12:35.958 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:12:36.437 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:12:36.915 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:12:37.393 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:12:37.872 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:12:38.350 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:12:38.828 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:12:39.306 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:12:39.785 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:12:40.263 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:12:40.741 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:12:41.220 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:12:41.698 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:12:42.177 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:12:42.655 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:12:43.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:43.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:43.118 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:12:43.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:12:43.120 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:12:43.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:12:48.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:12:48.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:12:48.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:12:48.126 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:12:48.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:12:48.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:12:48.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:12:48.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:12:48.136 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:48.136 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:12:48.136 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:12:48.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:12:48.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:12:48.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:12:48.139 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:48.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:12:48.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:12:48.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:12:48.140 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:12:48.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:12:48.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:12:48.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:12:48.142 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:48.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:12:48.143 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:12:48.143 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:12:48.143 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:12:48.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:12:48.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:12:48.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:12:48.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:12:48.145 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:12:48.145 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:12:48.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:12:48.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:12:48.147 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:12:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:12:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:12:48.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:12:48.148 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:12:48.148 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:12:48.148 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:12:48.153 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:12:48.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:12:48.673 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:12:48.676 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:12:48.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:48.678 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:12:48.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:48.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:48.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:48.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:48.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:48.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:48.700 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:48.700 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:48.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:48.740 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:48.740 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:48.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:48.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:48.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:48.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:48.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:48.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:48.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:48.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:48.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:48.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:48.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:48.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:48.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:48.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:48.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:48.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:48.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:48.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:48.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:49.113 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:12:49.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:49.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:49.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:49.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:49.591 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:12:50.069 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:12:50.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:50.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:50.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:50.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:50.546 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:12:51.024 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:12:51.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:51.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:51.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:51.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:51.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:51.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:51.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:51.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:51.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:51.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:51.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:51.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:51.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:51.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:51.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:51.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:51.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:51.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:51.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:51.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:51.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:51.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:51.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:51.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:51.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:51.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:51.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:51.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:51.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:51.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:51.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:51.502 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:12:51.980 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:12:52.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:52.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:52.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:52.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:52.458 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:12:52.935 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:12:53.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:12:53.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:12:53.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:12:53.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:12:53.413 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:12:53.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:53.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:53.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:53.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:53.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:53.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:53.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:53.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:53.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:53.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:53.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:53.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:53.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:53.558 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:12:53.558 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:12:53.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:53.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:53.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:53.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:53.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:53.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:53.828 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:12:53.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:53.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:53.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:53.847 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:53.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:53.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:53.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:53.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:53.890 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:12:53.892 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:12:53.892 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:12:53.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:53.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:54.369 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:12:54.847 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:12:55.325 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:12:55.804 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:12:56.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:56.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:56.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:56.186 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:12:56.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:56.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:56.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:56.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:56.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:56.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:56.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:56.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:56.230 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:12:56.230 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:12:56.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.282 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:12:56.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:56.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:56.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:56.513 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:12:56.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:56.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:56.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:56.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:56.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:56.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:56.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:56.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:56.573 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:12:56.574 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:12:56.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:56.757 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:12:57.235 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:12:57.713 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:12:58.191 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:12:58.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:58.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:58.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:58.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:58.619 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:12:58.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:58.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:58.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:58.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:58.633 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:58.633 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:58.633 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:58.633 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:58.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:58.669 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:12:58.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:58.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:58.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:58.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:12:59.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:59.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:59.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:59.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:59.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:12:59.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:12:59.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:12:59.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:59.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:59.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:59.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:12:59.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:12:59.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:12:59.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:12:59.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:12:59.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:59.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:12:59.623 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:13:00.101 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:13:00.579 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:13:01.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:01.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:01.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:01.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:01.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:01.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:01.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:01.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:01.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:01.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:01.031 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:01.031 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:01.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:01.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:01.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:01.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:01.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:01.057 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:13:01.535 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:13:01.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:01.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:01.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:01.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:01.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:01.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:01.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:01.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:01.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:01.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:01.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:01.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:01.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:01.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:01.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:01.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:01.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:02.012 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:13:02.490 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:13:02.967 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:13:03.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:03.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:03.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:03.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:03.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:03.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:03.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:03.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:03.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:03.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:03.429 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:03.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:03.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:03.436 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:03.436 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:03.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:03.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:03.444 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:13:03.922 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:13:04.400 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:13:04.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:04.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:04.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:04.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:04.723 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:04.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:04.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:04.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:04.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:04.745 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:04.745 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:04.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:04.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:04.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:04.783 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:04.783 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:04.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:04.877 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:13:05.356 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:13:05.834 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:13:06.312 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:13:06.790 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:13:07.269 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:13:07.747 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:13:08.226 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:13:08.703 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:13:09.181 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:13:09.660 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:13:10.138 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:13:10.616 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:13:11.095 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:13:11.574 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:13:12.052 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:13:12.530 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:13:13.008 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:13:13.487 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:13:13.965 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:13:14.443 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:13:14.921 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:13:15.400 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:13:15.878 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:13:16.356 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:13:16.834 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:13:17.312 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:13:17.791 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:13:18.269 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:13:18.747 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:13:19.225 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:13:19.704 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:13:20.182 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:13:20.660 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:13:21.138 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:13:21.617 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:13:22.095 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:13:22.573 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 05:13:23.051 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 05:13:23.528 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 05:13:24.006 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 05:13:24.484 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 05:13:24.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:24.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:24.750 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:24.750 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:24.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:24.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:24.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:24.752 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:24.752 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:24.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:24.752 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:24.752 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:24.752 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:24.752 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:13:24.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7811 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:24.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7811 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:24.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7811 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:24.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7811 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:24.752 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=7811 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:29.753 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:29.753 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:29.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:29.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:29.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:29.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:29.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:29.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:29.770 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:29.770 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:29.770 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:13:29.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:13:29.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:13:29.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:29.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:29.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:29.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:13:29.777 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:29.777 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:13:29.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:13:29.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:13:29.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:29.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:29.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:29.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:13:29.783 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:29.783 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:13:29.785 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:13:29.785 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:13:29.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:29.786 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:29.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:29.786 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:13:29.786 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:29.786 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:13:29.790 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:13:29.790 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:13:29.790 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:13:29.791 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.791 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:29.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:29.795 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:13:30.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:13:30.317 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:13:30.319 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:13:30.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.320 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:13:30.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:30.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.339 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.339 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.339 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:30.339 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:30.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.384 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.443 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=139 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:30.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:30.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:30.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:30.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:30.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:30.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:30.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.663 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:30.663 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:30.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.754 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:13:30.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.760 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:30.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:30.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:30.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:30.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:30.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:30.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:30.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:30.799 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:30.799 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:30.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.879 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:30.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:30.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:30.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:30.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:30.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:30.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:30.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:30.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:30.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:30.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:31.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:31.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:31.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:31.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:31.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:31.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:31.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:31.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:31.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:31.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:31.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:31.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:31.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:13:31.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:31.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:31.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:31.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:31.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:31.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:31.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:31.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:31.407 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:31.407 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:31.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:31.410 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:31.410 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:31.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:31.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:31.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:31.550 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:31.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:31.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:31.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:31.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:31.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:31.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:31.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:31.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:31.611 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:31.611 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:31.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:13:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:31.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:31.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:31.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:31.792 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:31.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:31.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:31.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:31.796 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:31.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:31.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:31.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:31.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:31.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:31.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:31.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:31.804 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:13:31.804 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:31.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:31.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:31.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:31.804 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:31.804 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:31.804 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:31.804 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:31.804 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:31.804 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:36.803 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:36.803 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:36.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:36.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:36.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:36.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:36.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:36.814 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:36.814 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:36.815 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:36.815 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:13:36.819 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:13:36.819 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:13:36.819 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:36.819 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:36.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:36.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:13:36.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:36.820 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:13:36.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:13:36.823 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:13:36.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:36.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:36.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:36.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:13:36.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:36.823 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:13:36.826 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:13:36.826 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:13:36.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:36.826 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:36.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:36.826 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:13:36.826 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:36.826 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:13:36.830 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:13:36.830 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:13:36.830 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:36.835 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:13:37.320 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:13:37.359 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:13:37.360 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:13:37.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:37.362 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:13:37.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:37.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:37.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:37.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:37.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:37.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:37.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:37.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:37.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:37.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:37.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:37.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:37.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:37.797 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:13:37.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:37.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:37.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:37.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:38.274 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:13:38.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:38.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:38.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:38.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:38.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:38.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:38.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:38.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:38.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:38.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:38.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:38.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:38.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:38.318 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:38.318 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:38.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:38.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:38.751 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:13:38.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:38.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:38.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:38.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:38.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:38.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:38.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:38.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:38.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:38.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:38.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:38.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:38.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:38.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:38.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:38.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:38.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:38.853 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:38.853 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:38.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:38.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:39.229 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:13:39.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:39.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:39.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:39.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:39.510 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:39.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:39.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:39.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:39.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:39.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:39.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:39.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:39.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:39.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:39.566 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:39.566 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:39.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:39.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:39.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:13:39.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:39.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:39.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:39.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:39.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:39.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:39.997 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:39.997 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:39.997 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:40.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:40.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:40.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:40.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:40.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:40.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:40.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:40.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:40.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:40.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:40.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:40.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:40.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:40.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:40.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:40.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:40.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:40.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:40.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:40.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:40.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:40.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:40.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:40.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.184 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:13:40.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:40.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:40.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:40.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:40.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:40.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:40.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.646 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:40.646 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:40.646 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:40.646 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:40.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:40.653 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:40.653 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:40.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:40.660 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:13:40.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:40.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:40.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:40.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:41.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:41.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:41.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:41.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:41.057 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:41.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:41.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:41.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:41.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:41.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:41.078 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:41.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:41.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:41.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:41.138 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:13:41.142 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:41.142 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:41.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:41.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:41.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:41.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:41.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:41.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:41.534 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:41.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:41.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:41.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:41.543 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:41.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:41.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:41.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:41.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:41.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:41.544 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:13:41.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:46.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:46.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:46.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:46.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:46.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:46.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:46.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:46.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:46.560 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:46.561 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:46.561 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:13:46.566 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:13:46.567 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:13:46.567 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:46.567 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:46.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:46.568 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:13:46.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:46.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:13:46.570 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:13:46.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:13:46.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:46.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:46.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:46.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:13:46.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:46.571 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:13:46.573 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:13:46.574 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:13:46.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:46.574 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:46.574 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:46.574 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:13:46.574 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:46.574 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:13:46.577 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:13:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:13:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:13:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:13:46.577 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:13:46.577 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:13:46.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:13:46.578 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:13:46.578 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:13:46.578 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.578 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:46.583 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:13:47.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:13:47.106 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:13:47.108 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:13:47.110 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:13:47.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:47.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:47.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:47.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:47.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:47.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:47.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:47.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:47.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:47.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.394 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:47.394 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:47.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.489 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:47.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:47.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:47.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:47.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:13:47.547 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:47.547 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:47.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:47.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:47.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:47.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:47.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.610 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:47.630 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.630 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:47.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:47.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:47.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:47.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:47.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:47.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:47.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:47.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:47.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:47.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:47.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:47.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:48.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:48.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:48.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:48.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:48.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:48.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:48.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:48.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:48.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:48.017 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:13:48.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:48.066 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:48.066 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:48.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.495 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:13:48.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:48.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:48.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:48.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:48.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:48.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:48.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:48.653 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:48.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:48.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:48.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:48.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:48.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:48.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:48.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:48.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:48.678 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:48.678 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:13:48.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:48.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:48.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:48.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:48.887 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:48.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:48.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:48.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:48.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:48.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:48.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:48.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:48.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:48.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:48.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:48.896 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:13:48.897 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:48.897 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:48.897 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:48.897 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:48.897 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:48.897 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:48.897 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:48.898 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:13:53.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:13:53.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:13:53.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:53.900 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:53.901 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:53.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:53.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:13:53.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:53.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:53.913 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:13:53.913 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:13:53.917 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:13:53.917 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:13:53.918 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:53.918 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:53.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:13:53.918 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:13:53.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:13:53.919 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:13:53.921 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:13:53.921 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:13:53.921 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:53.921 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:53.921 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:13:53.921 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:13:53.922 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:13:53.922 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:13:53.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:13:53.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:13:53.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:53.927 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:13:53.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:13:53.927 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:13:53.927 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:13:53.927 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:13:53.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:13:53.933 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:13:53.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:13:53.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:13:53.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:13:53.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:13:54.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:13:54.465 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:13:54.467 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:13:54.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:54.468 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:13:54.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:54.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:54.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:54.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:54.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:54.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:54.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:54.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:54.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:54.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:54.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:54.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:54.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:54.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:13:54.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:54.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:54.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:54.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:55.377 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:13:55.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:55.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:55.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:55.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:55.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:55.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:55.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:55.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:55.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:55.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:55.420 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:55.420 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:55.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:55.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:55.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:55.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:55.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:55.854 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:13:55.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:55.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:55.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:55.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:56.332 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:13:56.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:56.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:56.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:56.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:56.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:56.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:56.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:56.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:56.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:56.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:56.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:56.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:56.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:56.434 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:56.435 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:56.810 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:13:56.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:56.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:56.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:56.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:57.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:13:57.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:57.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:57.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:57.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:57.591 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:57.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:57.609 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:57.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:57.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:57.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:57.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:57.611 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:57.611 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:57.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:57.615 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:13:57.615 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:13:57.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:57.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:13:57.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:57.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:57.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:57.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:58.243 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:13:58.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:58.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:58.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:58.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:58.565 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:13:58.579 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:58.579 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:58.579 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:58.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:58.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:58.580 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:58.580 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:58.580 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:58.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:58.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:58.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:58.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:58.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:58.720 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:13:58.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:13:58.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:13:58.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:13:58.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:13:59.198 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:13:59.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:59.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:59.242 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:59.242 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:59.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:13:59.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:13:59.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:13:59.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:59.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:59.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:59.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:13:59.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:13:59.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:13:59.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:13:59.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:13:59.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:59.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:13:59.676 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:14:00.154 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:14:00.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:00.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:00.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:00.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:00.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:00.217 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:00.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:00.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:00.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:00.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:00.218 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:00.218 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:00.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:00.255 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:00.255 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:00.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:00.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:00.630 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:14:01.108 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:14:01.586 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:14:02.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:02.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:02.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:02.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:02.046 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:02.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:02.064 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:14:02.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:02.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:02.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:02.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:02.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:02.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:02.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:02.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:02.114 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:02.114 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:02.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:02.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:02.542 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:14:03.020 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:14:03.499 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:14:03.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:03.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:03.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:03.959 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:03.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:03.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:03.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:03.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:03.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:03.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:03.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:03.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:03.974 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:14:03.974 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:03.974 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:03.974 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:03.974 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:03.974 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:08.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:08.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:08.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:08.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:08.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:08.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:08.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:08.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:08.990 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:08.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:08.990 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:14:08.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:14:08.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:14:08.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:08.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:08.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:08.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:14:08.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:08.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:14:08.995 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:14:08.995 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:14:08.995 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:08.995 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:08.995 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:08.996 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:14:08.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:08.996 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:14:08.997 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:14:08.997 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:14:08.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:08.997 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:08.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:08.998 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:14:08.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:08.998 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.000 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:14:09.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:14:09.000 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:14:09.001 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:09.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:09.005 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:14:09.489 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:14:09.531 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:14:09.533 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:14:09.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:09.535 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:14:09.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:09.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:09.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:09.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:09.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:09.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:09.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:09.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:09.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:09.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:09.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:09.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:09.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:09.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:09.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:09.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:09.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:09.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:09.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:09.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:09.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:09.782 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:09.782 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:14:09.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:09.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:09.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:09.954 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:09.966 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:14:09.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:09.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:09.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:09.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:09.976 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:09.976 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:09.977 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:09.977 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:10.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:10.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:10.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:10.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:10.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:10.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:10.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:10.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:10.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:10.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:10.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:10.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:10.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:10.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:10.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:10.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:10.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:10.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:10.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:10.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:10.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:10.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:10.259 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:10.259 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:10.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:10.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:10.444 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:14:10.922 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:14:11.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:11.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:11.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:11.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:11.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:11.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:11.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:11.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:11.081 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:11.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:11.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:11.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:11.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:11.092 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:11.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:11.092 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:11.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:11.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:11.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:11.092 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.093 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.094 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.094 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.094 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.094 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:11.094 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:16.092 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:16.092 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:16.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:16.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:16.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:16.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:16.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:16.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:16.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:16.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:16.104 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:14:16.108 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:14:16.108 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:14:16.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:16.108 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:16.108 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:16.108 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:14:16.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:16.109 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:14:16.112 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:14:16.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:14:16.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:16.113 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:16.113 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:16.113 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:14:16.113 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:16.113 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:14:16.117 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:14:16.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:14:16.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:16.117 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:16.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:16.117 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:14:16.118 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:16.118 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:14:16.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:14:16.124 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:14:16.124 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:14:16.124 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:16.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:14:16.612 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:14:16.659 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:14:16.660 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:14:16.662 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:14:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:16.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:16.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:16.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:16.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:16.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:16.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:16.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:16.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:16.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:16.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:16.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:16.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.816 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:16.816 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:16.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:16.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:16.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:16.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.835 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:16.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:16.835 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:16.835 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:16.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:16.848 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:16.848 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:14:16.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:16.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:16.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:16.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:16.998 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:17.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:17.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:17.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:17.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:17.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:17.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:17.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:17.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:17.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:17.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:17.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:17.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:17.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:17.088 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:14:17.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:17.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:17.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:17.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:17.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:17.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:17.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:17.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:17.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:17.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:17.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:17.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:17.327 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:17.327 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:17.327 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:17.327 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:17.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:17.372 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:17.372 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:17.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:17.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:17.565 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:14:18.043 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:14:18.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:18.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:18.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:18.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:18.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:18.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:18.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:18.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:18.201 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:18.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:18.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:18.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:18.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:18.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:18.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:18.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:18.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:18.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:18.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:18.212 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:14:18.213 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:18.213 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:18.213 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:18.213 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:18.213 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:18.213 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:18.213 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:23.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:23.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:23.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:23.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:23.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:23.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:23.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:23.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:23.226 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:23.226 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:23.226 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:14:23.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:14:23.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:14:23.232 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:23.232 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:23.232 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:23.232 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:14:23.233 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:23.233 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:14:23.235 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:14:23.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:14:23.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:23.236 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:23.236 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:23.236 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:14:23.236 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:23.236 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:14:23.238 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:14:23.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:14:23.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:23.239 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:23.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:23.239 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:14:23.239 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:23.239 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:14:23.242 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:14:23.243 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:14:23.243 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:14:23.243 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.243 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:23.248 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:14:23.726 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:14:23.771 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:14:23.773 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:14:23.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:23.775 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:14:23.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:23.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:23.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:23.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:23.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:23.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:23.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:23.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:23.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:23.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:23.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:23.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:23.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:23.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:23.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:23.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:23.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:23.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:23.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:23.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:23.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:23.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:23.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:23.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:23.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:24.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:24.019 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:24.019 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:14:24.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:24.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:24.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:24.189 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:24.202 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:14:24.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:24.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:24.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:24.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:24.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:24.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:24.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:24.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:24.246 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:24.246 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:24.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:24.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:24.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:24.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:24.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:24.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.434 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:24.434 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:24.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:24.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:24.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:24.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:24.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:24.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:24.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:24.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:24.494 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:24.494 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:24.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:24.678 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:14:25.156 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:14:25.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:25.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:25.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:25.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:25.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:25.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:25.315 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:25.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:25.316 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:25.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:25.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:25.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:25.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:25.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:25.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:25.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:25.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:25.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:25.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:25.328 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:14:25.328 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:25.328 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:25.328 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:25.328 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:25.328 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:25.328 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:30.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:30.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:30.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:30.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:30.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:30.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:30.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:30.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:30.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:30.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:30.341 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:14:30.343 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:14:30.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:14:30.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:30.344 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:30.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:30.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:14:30.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:30.345 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:14:30.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:14:30.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:14:30.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:30.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:30.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:30.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:14:30.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:30.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:14:30.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:14:30.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:14:30.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:30.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:30.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:30.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:14:30.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:30.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.352 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:14:30.352 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:14:30.352 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:14:30.352 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:30.357 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:14:30.841 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:14:30.876 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:14:30.876 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:14:30.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:30.878 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:14:30.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:30.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:30.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:30.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:30.907 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:30.907 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:30.907 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:30.907 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:30.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:30.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:30.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:30.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:30.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:31.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:31.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:31.081 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:31.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:31.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:31.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:31.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:31.083 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:31.083 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:31.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:31.137 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:31.137 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:14:31.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:31.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:31.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:31.304 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:31.318 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:14:31.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:31.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:31.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:31.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:31.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:31.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:31.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:31.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:31.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:31.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:31.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:31.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:31.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:31.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:31.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:31.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:31.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:31.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:31.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:31.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:31.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:31.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:31.570 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:31.570 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:31.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:31.612 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:31.612 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:31.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:31.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:14:32.273 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:14:32.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:32.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:32.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:32.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:32.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:32.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:32.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:32.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:32.433 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:32.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:32.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:32.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:32.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:32.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:32.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:32.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:32.446 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:14:32.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:32.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:32.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:32.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:32.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:32.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:32.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:32.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:32.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:32.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:37.445 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:37.445 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:37.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:37.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:37.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:37.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:37.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:37.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:37.455 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:37.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:37.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:14:37.459 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:14:37.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:14:37.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:37.460 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:37.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:37.460 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:14:37.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:37.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:14:37.463 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:14:37.463 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:14:37.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:37.463 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:37.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:37.463 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:14:37.463 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:37.463 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:14:37.465 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:14:37.465 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:14:37.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:37.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:37.466 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:37.466 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:14:37.466 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:37.466 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:14:37.469 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:14:37.469 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:14:37.469 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:14:37.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:37.474 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:14:37.957 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:14:37.997 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:14:38.000 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:14:38.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:38.003 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:14:38.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:38.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:38.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:38.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:38.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:38.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:38.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:38.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:38.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:38.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:38.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:38.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:38.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:38.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:38.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:38.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:38.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:38.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:38.395 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:38.395 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:38.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:38.432 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:38.432 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:14:38.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.434 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:14:38.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:38.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:38.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:38.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:38.912 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:14:38.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:38.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:38.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:38.930 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:38.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:38.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:38.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:38.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:38.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:38.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:38.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:38.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:38.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:38.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:38.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:38.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:39.389 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:14:39.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:39.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:39.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:39.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:39.867 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:14:40.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:40.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:40.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:40.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:40.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:40.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:40.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:40.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:40.048 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:40.048 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:40.048 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:40.048 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:40.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:40.114 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:40.114 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:40.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:40.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:40.345 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:14:40.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:40.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:40.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:40.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:40.823 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:14:41.301 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:14:41.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:41.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:41.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:41.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:41.780 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:14:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:42.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:42.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:42.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:42.102 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:42.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:42.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:42.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:42.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:42.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:42.108 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:42.108 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:42.108 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:14:42.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:42.109 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:42.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:42.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:42.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:42.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:42.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:42.109 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:47.112 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:47.112 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:47.113 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:47.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:47.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:47.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:47.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:47.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:47.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:47.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:47.123 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:14:47.124 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:14:47.124 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:14:47.124 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:47.124 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:47.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:47.125 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:14:47.125 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:47.125 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:14:47.126 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:14:47.127 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:14:47.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:47.127 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:47.127 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:47.127 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:14:47.127 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:47.127 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:14:47.129 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:14:47.129 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:14:47.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:47.129 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:47.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:47.129 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:14:47.129 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:47.129 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:14:47.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:14:47.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:14:47.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:14:47.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:14:47.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:14:47.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:14:47.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:14:47.133 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:14:47.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:47.138 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:14:47.622 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:14:47.660 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:14:47.662 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:14:47.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:47.663 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:14:47.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:47.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:47.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:47.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:47.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:47.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:47.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:47.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:47.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:47.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:47.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:47.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:47.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:48.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:48.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:48.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:48.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:48.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:48.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:48.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:48.061 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:48.061 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:48.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:48.098 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:14:48.103 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:48.103 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:14:48.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:48.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:48.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:48.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:48.575 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:14:48.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:48.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:48.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:48.593 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:48.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:48.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:48.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:48.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:48.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:48.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:48.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:48.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:48.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:48.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:48.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:48.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:49.053 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:14:49.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:49.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:49.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:49.531 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:14:49.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:49.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:49.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:49.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:49.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:49.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:49.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:49.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:49.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:49.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:49.704 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:49.704 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:49.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:49.716 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:49.716 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:49.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:49.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:50.008 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:14:50.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:50.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:50.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:50.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:50.487 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:14:50.966 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:14:51.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:51.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:51.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:51.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:51.444 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:14:51.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:51.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:51.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:51.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:51.765 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:51.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:51.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:51.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:51.771 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:51.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:51.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:51.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:51.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:51.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:51.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:51.772 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:51.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:14:56.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:14:56.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:14:56.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:56.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:56.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:56.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:56.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:14:56.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:56.785 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:56.786 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:14:56.786 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:14:56.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:14:56.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:14:56.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:56.790 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:56.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:14:56.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:14:56.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:14:56.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:14:56.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:14:56.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:14:56.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:56.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:56.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:14:56.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:14:56.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:14:56.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:14:56.796 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:14:56.796 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:14:56.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:56.796 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:14:56.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:14:56.796 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:14:56.796 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:14:56.796 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:14:56.800 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:14:56.800 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:14:56.800 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:14:56.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:14:56.805 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:14:57.289 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:14:57.330 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:14:57.333 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:14:57.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:57.336 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:14:57.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:57.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:57.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:57.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:57.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:57.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:57.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:57.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:57.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:57.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:57.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:57.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:57.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:57.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:57.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:57.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:57.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:57.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:57.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:57.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:57.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:57.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:57.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:57.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:57.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:57.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:14:57.770 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:57.770 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:14:57.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:57.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:57.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:57.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:58.244 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:14:58.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:58.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:58.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:58.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:58.263 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:14:58.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:58.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:58.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:58.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:58.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:58.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:58.286 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:58.286 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:58.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:58.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:58.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:58.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:58.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:58.721 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:14:58.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:58.804 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:58.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:58.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:14:59.199 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:14:59.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:59.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:59.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:59.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:59.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:14:59.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:14:59.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:14:59.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:59.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:14:59.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:14:59.380 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:14:59.380 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:14:59.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:14:59.438 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:14:59.438 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:14:59.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:59.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:14:59.676 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:14:59.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:14:59.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:14:59.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:14:59.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:00.155 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:15:00.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:15:00.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:00.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:00.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:00.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:01.111 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:15:01.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:01.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:01.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:01.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:01.433 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:01.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:01.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:01.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:01.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:01.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:01.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:01.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:01.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:01.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:01.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:01.439 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:15:01.439 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:01.439 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:01.439 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:01.439 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:01.439 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:01.439 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:06.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:06.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:06.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:06.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:06.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:06.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:06.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:06.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:06.453 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:06.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:06.453 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:15:06.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:15:06.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:15:06.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:06.458 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:06.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:06.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:15:06.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:06.459 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:15:06.464 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:15:06.464 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:15:06.464 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:06.464 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:06.465 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:06.465 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:15:06.465 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:06.465 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:15:06.470 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:15:06.470 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:15:06.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:06.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:06.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:06.471 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:15:06.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:06.471 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:15:06.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:15:06.478 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:15:06.478 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:15:06.478 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:15:06.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:06.483 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:15:06.967 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:15:07.016 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:15:07.018 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:15:07.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:07.020 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:15:07.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:07.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:07.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:07.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:07.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:07.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:07.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:07.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:07.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:07.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:07.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:07.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:07.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:07.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:07.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:07.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:07.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:07.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:07.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:07.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:07.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:07.444 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:15:07.450 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:07.450 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:15:07.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:07.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:07.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:07.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:07.923 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:15:07.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:07.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:07.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:07.941 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:07.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:07.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:07.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:07.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:07.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:07.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:07.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:07.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:07.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:07.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:07.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:07.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:08.400 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:15:08.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:08.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:08.485 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:08.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:08.873 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:15:09.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:09.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:09.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:09.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:09.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:09.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:09.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:09.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:09.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:09.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:09.052 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:09.052 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:09.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:09.112 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:09.113 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:09.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:09.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:09.351 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:15:09.484 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:09.484 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:09.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:09.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:09.829 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:15:10.307 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:15:10.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:10.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:10.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:10.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:10.786 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:15:11.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:11.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:11.108 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:11.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:11.108 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:11.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:11.114 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:11.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:16.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:16.118 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:16.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:16.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:16.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:16.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:16.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:16.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:16.131 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:16.131 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:16.132 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:15:16.137 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:15:16.137 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:15:16.137 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:16.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:16.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:16.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:15:16.139 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:16.139 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:15:16.141 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:15:16.141 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:15:16.141 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:16.141 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:16.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:16.142 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:15:16.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:16.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:15:16.144 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:15:16.144 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:15:16.144 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:16.144 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:16.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:16.144 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:15:16.145 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:16.145 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:15:16.148 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:15:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:15:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:15:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:15:16.148 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:15:16.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:15:16.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:15:16.149 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:15:16.149 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:15:16.149 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:16.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:16.154 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:15:16.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:15:16.681 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:15:16.683 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:15:16.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:16.685 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:15:16.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:16.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:16.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:16.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:16.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:16.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:16.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:16.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:16.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:16.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:16.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:16.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:16.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:16.717 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:15:16.717 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:16.717 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:16.717 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:16.717 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:21.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:21.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:21.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:21.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:21.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:21.721 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:21.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:21.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:21.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:21.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:21.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:15:21.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:15:21.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:15:21.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:21.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:21.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:21.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:15:21.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:21.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:15:21.735 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:15:21.735 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:15:21.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:21.735 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:21.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:21.735 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:15:21.735 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:21.735 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:15:21.737 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:15:21.737 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:15:21.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:21.737 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:21.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:21.738 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:15:21.738 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:21.738 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:15:21.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:15:21.743 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:15:21.743 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:15:21.743 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:21.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:21.748 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:15:22.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:15:22.278 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:15:22.280 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:15:22.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:22.283 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:15:22.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:22.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:22.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:22.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:22.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:22.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:22.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:22.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:22.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:22.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:22.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:22.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:22.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:22.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:22.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:22.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:22.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:22.349 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:15:27.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:27.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:27.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:27.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:27.356 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:27.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:27.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:27.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:27.368 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:27.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:27.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:15:27.374 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:15:27.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:15:27.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:27.375 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:27.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:27.375 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:15:27.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:27.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:15:27.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:15:27.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:15:27.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:27.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:27.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:27.380 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:15:27.380 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:27.380 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:15:27.383 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:15:27.383 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:15:27.383 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:27.384 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:27.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:27.384 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:15:27.384 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:27.384 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:15:27.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:15:27.390 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:15:27.390 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:15:27.390 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:27.395 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:15:27.877 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:15:27.930 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:15:27.932 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:15:27.934 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:15:27.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:27.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:27.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:27.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:27.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:27.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:27.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:27.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:27.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:27.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:27.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:27.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:27.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:27.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:27.976 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:15:27.976 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:27.976 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:27.976 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:27.976 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:27.976 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:27.976 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:15:32.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:32.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:32.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:32.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:32.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:32.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:32.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:32.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:32.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:32.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:32.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:15:32.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:15:32.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:15:32.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:32.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:32.991 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:32.991 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:15:32.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:32.991 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:15:32.993 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:15:32.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:15:32.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:32.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:32.993 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:15:32.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:32.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:32.993 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:15:32.997 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:15:32.997 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:15:32.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:32.997 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:32.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:32.997 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:15:32.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:32.998 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.002 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:15:33.002 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:15:33.003 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:15:33.003 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.004 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:33.005 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:33.005 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:15:33.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:38.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:38.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:38.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:38.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:38.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:38.012 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:38.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:38.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:38.021 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:38.021 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:15:38.021 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:15:38.024 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:15:38.024 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:15:38.024 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:38.025 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:38.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:38.025 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:15:38.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:15:38.025 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:15:38.027 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:15:38.027 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:15:38.027 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:38.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:38.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:38.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:15:38.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:15:38.028 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:15:38.029 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:15:38.030 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:15:38.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:38.030 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:15:38.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:38.030 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:15:38.030 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:15:38.030 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:15:38.033 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:15:38.033 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:15:38.033 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.033 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:15:38.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:38.038 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:15:38.518 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:15:38.563 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:15:38.565 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:15:38.567 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:15:38.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:38.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:38.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:38.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:38.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:38.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:38.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:38.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:38.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:38.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:38.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:38.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:38.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:38.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:38.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:15:39.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:39.036 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:39.036 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:39.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:39.473 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:15:39.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:39.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:39.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:39.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:39.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:39.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:39.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:39.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:39.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:39.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:39.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:39.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:39.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:39.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:39.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:39.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:39.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:39.950 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:15:40.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:40.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:40.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:40.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:40.429 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:15:40.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:40.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:40.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:40.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:40.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:40.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:40.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:40.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:40.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:40.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:40.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:40.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:40.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:40.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:40.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:40.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:40.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:40.906 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:15:41.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:41.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:41.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:41.038 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:41.384 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:15:41.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:41.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:41.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:41.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:41.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:41.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:41.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:41.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:41.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:41.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:41.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:41.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:41.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:41.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:41.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:41.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:41.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:41.860 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:15:42.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:42.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:42.338 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:15:42.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:42.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:42.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:42.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:42.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:42.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:42.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:42.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:42.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:42.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:42.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:42.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:42.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:42.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:42.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:42.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:42.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:42.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:15:43.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:43.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:43.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:43.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:43.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:43.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:43.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:43.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:43.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:43.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:43.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:43.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:43.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:43.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:43.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:43.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:43.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:43.201 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:43.201 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:15:43.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:43.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:43.293 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:15:43.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:43.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:43.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:43.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:43.767 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:43.771 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:15:43.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:43.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:43.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:43.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:43.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:43.788 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:43.788 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:43.788 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:43.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:43.827 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:43.827 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-02-19 05:15:43.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:43.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:44.249 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:15:44.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:44.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:44.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:44.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:44.382 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:44.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:44.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:44.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:44.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:44.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:44.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:44.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:44.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:44.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:44.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:44.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:44.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:44.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:44.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:44.727 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:15:45.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:45.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:45.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:45.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:45.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:45.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:45.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:45.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:45.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:45.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:45.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:45.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:45.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:45.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:45.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:45.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:45.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:15:45.682 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:15:45.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:45.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:45.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:45.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:45.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:45.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:45.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:45.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:45.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:45.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:45.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:45.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:45.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:15:45.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:45.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:45.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:45.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:45.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.160 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:15:46.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:46.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:46.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:46.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:46.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:46.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:46.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:46.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:46.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:46.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:46.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:46.354 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:46.354 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:15:46.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.638 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:15:46.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:46.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:46.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:46.950 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:46.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:46.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:46.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:46.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:46.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:46.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:46.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:46.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:46.964 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:46.964 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:15:46.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:46.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:47.115 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:15:47.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:47.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:47.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:47.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:47.561 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:47.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:47.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:47.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:47.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:47.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:47.573 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:47.573 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:47.573 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:47.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:47.587 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:47.587 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:47.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:47.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:47.593 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:15:48.070 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:15:48.549 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:15:48.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:48.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:48.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:48.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:48.552 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:48.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:48.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:48.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:48.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:48.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:48.567 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:48.567 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:48.567 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:48.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:48.604 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:48.604 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:48.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:48.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:49.026 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:15:49.505 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:15:49.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:49.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:49.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:49.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:49.535 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:49.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:49.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:49.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:49.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:49.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:49.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:49.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:49.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:49.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:49.607 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:49.608 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:49.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:49.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:49.983 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:15:50.461 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:15:50.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:50.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:50.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:50.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:50.510 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:50.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:50.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:50.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:50.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:50.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:50.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:50.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:50.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:50.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:50.558 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:50.558 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:50.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:50.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:50.939 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:15:51.418 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:15:51.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:51.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:51.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:51.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:51.485 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:51.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:51.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:51.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:51.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:51.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:51.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:51.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:51.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:51.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:51.512 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:51.512 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:51.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:51.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:51.895 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:15:52.373 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:15:52.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:52.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:52.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:52.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:52.459 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:52.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:52.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:52.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:52.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:52.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:52.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:52.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:52.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:52.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:52.520 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:52.521 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:52.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:52.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:52.851 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:15:53.329 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:15:53.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:53.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:53.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:53.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:53.433 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:53.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:53.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:53.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:53.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:53.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:53.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:53.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:53.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:53.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:53.473 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:53.473 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:53.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:53.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:53.806 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:15:54.284 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:15:54.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:54.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:54.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:54.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:54.408 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:54.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:54.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:54.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:15:54.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:54.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:15:54.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:15:54.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:15:54.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:15:54.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:54.478 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:15:54.478 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:15:54.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:54.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:54.762 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:15:55.240 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:15:55.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:15:55.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:15:55.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:15:55.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:15:55.382 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:15:55.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:15:55.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:15:55.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:15:55.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:15:55.387 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:15:55.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:15:55.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:15:55.387 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:15:55.387 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:15:55.387 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:15:55.387 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:16:00.390 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:16:00.390 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:16:00.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:00.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:00.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:00.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:00.403 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:00.404 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:16:00.404 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:00.405 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:16:00.405 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:16:00.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:16:00.410 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:16:00.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:16:00.411 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:00.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:00.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:16:00.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:16:00.412 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:16:00.414 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:16:00.414 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:16:00.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:16:00.415 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:00.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:00.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:16:00.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:16:00.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:16:00.417 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:16:00.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:16:00.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:16:00.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:00.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:00.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:16:00.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:16:00.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:16:00.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:16:00.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:16:00.421 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:16:00.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:00.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:00.426 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:16:00.910 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:16:00.950 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:16:00.952 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:16:00.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:00.955 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:16:00.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:00.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:00.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:16:00.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:00.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:00.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:00.985 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:16:00.985 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:16:01.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:01.011 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:01.011 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:01.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:01.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:01.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:01.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:01.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:01.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:16:01.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:01.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:01.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:16:01.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:16:01.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:01.282 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:01.282 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:01.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.387 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:16:01.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:16:01.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:16:01.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:16:01.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:16:01.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:01.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:01.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:01.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:01.536 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:01.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:16:01.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:01.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:01.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:16:01.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:16:01.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:01.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:01.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:01.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:01.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:01.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:01.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:01.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:01.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:16:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:01.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:01.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:16:01.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:16:01.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:01.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:16:01.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:16:01.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:01.863 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:16:02.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:16:02.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:16:02.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:16:02.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:16:02.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:16:02.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:16:02.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:16:02.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:16:02.048 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:02.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:02.048 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:02.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:02.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:16:02.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:16:02.048 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:16:02.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:16:02.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:16:02.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:16:02.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:16:02.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:16:02.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:16:02.048 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:16:07.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:16:07.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:16:07.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:07.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:07.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:07.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:07.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:07.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:16:07.063 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:07.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:16:07.063 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:16:07.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:16:07.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:16:07.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:16:07.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:07.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:07.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:16:07.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:16:07.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:16:07.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:16:07.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:16:07.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:16:07.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:07.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:07.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:16:07.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:16:07.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:16:07.072 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:16:07.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:16:07.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:16:07.072 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:07.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:07.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:16:07.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:16:07.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:16:07.076 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:16:07.076 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:16:07.076 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:07.081 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:16:07.564 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:16:08.043 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:16:08.519 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:16:08.997 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:16:09.475 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:16:09.953 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:16:10.432 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:16:10.910 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:16:11.387 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:16:11.865 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:16:12.342 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:16:12.820 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:16:13.298 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:16:13.776 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:16:14.254 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:16:14.731 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:16:15.209 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:16:15.687 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:16:16.164 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:16:16.643 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:16:17.122 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:16:17.602 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:16:18.080 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:16:18.559 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:16:19.038 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:16:19.519 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:16:20.000 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:16:20.482 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:16:20.963 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:16:21.441 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:16:21.919 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:16:22.401 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:16:22.882 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:16:23.364 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:16:23.844 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:16:24.325 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:16:24.805 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:16:25.285 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:16:25.764 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:16:26.242 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:16:26.720 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:16:27.198 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:16:27.679 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:16:28.157 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:16:28.635 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:16:29.110 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:16:29.586 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:16:30.064 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:16:30.542 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:16:31.021 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:16:31.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:31.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:31.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:31.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:31.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:16:31.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:16:31.136 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:16:36.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:16:36.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:16:36.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:36.141 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:36.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:36.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:36.151 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:16:36.151 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:16:36.151 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:36.152 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:16:36.152 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:16:36.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:16:36.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:16:36.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:16:36.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:36.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:16:36.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:16:36.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:16:36.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:16:36.157 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:16:36.157 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:16:36.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:16:36.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:36.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:16:36.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:16:36.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:16:36.158 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:16:36.160 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:16:36.160 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:16:36.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:16:36.160 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:16:36.160 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:16:36.160 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:16:36.160 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:16:36.160 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:16:36.163 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:16:36.163 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:16:36.163 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:16:36.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:16:36.168 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:16:36.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:16:37.126 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:16:37.604 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:16:38.082 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:16:38.558 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:16:39.036 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:16:39.514 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:16:39.992 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:16:40.471 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:16:40.950 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:16:41.428 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:16:41.906 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:16:42.384 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:16:42.862 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:16:43.340 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:16:43.818 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:16:44.295 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:16:44.773 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:16:45.251 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:16:45.729 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:16:46.206 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:16:46.684 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:16:47.163 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:16:47.640 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:16:48.118 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:16:48.599 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:16:49.077 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:16:49.554 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:16:50.033 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:16:50.511 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:16:50.989 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:16:51.467 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:16:51.944 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:16:52.422 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:16:52.900 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:16:53.378 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:16:53.855 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:16:54.334 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:16:54.812 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:16:55.290 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:16:55.767 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:16:56.245 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:16:56.722 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:16:57.201 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:16:57.681 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:16:58.160 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:16:58.638 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:16:59.116 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:16:59.596 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:17:00.075 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:17:00.553 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:17:01.033 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:17:01.512 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:17:01.990 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:17:02.467 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:17:02.947 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:17:03.428 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:17:03.908 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:17:04.387 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:17:04.867 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:17:05.345 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:17:05.823 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:17:06.301 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:17:06.779 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:17:07.258 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:17:07.737 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:17:08.214 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:17:08.691 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:17:09.169 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:17:09.647 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:17:10.124 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:17:10.602 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 05:17:11.080 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 05:17:11.559 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 05:17:12.036 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 05:17:12.516 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 05:17:12.994 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 05:17:13.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:13.475 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 05:17:13.954 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 05:17:14.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:14.432 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 05:17:14.910 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 05:17:15.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:15.388 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 05:17:15.866 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 05:17:16.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:16.344 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 05:17:16.822 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 05:17:17.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:17.300 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 05:17:17.779 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 05:17:18.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:18.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:17:18.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:17:18.204 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:17:18.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:17:18.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:17:18.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:17:18.206 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:17:23.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:17:23.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:17:23.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:17:23.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:17:23.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:17:23.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:17:23.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:17:23.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:17:23.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:23.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:17:23.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:17:23.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:17:23.236 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:17:23.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:17:23.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:23.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:17:23.238 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:17:23.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:17:23.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:17:23.241 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:17:23.241 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:17:23.241 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:17:23.241 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:23.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:17:23.242 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:17:23.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:17:23.242 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:17:23.244 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:17:23.245 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:17:23.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:17:23.245 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:23.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:17:23.245 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:17:23.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:17:23.245 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:17:23.249 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:17:23.249 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:17:23.249 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:23.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:23.254 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:17:23.736 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:17:23.779 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:17:23.780 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:23.782 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:17:23.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:23.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:23.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:23.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:17:23.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:23.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:23.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:23.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:17:23.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:17:23.830 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:23.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:23.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:23.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:23.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:23.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:24.214 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:17:24.215 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 05:17:24.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:24.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:24.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:24.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:24.692 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:17:25.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:17:25.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:25.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:25.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:25.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:25.648 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:17:26.126 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:17:26.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:26.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:26.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:26.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:26.604 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:17:27.082 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:17:27.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:27.256 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:27.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:27.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:27.560 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:17:27.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:27.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:27.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:27.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:27.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:27.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:27.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:17:27.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:27.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:27.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:27.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:17:27.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:17:27.699 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:27.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:27.706 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:17:27.706 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:17:27.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:27.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:28.038 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:17:28.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:28.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:28.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:28.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:28.516 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:17:28.995 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:17:29.473 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:17:29.952 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:17:30.430 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:17:30.908 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:17:31.386 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:17:31.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:31.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:31.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:31.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:31.778 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:17:31.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:31.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:31.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:17:31.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:31.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:31.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:31.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:17:31.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:17:31.804 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:31.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:31.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:31.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:31.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:31.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:31.863 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:17:32.299 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 05:17:32.340 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:17:32.818 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:17:33.297 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:17:33.774 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:17:34.252 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:17:34.729 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:17:35.207 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:17:35.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:35.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:35.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:35.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:35.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:35.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:35.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:17:35.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:35.668 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:35.668 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:35.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:17:35.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:17:35.674 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:35.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:35.678 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:17:35.678 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:17:35.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:35.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:35.684 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:17:36.075 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 05:17:36.162 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:17:36.640 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:17:37.119 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:17:37.598 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:17:38.076 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:17:38.552 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:17:39.030 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:17:39.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:39.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:39.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:39.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:39.426 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:17:39.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:39.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:39.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:39.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:39.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:17:39.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:17:39.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:17:39.438 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:39.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:17:39.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:17:39.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:39.438 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:17:44.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:17:44.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:17:44.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:17:44.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:17:44.441 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:17:44.441 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:17:44.448 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:17:44.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:17:44.450 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:44.450 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:17:44.450 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:17:44.456 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:17:44.456 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:17:44.456 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:17:44.456 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:44.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:17:44.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:17:44.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:17:44.457 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:17:44.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:17:44.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:17:44.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:17:44.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:44.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:17:44.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:17:44.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:17:44.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:17:44.464 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:17:44.464 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:17:44.464 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:17:44.465 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:17:44.465 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:17:44.465 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:17:44.465 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:17:44.465 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:17:44.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:17:44.470 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:17:44.470 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:17:44.470 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:17:44.475 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:17:44.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:17:45.000 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:17:45.002 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:45.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:45.004 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:17:45.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:45.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:45.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:17:45.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:45.025 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:45.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:45.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:17:45.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:17:45.052 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:45.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:45.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:45.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:45.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:45.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:45.436 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:17:45.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:45.474 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:45.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:45.914 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:17:45.930 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:45.933 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 05:17:46.391 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:17:46.416 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:46.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:46.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:46.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:46.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:46.869 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:17:46.904 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:47.347 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:17:47.391 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:47.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:47.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:47.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:47.476 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:17:47.878 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:48.303 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:17:48.365 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:48.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:48.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:48.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:48.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:48.781 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:17:48.853 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:49.259 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:17:49.339 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:49.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:17:49.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:17:49.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:17:49.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:17:49.737 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:17:49.827 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:50.215 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:17:50.314 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:50.693 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:17:50.801 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:51.171 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:17:51.289 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:51.649 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:17:51.776 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:52.127 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:17:52.263 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:52.606 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:17:52.751 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:53.083 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:17:53.237 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:53.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:53.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:53.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:53.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:53.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:17:53.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:17:53.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:17:53.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:53.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:17:53.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:17:53.262 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:17:53.262 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:17:53.264 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:53.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:17:53.268 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:17:53.268 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:17:53.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:53.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:17:53.560 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:17:53.965 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:54.039 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:17:54.453 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:54.518 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:17:54.940 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:54.997 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:17:55.429 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:55.474 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:17:55.915 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:55.953 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:17:56.403 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:56.431 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:17:56.890 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:56.910 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:17:57.378 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:57.388 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:17:57.866 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:57.866 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:17:58.347 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:17:58.364 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:58.826 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:17:58.852 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:59.304 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:17:59.338 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:17:59.782 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:17:59.825 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:00.260 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:18:00.313 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:00.739 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:18:00.801 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:01.218 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:18:01.289 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:01.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:01.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:01.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:01.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:01.294 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:18:01.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:01.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:01.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:01.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:01.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:01.303 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:01.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:01.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:01.306 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:01.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:01.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:01.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:01.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:01.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:01.654 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:01.657 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 05:18:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:18:02.129 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:02.172 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:18:02.607 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:02.649 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:18:03.085 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:03.127 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:18:03.563 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:03.605 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:18:04.040 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:04.082 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:18:04.518 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:04.560 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:18:04.996 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:05.038 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:18:05.474 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:05.516 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:18:05.952 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:05.994 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:18:06.429 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:06.471 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:18:06.907 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:06.949 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:18:07.385 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:07.427 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:18:07.897 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:07.905 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:18:08.340 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:08.382 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:18:08.818 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:08.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:08.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:08.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:08.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:08.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:08.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:08.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:08.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:08.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:08.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:08.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:08.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:08.850 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:08.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:08.855 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:18:08.855 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:18:08.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:08.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:08.859 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:18:09.250 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:09.253 [DEBUG] fake_trx.py:269 (MS@172.18.36.22:6700) Recv SETTA cmd
2026-02-19 05:18:09.337 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:18:09.727 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:09.816 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:18:10.206 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:10.294 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:18:10.683 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:10.773 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:18:11.163 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:11.251 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:18:11.640 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:11.729 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:18:12.119 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:12.208 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:18:12.598 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:12.686 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:18:13.076 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:13.164 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:18:13.555 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:13.643 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:18:14.033 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:14.121 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:18:14.512 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:14.599 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:18:14.989 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:15.078 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:18:15.468 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:15.556 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:18:15.946 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:16.034 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:18:16.425 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:16.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:16.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:16.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:16.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:16.433 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:18:16.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:16.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:16.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:16.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:16.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:16.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:16.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:16.447 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:18:16.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6823 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:16.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:16.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:16.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:16.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6823 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:16.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6823 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:16.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6823 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:21.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:21.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:21.447 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:21.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:21.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:21.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:21.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:21.455 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:21.455 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:21.456 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:21.456 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:18:21.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:18:21.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:18:21.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:21.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:21.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:21.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:18:21.460 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:21.460 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:18:21.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:18:21.460 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:18:21.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:21.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:21.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:21.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:18:21.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:21.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:18:21.461 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:18:21.461 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:18:21.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:21.462 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:21.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:21.462 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:18:21.462 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:21.462 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:18:21.463 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:18:21.463 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:18:21.463 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:18:21.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:21.468 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:18:21.952 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:18:21.997 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:18:21.999 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:22.001 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:18:22.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:22.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:22.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:22.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:22.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:22.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:22.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:22.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:22.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:22.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:22.055 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:22.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:22.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:22.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:22.429 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:18:22.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:22.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:22.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:22.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:22.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:18:23.385 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:18:23.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:23.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:23.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:23.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:23.862 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:18:24.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:24.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:24.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:24.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:24.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:24.183 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:24.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:24.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:24.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:24.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:24.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:24.184 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:24.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:24.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:24.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:24.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:24.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:24.339 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:18:24.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:24.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:24.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:24.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:24.816 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:18:25.293 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:18:25.469 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:25.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:25.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:25.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:25.771 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:18:26.248 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:18:26.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:26.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:26.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:26.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:26.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:26.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:26.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:26.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:26.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:26.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:26.307 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:26.307 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:26.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:26.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:26.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:26.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:26.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:26.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:26.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:26.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:26.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:26.726 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:18:27.204 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:18:27.681 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:18:28.159 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:18:28.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:28.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:28.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:28.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:28.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:28.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:28.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:28.470 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:28.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:28.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:28.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:28.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:28.472 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:18:28.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:28.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:28.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:28.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:28.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:28.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:28.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:28.472 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:33.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:33.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:33.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:33.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:33.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:33.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:33.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:33.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:33.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:33.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:33.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:18:33.498 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:18:33.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:18:33.499 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:33.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:33.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:33.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:18:33.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:33.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:18:33.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:18:33.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:18:33.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:33.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:33.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:33.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:18:33.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:33.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:18:33.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:18:33.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:18:33.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:33.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:33.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:33.506 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:18:33.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:33.506 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.510 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:18:33.510 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:18:33.510 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:18:33.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:33.515 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:18:33.999 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:18:34.039 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:18:34.040 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:34.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:34.041 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:18:34.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:34.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:34.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:34.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:34.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:34.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:34.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:34.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:34.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:34.100 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:18:34.100 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:18:34.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:34.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:34.477 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:18:34.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:34.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:34.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:34.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:34.955 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:18:35.434 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:18:35.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:35.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:35.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:35.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:35.912 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:18:36.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:36.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:36.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:36.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:36.204 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:18:36.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:36.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:36.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:36.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:36.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:36.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:36.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:36.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:36.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:36.243 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:18:36.243 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:18:36.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:36.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:36.388 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:18:36.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:36.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:36.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:18:37.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:18:37.518 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:37.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:37.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:37.518 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:18:38.301 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:18:38.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:38.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:38.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:38.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:38.364 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:18:38.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:38.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:38.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:38.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:38.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:38.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:38.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:38.376 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:18:38.377 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1038 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:38.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:38.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:38.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:38.377 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1038 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:38.377 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1038 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:38.377 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1038 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:38.377 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1038 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:43.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:43.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:43.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:43.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:43.379 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:43.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:43.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:43.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:43.395 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:43.395 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:43.395 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:18:43.401 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:18:43.401 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:18:43.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:43.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:43.402 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:43.402 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:18:43.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:43.403 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:18:43.405 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:18:43.405 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:18:43.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:43.405 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:43.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:43.406 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:18:43.406 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:43.406 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:18:43.408 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:18:43.408 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:18:43.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:43.408 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:43.408 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:43.408 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:18:43.408 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:43.408 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:18:43.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:18:43.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:18:43.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:18:43.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:18:43.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:18:43.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:18:43.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:18:43.412 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:18:43.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:43.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:18:43.899 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:18:43.940 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:18:43.943 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:43.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:43.944 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:18:43.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:43.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:43.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:43.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:43.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:43.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:43.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:43.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:43.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:44.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:44.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:44.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:44.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:44.376 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:18:44.415 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:44.415 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:44.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:44.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:44.854 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:18:45.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:18:45.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:45.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:45.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:45.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:45.811 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:18:46.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:46.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:46.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:46.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:46.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:46.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:46.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:46.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:46.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:46.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:46.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:46.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:46.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:46.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:46.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:46.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:46.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:46.288 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:18:46.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:46.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:46.417 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:46.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:46.766 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:18:47.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:18:47.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:47.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:47.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:47.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:47.723 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:18:48.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:48.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:48.200 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:18:48.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:48.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:48.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:48.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:48.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:48.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:48.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:48.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:48.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:48.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:48.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:48.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:48.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:48.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:48.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:48.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:48.419 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:48.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:48.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:48.678 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:18:49.156 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:18:49.634 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:18:50.112 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:18:50.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:50.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:50.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:50.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:50.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:50.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:50.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:50.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:50.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:50.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:50.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:50.367 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:50.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:50.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:50.367 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:18:55.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:18:55.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:18:55.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:55.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:55.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:55.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:55.378 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:18:55.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:55.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:55.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:18:55.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:18:55.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:18:55.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:18:55.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:55.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:55.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:18:55.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:18:55.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:18:55.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:18:55.389 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:18:55.389 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:18:55.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:55.389 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:55.389 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:18:55.389 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:18:55.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:18:55.389 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:18:55.394 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:18:55.394 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:18:55.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:55.394 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:18:55.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:18:55.394 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:18:55.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:18:55.395 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:18:55.400 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:18:55.400 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:18:55.400 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:18:55.405 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:18:55.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:18:55.927 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:18:55.929 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:18:55.932 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:18:55.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:55.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:55.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:55.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:55.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:55.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:55.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:55.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:55.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:55.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:55.994 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:18:55.994 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:18:55.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:55.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:56.366 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:18:56.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:56.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:56.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:56.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:56.845 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:18:57.323 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:18:57.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:57.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:57.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:57.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:57.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:18:58.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:58.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:58.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:58.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:58.120 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:18:58.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:18:58.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:18:58.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:18:58.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:58.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:18:58.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:18:58.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:18:58.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:18:58.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:18:58.187 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:18:58.187 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:18:58.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:58.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:18:58.279 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:18:58.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:58.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:58.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:58.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:58.757 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:18:59.234 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:18:59.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:18:59.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:18:59.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:18:59.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:18:59.712 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:19:00.191 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:19:00.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:00.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:00.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:00.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:00.300 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:19:00.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:00.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:00.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:00.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:00.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:00.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:00.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:00.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:00.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:00.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:00.309 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:05.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:05.312 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:05.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:05.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:05.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:05.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:05.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:05.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:05.326 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:05.326 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:05.326 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:05.331 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:05.331 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:05.331 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:05.331 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:05.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:05.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:05.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:05.332 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:05.335 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:05.335 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:05.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:05.335 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:05.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:05.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:05.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:05.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:05.337 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:05.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:05.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:05.337 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:05.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:05.338 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:05.338 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:05.338 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:05.340 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:05.341 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:05.341 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:05.341 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:05.346 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:05.829 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:05.866 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:05.867 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:05.868 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:05.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:05.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:05.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:05.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:05.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:05.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:05.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:05.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:05.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:05.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:05.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:05.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:05.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:05.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:06.306 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:06.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:06.344 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:06.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:06.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:06.785 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:19:07.263 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:19:07.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:07.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:07.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:07.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:07.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:19:08.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:08.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:08.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:08.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:08.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:08.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:08.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:08.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:08.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:08.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:08.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:08.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:08.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:08.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:08.115 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:08.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=592 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=592 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=592 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.116 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.116 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.116 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.116 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.116 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:08.116 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=593 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:13.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:13.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:13.117 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:13.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:13.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:13.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:13.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:13.122 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:13.122 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:13.123 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:13.123 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:13.127 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:13.127 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:13.127 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:13.127 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:13.128 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:13.128 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:13.128 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:13.128 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:13.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:13.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:13.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:13.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:13.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:13.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:13.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:13.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:13.132 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:13.132 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:13.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:13.132 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:13.132 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:13.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:13.132 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:13.132 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:13.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:13.134 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:13.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:13.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:13.622 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:13.662 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:13.664 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:13.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:13.666 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:13.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:13.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:13.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:13.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:13.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:13.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:13.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:13.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:13.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:13.724 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:19:13.724 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:19:13.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:13.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:14.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:14.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:14.578 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:19:15.056 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:19:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:15.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:15.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:15.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:15.534 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:19:15.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:15.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:15.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:15.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:15.912 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:19:15.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:15.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:15.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:15.921 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:15.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:15.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:15.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:15.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:15.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:15.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:15.924 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:15.925 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:15.925 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:15.925 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:15.925 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:15.925 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:15.925 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=596 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:20.922 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:20.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:20.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:20.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:20.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:20.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:20.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:20.934 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:20.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:20.934 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:20.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:20.937 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:20.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:20.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:20.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:20.938 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:20.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:20.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:20.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:20.940 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:20.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:20.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:20.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:20.940 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:20.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:20.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:20.942 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:20.942 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:20.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:20.942 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:20.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:20.942 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:20.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:20.942 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:20.945 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:20.945 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:20.945 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:20.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:20.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:21.433 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:21.472 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:21.474 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:21.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:21.476 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:21.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:21.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:21.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:21.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:21.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:21.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:21.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:21.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:21.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:21.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:21.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:21.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:21.912 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:21.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:21.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:21.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:21.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:21.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:21.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:21.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:21.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:21.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:21.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:21.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:21.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:21.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:21.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:21.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:21.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:22.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:22.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:22.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:22.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:22.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:22.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:22.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:22.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:22.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:22.384 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=308 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:22.389 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:19:22.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:22.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:22.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:22.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:22.393 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:22.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:22.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:22.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:22.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:22.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:22.393 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:27.395 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:27.396 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:27.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:27.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:27.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:27.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:27.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:27.406 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:27.406 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:27.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:27.407 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:27.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:27.411 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:27.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:27.411 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:27.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:27.412 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:27.412 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:27.412 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:27.414 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:27.414 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:27.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:27.414 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:27.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:27.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:27.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:27.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:27.418 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:27.418 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:27.418 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:27.418 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:27.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:27.419 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:27.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:27.419 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:27.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:27.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:27.424 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:27.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:27.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:27.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:27.953 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:27.955 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:27.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:27.958 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:27.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:27.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:27.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:28.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:28.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:28.023 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:28.023 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:28.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:28.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:28.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:28.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.388 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:28.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:28.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:28.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:28.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:28.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:28.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:28.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:28.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:28.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:28.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:28.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.486 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:28.486 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:28.486 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:28.486 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:28.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:28.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:28.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:28.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:19:28.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:28.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:28.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:28.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:28.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:28.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:28.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:28.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:28.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:28.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:28.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:28.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:28.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:28.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:28.939 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:28.939 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:28.939 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:28.939 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:28.939 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:28.939 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:28.939 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:33.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:33.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:33.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:33.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:33.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:33.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:33.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:33.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:33.951 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:33.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:33.951 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:33.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:33.955 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:33.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:33.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:33.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:33.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:33.956 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:33.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:33.958 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:33.958 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:33.958 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:33.958 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:33.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:33.959 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:33.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:33.959 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:33.961 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:33.961 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:33.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:33.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:33.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:33.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:33.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:33.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:33.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:33.964 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:33.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:33.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:34.452 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:34.492 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:34.493 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:34.495 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:34.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:34.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:34.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:34.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:34.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:34.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:34.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:34.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:34.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:34.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:34.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:34.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:34.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:34.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:34.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:34.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:34.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:34.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:34.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:34.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:34.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:34.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:34.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:35.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:35.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:35.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:35.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:35.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:35.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:35.010 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:35.010 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:35.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:35.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:35.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:35.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:35.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:35.407 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:19:35.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:35.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:35.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:35.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:35.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:35.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:35.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:35.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:35.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:35.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:35.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:35.461 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:35.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:35.461 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:35.462 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:35.462 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:35.462 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:35.462 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:35.462 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:40.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:40.461 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:40.462 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:40.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:40.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:40.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:40.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:40.474 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:40.475 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:40.475 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:40.475 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:40.479 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:40.479 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:40.479 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:40.479 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:40.480 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:40.480 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:40.480 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:40.480 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:40.482 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:40.482 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:40.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:40.483 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:40.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:40.483 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:40.483 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:40.483 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:40.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:40.485 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:40.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:40.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:40.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:40.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:40.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:40.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.488 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:40.488 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:40.488 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:40.489 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:40.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:40.493 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:40.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:41.020 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:41.022 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:41.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:41.026 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:41.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:41.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:41.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:41.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:41.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:41.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:41.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:41.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:41.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:41.125 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:19:41.125 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:19:41.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:41.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:41.455 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:41.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:41.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:41.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:41.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:41.933 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:19:42.412 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:19:42.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:42.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:42.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:42.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:42.890 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:19:43.369 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:19:43.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:43.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:43.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:43.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:43.847 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:19:44.326 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:19:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:44.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:44.495 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:44.803 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:19:45.131 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:45.131 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:45.131 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:19:45.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:45.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:45.134 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:45.134 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:45.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:45.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:45.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:45.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:45.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:45.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:45.135 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:45.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.136 [WARNING] transceiver.py:257 (TRX2@172.18.36.20:5700/2) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.136 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.137 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:45.137 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:50.137 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:50.137 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:50.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:50.140 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:50.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:50.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:50.148 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:50.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:50.149 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:50.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:50.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:50.154 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:50.154 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:50.155 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:50.155 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:50.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:50.155 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:50.156 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:50.156 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:50.158 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:50.158 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:50.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:50.158 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:50.158 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:50.158 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:50.158 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:50.158 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:50.161 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:50.161 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:50.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:50.161 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:50.161 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:50.161 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:50.161 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:50.161 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.165 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:50.165 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:50.165 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:50.165 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.167 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:50.170 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:50.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:50.704 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:50.706 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:50.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:50.708 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:50.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:50.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:50.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:50.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:50.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:50.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:50.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:50.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:50.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:50.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:50.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:50.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:50.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:51.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:51.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:51.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:51.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:51.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:51.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:51.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:51.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:51.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:51.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:51.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:51.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:51.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:51.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:51.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:51.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:51.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:51.128 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:51.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:51.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:51.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:51.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:51.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:51.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:51.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:51.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:51.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:51.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:51.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:51.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:51.306 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:51.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:51.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:51.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:51.307 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:19:51.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:51.307 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:51.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:51.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:51.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:51.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:51.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:51.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:51.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=245 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:19:56.307 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:19:56.307 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:19:56.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:56.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:56.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:56.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:56.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:19:56.317 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:56.317 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:56.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:19:56.318 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:19:56.321 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:19:56.321 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:19:56.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:56.322 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:56.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:19:56.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:19:56.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:19:56.323 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:19:56.325 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:19:56.325 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:19:56.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:56.325 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:56.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:19:56.325 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:19:56.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:19:56.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:19:56.327 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:19:56.327 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:19:56.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:56.328 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:19:56.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:19:56.328 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:19:56.328 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:19:56.328 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:19:56.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:19:56.331 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:19:56.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:19:56.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:19:56.820 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:19:56.868 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:19:56.869 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:19:56.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:56.871 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:19:56.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:19:56.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:19:56.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:19:56.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:56.944 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:19:56.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:19:56.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:19:56.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:19:56.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:19:56.972 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:19:56.973 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:19:56.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:56.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:19:57.297 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:19:57.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:57.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:57.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:57.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:57.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:19:58.254 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:19:58.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:58.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:58.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:58.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:58.733 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:19:59.211 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:19:59.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:19:59.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:19:59.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:19:59.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:19:59.690 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:20:00.168 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:20:00.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:00.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:00.338 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:00.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:00.646 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:20:00.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:00.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:00.979 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:20:00.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:00.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:00.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:00.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:00.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:00.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:00.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:00.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:00.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:00.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:00.984 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:00.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=993 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:00.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=993 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:00.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=993 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:00.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=993 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:00.984 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=993 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:05.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:05.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:05.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:05.988 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:05.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:05.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:05.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:05.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:05.999 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:05.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:05.999 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:06.002 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:06.002 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:06.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:06.003 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:06.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:06.003 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:06.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:06.004 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:06.006 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:06.006 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:06.006 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:06.006 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:06.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:06.006 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:06.006 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:06.006 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:06.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:06.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:06.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:06.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:06.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:06.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:06.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:06.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:06.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:06.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:06.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:06.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:06.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:06.013 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:06.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:06.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:06.500 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:06.550 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:06.552 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:06.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:06.554 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:06.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:06.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:06.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:06.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:06.613 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:06.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:06.614 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:06.614 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:06.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:06.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:06.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:06.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:06.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:06.974 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:07.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:07.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:07.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:07.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:07.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:07.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:07.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:07.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:07.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:07.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:07.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:07.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:07.380 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:07.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:07.380 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:07.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:07.381 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:07.381 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:07.381 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:07.381 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:07.382 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:07.382 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:07.382 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:07.382 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:07.382 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:12.380 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:12.380 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:12.381 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:12.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:12.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:12.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:12.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:12.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:12.402 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:12.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:12.402 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:12.407 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:12.407 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:12.408 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:12.408 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:12.408 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:12.409 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:12.409 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:12.409 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:12.412 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:12.412 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:12.413 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:12.413 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:12.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:12.413 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:12.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:12.414 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:12.416 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:12.417 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:12.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:12.417 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:12.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:12.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:12.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:12.418 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:12.422 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:12.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:12.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:12.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:12.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:12.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:12.423 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:12.423 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:12.423 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:12.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:12.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:12.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:12.428 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:12.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:12.954 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:12.956 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:12.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:12.959 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:12.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:12.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:13.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:13.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:13.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:13.029 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:13.029 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:13.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:13.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:13.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:13.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:13.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:13.389 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:13.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:13.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:13.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:13.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:13.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:13.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:13.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:13.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:13.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:13.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:13.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:13.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:13.797 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:13.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:13.797 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:13.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:13.797 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:13.797 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:13.797 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:13.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:13.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:13.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:13.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:13.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:13.798 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:18.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:18.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:18.797 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:18.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:18.799 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:18.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:18.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:18.807 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:18.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:18.807 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:18.810 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:18.810 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:18.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:18.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:18.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:18.812 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:18.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:18.812 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:18.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:18.814 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:18.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:18.814 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:18.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:18.814 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:18.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:18.814 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:18.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:18.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:18.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:18.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:18.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:18.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:18.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:18.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:18.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:18.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:18.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:18.821 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:18.821 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:18.821 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:18.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:18.826 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:19.303 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:19.357 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:19.359 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:19.360 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:19.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:19.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:19.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:19.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:19.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:19.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:19.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:19.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:19.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:19.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:19.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:19.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:19.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:19.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:19.776 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:19.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:19.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:19.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:19.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:20.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:20.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:20.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:20.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:20.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:20.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:20.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:20.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:20.125 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:20.125 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:20.125 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:20.125 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:20.125 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:20.125 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:20.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:20.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:20.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:20.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:20.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:20.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:20.125 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:25.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:25.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:25.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:25.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:25.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:25.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:25.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:25.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:25.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:25.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:25.128 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:25.129 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:25.129 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:25.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:25.129 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:25.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:25.129 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:25.129 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:25.129 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:25.130 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:25.130 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:25.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:25.130 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:25.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:25.130 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:25.130 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:25.130 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:25.131 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:25.131 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:25.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:25.131 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:25.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:25.131 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:25.131 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:25.131 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:25.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:25.133 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:25.133 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:25.133 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:25.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:25.137 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:25.614 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:25.645 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:25.645 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:25.646 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:25.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:25.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:25.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:25.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:25.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:25.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:25.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:25.664 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:25.664 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:25.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:25.715 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:20:25.715 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:20:25.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:25.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:26.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:26.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:26.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:26.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:26.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:26.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:26.562 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:20:26.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:26.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:26.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:26.564 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:20:26.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:26.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:26.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:26.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:26.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:26.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:26.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:26.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:26.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:26.567 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:26.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:31.569 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:31.569 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:31.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:31.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:31.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:31.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:31.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:31.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:31.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:31.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:31.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:31.577 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:31.578 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:31.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:31.578 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:31.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:31.578 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:31.578 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:31.578 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:31.579 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:31.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:31.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:31.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:31.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:31.579 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:31.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:31.579 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:31.580 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:31.580 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:31.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:31.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:31.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:31.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:31.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:31.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:31.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:31.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:31.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:31.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:31.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:31.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:31.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:31.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:31.582 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:31.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:31.586 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:32.066 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:32.095 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:32.095 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:32.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:32.096 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:32.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:32.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:32.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:32.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:32.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:32.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:32.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:32.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:32.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:32.157 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:32.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:32.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:32.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:32.540 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:32.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:32.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:32.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:32.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:32.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:32.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:32.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:32.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:32.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:32.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:32.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:32.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:32.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:32.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:32.887 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:32.887 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:32.887 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:32.887 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:32.887 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.888 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:32.889 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=282 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:37.884 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:37.884 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:37.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:37.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:37.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:37.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:37.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:37.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:37.889 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:37.889 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:37.889 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:37.890 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:37.890 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:37.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:37.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:37.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:37.890 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:37.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:37.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:37.891 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:37.891 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:37.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:37.891 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:37.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:37.891 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:37.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:37.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:37.892 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:37.892 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:37.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:37.892 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:37.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:37.892 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:37.892 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:37.892 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:37.893 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:37.894 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:37.894 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:37.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:37.898 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:38.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:38.412 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:38.413 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:38.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:38.413 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:38.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:38.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:38.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:38.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:38.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:38.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:38.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:38.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:38.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:38.468 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:20:38.468 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:20:38.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:38.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:38.852 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:38.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:38.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:38.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:38.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:39.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:39.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:39.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:39.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:39.301 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:20:39.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:39.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:39.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:39.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:39.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:39.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:39.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:39.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:39.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:39.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:39.313 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:39.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:39.313 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:39.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:39.314 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:44.315 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:44.315 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:44.317 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:44.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:44.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:44.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:44.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:44.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:44.330 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:44.330 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:44.330 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:44.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:44.334 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:44.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:44.334 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:44.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:44.335 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:44.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:44.335 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:44.337 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:44.337 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:44.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:44.338 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:44.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:44.338 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:44.338 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:44.338 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:44.340 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:44.340 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:44.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:44.340 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:44.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:44.340 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:44.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:44.340 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.343 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:44.343 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:44.343 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:44.344 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:44.348 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:44.831 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:44.876 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:44.878 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:44.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:44.881 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:44.905 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:44.905 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:44.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:44.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:44.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:44.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:44.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:44.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:45.309 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:45.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:45.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:45.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:45.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:45.787 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:20:45.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:46.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:46.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:46.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:46.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:46.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:46.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:46.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:46.084 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:46.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:46.084 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:46.084 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:46.264 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:20:46.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:46.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:46.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:46.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:46.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:20:47.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 05:20:47.219 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:20:47.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 05:20:47.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:47.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:47.267 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:47.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:47.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:47.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:47.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:47.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:47.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:47.270 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:20:47.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:47.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:47.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:47.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:47.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:47.271 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:20:52.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:20:52.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:20:52.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:52.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:52.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:52.275 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:52.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:20:52.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:52.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:52.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:20:52.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:20:52.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:20:52.292 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:20:52.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:52.292 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:52.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:20:52.293 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:20:52.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:20:52.293 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:20:52.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:20:52.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:20:52.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:52.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:52.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:20:52.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:20:52.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:20:52.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:20:52.299 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:20:52.299 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:20:52.299 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:52.300 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:20:52.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:20:52.300 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:20:52.300 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:20:52.300 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:20:52.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:20:52.304 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:20:52.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:20:52.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:20:52.309 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:20:52.792 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:20:52.833 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:20:52.835 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:20:52.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:20:52.837 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:20:52.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:20:52.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:20:52.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:20:52.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:52.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:52.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:52.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:20:52.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:20:53.269 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:20:53.308 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:53.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:53.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:53.311 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:53.747 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:20:54.225 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:20:54.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:54.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:54.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:54.312 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:54.703 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:20:55.181 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:20:55.310 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:55.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:55.658 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:20:56.136 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:20:56.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:56.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:56.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:56.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:56.614 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:20:57.091 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:20:57.313 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:20:57.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:20:57.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:20:57.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:20:57.569 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:20:57.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 05:20:57.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:20:57.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:20:57.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:57.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:20:58.048 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:20:58.526 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:20:59.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:20:59.484 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:20:59.958 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:21:00.437 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:21:00.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:00.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:00.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:00.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:00.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:00.565 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:00.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:00.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:00.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:00.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:00.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:00.566 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:21:00.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:05.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:05.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:05.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:05.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:05.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:05.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:05.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:05.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:05.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:05.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:05.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:21:05.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:21:05.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:21:05.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:05.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:05.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:05.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:21:05.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:05.597 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:21:05.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:21:05.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:21:05.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:05.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:05.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:05.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:21:05.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:05.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:21:05.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:21:05.605 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:21:05.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:05.605 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:05.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:05.605 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:21:05.605 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:05.605 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:21:05.610 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:21:05.610 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:21:05.610 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:21:05.611 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.611 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:05.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:05.615 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:21:06.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:21:06.145 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:21:06.147 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:21:06.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:21:06.150 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:21:06.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:06.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:06.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:21:06.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:06.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:06.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:06.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:21:06.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:21:06.574 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:21:06.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:06.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:06.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:06.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:07.052 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:21:07.529 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:21:07.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:07.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:07.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:07.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:08.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:21:08.484 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:21:08.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:08.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:08.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:08.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:08.962 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:21:09.439 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:21:09.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:09.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:09.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:09.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:09.917 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:21:10.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:21:10.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:10.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:10.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:10.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:10.873 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:21:10.894 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 05:21:10.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:10.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:10.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:10.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:11.351 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:21:11.830 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:21:12.308 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:21:12.786 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:21:13.264 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:21:13.743 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:21:13.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:13.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:13.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:13.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:13.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:13.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:13.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:13.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:13.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:13.871 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:21:13.871 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:13.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:13.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:13.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:13.871 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:13.871 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:13.871 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:18.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:18.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:18.876 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:18.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:18.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:18.878 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:18.885 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:18.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:18.886 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:18.886 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:18.886 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:21:18.888 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:21:18.889 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:21:18.889 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:18.889 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:18.889 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:18.890 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:21:18.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:18.890 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:21:18.893 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:21:18.893 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:21:18.893 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:18.893 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:18.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:18.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:21:18.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:18.894 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:21:18.896 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:21:18.896 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:21:18.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:18.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:18.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:18.896 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:21:18.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:18.896 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:21:18.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:21:18.900 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:21:18.900 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:21:18.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:18.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:18.905 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:21:19.389 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:21:19.428 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:21:19.430 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:21:19.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:21:19.432 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:21:19.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:19.457 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:19.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:21:19.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:19.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:19.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:19.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:21:19.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:21:19.866 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:21:19.903 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:19.903 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:19.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:19.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:20.344 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:21:20.822 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:21:20.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:20.904 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:20.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:20.904 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:21.299 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:21:21.777 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:21:21.904 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:21.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:21.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:21.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:22.255 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:21:22.732 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:21:22.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:22.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:22.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:22.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:21:23.687 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:21:23.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:23.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:23.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:23.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:24.164 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:21:24.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 05:21:24.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:24.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:24.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:24.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:24.643 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:21:25.121 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:21:25.599 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:21:26.078 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:21:26.557 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:21:27.038 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:21:27.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:27.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:27.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:27.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:27.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:27.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:27.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:27.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:27.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:27.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:27.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:27.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:27.166 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:21:27.166 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:27.166 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:27.166 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:27.166 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:27.166 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:27.166 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:32.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:32.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:32.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:32.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:32.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:32.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:32.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:32.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:32.186 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:32.186 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:32.187 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:21:32.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:21:32.192 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:21:32.192 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:32.192 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:32.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:32.193 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:21:32.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:32.194 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:21:32.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:21:32.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:21:32.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:32.197 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:32.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:32.197 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:21:32.197 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:32.197 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:21:32.200 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:21:32.200 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:21:32.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:32.200 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:32.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:32.200 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:21:32.200 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:32.200 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:21:32.204 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:21:32.204 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:21:32.204 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:32.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:32.209 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:21:32.693 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:21:32.734 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:21:32.736 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:21:32.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:21:32.738 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:21:32.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:32.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:32.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:21:32.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:32.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:32.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:32.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:21:32.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:21:33.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:21:33.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:33.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:33.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:33.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:33.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:21:34.126 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:21:34.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:34.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:34.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:34.209 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:34.604 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:21:35.082 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:21:35.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:35.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:35.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:35.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:35.560 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:21:36.038 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:21:36.210 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:36.210 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:36.210 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:36.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:36.516 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:21:36.993 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:21:37.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:37.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:37.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:37.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:37.471 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:21:37.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 05:21:37.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:37.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:37.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:37.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:37.949 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:21:38.427 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:21:38.905 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:21:39.384 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:21:39.862 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:21:40.341 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:21:40.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:40.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:40.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:40.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:40.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:40.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:40.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:40.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:40.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:40.469 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:21:40.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:40.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:40.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:40.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:40.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:40.469 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:45.472 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:45.472 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:45.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:45.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:45.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:45.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:45.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:45.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:45.483 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:45.483 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:45.483 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:21:45.486 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:21:45.486 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:21:45.486 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:45.486 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:45.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:45.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:21:45.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:45.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:21:45.489 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:21:45.489 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:21:45.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:45.490 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:45.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:45.490 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:21:45.490 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:45.490 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:21:45.492 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:21:45.492 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:21:45.492 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:45.492 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:45.492 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:45.493 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:21:45.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:45.493 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:21:45.497 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:21:45.497 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:21:45.497 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.497 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:45.501 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:21:45.985 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:21:46.024 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:21:46.026 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:21:46.028 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:21:46.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:21:46.048 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:46.048 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:46.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:21:46.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:46.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:46.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:46.054 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:21:46.054 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:21:46.462 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:21:46.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:46.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:46.500 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:46.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:46.940 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:21:47.418 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:21:47.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:47.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:47.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:47.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:47.895 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:21:48.373 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:21:48.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:48.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:48.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:48.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:48.851 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:21:49.329 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:21:49.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:49.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:49.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:49.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:49.806 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:21:50.284 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:21:50.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:50.505 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:50.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:50.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:50.762 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:21:50.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD NOHANDOVER
2026-02-19 05:21:50.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:21:50.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:21:50.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:50.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:21:51.241 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:21:51.718 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:21:52.197 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:21:52.675 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:21:53.153 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:21:53.649 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:21:53.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:21:53.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:21:53.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:53.760 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:53.760 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:53.760 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:21:53.761 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:53.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:53.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:53.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:53.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:53.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:53.762 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:21:53.762 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1760 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:53.762 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1760 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:53.762 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1760 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:53.762 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1760 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:53.762 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1760 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:21:58.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:21:58.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:21:58.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:58.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:58.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:58.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:58.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:21:58.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:58.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:58.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:21:58.775 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:21:58.781 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:21:58.781 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:21:58.782 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:58.782 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:58.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:21:58.783 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:21:58.783 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:21:58.783 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:21:58.785 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:21:58.785 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:21:58.785 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:58.786 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:58.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:21:58.786 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:21:58.786 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:21:58.786 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:21:58.788 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:21:58.788 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:21:58.788 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:58.788 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:21:58.789 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:21:58.789 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:21:58.789 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:21:58.789 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:21:58.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:21:58.793 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:21:58.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:21:58.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:21:58.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:21:59.279 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:21:59.322 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:21:59.324 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:21:59.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:21:59.326 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:21:59.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:21:59.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:21:59.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:21:59.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:21:59.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:00.238 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:22:00.716 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:22:00.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:00.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:00.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:00.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:01.194 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:22:01.672 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:22:01.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:01.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:01.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:01.804 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:02.150 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:22:02.629 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:22:02.803 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:02.803 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:02.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:02.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:03.106 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:22:03.585 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:22:03.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:03.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:03.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:03.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:04.063 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:22:04.541 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:22:05.019 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:22:05.497 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:22:05.976 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:22:06.454 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:22:06.932 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:22:07.410 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:22:07.889 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:22:08.368 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:22:08.844 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:22:09.322 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:22:09.339 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:09.339 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:09.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:09.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:09.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:09.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:09.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:09.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:09.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:09.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:09.341 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:22:09.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:09.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:09.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:09.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:09.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:09.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:09.341 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:14.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:14.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:14.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:14.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:14.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:14.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:14.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:14.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:14.361 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:14.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:14.361 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:22:14.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:22:14.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:22:14.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:14.364 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:14.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:14.364 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:22:14.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:14.364 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:22:14.366 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:22:14.366 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:22:14.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:14.366 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:14.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:14.366 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:22:14.366 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:14.366 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:22:14.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:22:14.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:22:14.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:14.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:14.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:22:14.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:14.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:14.368 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:22:14.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:22:14.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:22:14.370 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:22:14.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:14.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:14.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:14.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:14.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:14.371 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:14.371 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:14.371 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:22:19.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:19.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:19.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:19.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:19.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:19.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:19.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:19.391 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:19.391 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:19.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:19.392 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:22:19.396 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:22:19.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:22:19.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:19.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:19.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:19.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:22:19.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:19.399 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:22:19.402 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:22:19.402 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:22:19.403 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:19.403 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:19.403 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:19.403 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:22:19.404 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:19.404 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:22:19.406 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:22:19.407 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:22:19.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:19.407 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:19.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:19.407 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:22:19.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:19.407 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:22:19.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:22:19.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:22:19.412 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:22:19.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.413 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:19.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.414 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:19.414 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:19.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:19.417 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:22:19.900 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:22:19.942 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:22:19.944 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:22:19.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:22:19.946 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:22:19.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:22:19.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:22:19.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:22:19.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:22:19.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:22:19.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:22:19.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:22:19.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:22:20.377 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:22:20.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:20.416 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:20.416 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:20.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:20.855 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:22:21.333 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:22:21.416 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:21.417 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:21.417 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:21.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:21.811 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:22:22.289 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:22:22.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:22.418 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:22.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:22.418 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:22.767 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:22:23.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:22:23.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:23.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:23.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:23.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:23.721 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:22:24.198 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:22:24.420 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:24.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:24.420 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:24.420 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:24.675 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:22:25.152 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:22:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:22:26.108 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:22:26.585 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:22:27.063 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:22:27.541 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:22:27.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:22:27.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:22:27.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:28.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:28.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:28.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:28.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:28.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:28.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:28.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:28.004 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:28.004 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:28.004 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:22:28.004 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:28.005 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:28.005 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:28.005 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:28.005 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:28.005 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:33.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:33.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:33.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:33.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:33.005 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:33.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:33.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:33.014 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:33.014 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:33.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:33.015 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:22:33.018 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:22:33.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:22:33.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:33.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:33.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:33.019 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:22:33.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:33.019 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:22:33.021 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:22:33.021 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:22:33.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:33.022 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:33.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:33.022 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:22:33.022 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:33.022 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:22:33.024 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:22:33.024 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:22:33.024 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:33.024 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:33.024 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:33.025 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:22:33.025 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:33.025 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:22:33.027 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:22:33.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:22:33.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:22:33.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:22:33.027 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:22:33.028 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:22:33.028 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:22:33.028 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:33.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:33.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:33.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:33.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:33.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:33.030 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:22:33.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:38.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:38.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:38.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:38.036 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:38.037 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:38.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:38.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:38.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:38.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:38.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:38.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:22:38.052 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:22:38.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:22:38.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:38.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:38.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:38.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:22:38.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:38.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:22:38.056 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:22:38.056 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:22:38.056 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:38.057 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:38.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:38.057 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:22:38.057 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:38.057 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:22:38.059 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:22:38.059 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:22:38.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:38.059 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:38.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:38.059 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:22:38.059 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:38.059 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:22:38.062 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:22:38.063 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:22:38.063 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:22:38.063 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.063 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:38.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.064 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:38.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:38.064 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:38.067 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:22:38.548 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:22:38.592 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:22:38.593 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:22:38.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:22:38.594 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:22:38.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:22:38.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:22:38.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:22:38.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:22:38.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:22:38.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:22:38.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:22:38.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:22:39.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:22:39.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:39.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:39.067 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:39.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:39.503 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:22:39.981 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:22:40.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:40.067 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:40.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:40.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:40.459 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:22:40.937 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:22:41.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:41.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:41.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:41.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:41.414 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:22:41.892 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:22:42.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:42.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:42.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:42.070 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:42.370 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:22:42.848 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:22:43.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:43.071 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:43.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:43.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:43.325 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:22:43.802 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:22:44.280 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:22:44.757 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:22:45.236 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:22:45.713 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:22:46.191 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:22:46.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:22:46.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:22:46.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:46.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:46.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:46.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:46.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:46.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:46.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:46.649 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:46.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:46.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:46.649 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:22:51.650 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:51.650 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:51.652 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:51.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:51.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:51.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:51.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:51.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:51.667 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:51.667 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:51.667 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:22:51.671 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:22:51.671 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:22:51.671 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:51.671 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:51.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:51.672 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:22:51.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:51.672 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:22:51.675 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:22:51.675 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:22:51.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:51.675 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:51.675 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:51.675 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:22:51.675 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:51.675 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:22:51.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:22:51.677 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:22:51.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:51.677 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:51.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:51.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:22:51.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:51.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:22:51.681 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:22:51.681 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:22:51.681 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:51.683 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:51.683 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:22:51.683 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:56.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:22:56.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:22:56.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:56.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:56.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:56.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:56.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:22:56.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:56.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:56.697 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:22:56.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:22:56.700 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:22:56.700 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:22:56.701 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:56.701 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:56.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:22:56.701 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:22:56.702 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:22:56.702 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:22:56.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:22:56.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:22:56.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:56.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:56.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:22:56.705 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:22:56.705 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:22:56.705 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:22:56.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:22:56.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:22:56.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:56.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:22:56.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:22:56.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:22:56.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:22:56.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:22:56.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:22:56.711 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:22:56.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:22:56.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:22:56.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:22:56.715 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:22:57.199 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:22:57.233 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:22:57.233 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:22:57.235 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:22:57.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:22:57.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:22:57.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:22:57.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:22:57.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:22:57.240 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:22:57.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:22:57.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:22:57.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:22:57.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:22:57.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:57.714 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:57.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:57.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:58.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:22:58.631 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:22:58.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:58.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:58.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:58.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:22:59.109 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:22:59.587 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:22:59.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:22:59.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:22:59.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:22:59.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:00.064 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:23:00.542 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:23:00.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:00.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:00.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:00.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:01.020 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:23:01.497 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:23:01.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:01.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:01.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:01.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:01.975 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:23:02.453 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:23:02.930 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:23:03.408 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:23:03.885 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:23:04.362 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:23:04.840 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:23:05.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:23:05.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:23:05.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:05.296 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:05.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:05.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:05.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:05.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:05.300 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:05.300 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:05.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:05.300 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:05.300 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:23:05.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:05.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:05.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:05.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:05.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:05.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:05.301 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:10.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:10.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:10.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:10.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:10.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:10.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:10.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:10.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:10.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:10.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:10.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:23:10.319 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:23:10.319 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:23:10.319 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:10.319 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:10.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:10.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:23:10.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:10.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:23:10.322 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:23:10.322 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:23:10.322 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:10.323 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:10.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:10.323 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:23:10.323 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:10.323 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:23:10.325 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:23:10.325 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:23:10.325 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:10.325 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:10.326 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:10.326 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:23:10.326 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:10.326 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:23:10.328 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:23:10.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:23:10.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:23:10.328 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:23:10.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:23:10.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:23:10.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:23:10.329 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:23:10.329 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:10.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:10.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:10.331 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:10.331 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:10.331 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:23:15.333 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:15.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:15.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:15.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:15.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:15.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:15.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:15.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:15.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:15.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:15.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:23:15.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:23:15.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:23:15.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:15.349 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:15.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:15.349 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:23:15.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:15.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:23:15.351 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:23:15.351 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:23:15.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:15.351 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:15.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:15.352 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:23:15.352 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:15.352 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:23:15.353 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:23:15.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:23:15.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:15.354 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:15.354 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:15.354 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:23:15.354 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:15.354 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:23:15.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:23:15.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:23:15.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:23:15.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:23:15.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:23:15.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:23:15.357 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:23:15.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:15.362 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:23:15.845 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:23:15.885 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:23:15.887 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:23:15.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:23:15.889 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:23:15.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:23:15.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:23:15.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:23:15.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:23:15.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:23:15.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:23:15.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:23:15.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:23:16.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:23:16.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:16.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:16.800 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:23:17.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:23:17.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:17.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:17.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:17.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:17.756 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:23:18.233 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:23:18.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:18.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:18.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:18.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:18.711 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:23:19.189 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:23:19.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:19.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:19.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:19.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:19.667 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:23:20.145 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:23:20.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:20.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:20.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:20.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:20.620 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:23:21.098 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:23:21.576 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:23:22.053 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:23:22.531 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:23:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:23:23.486 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:23:23.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:23:23.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:23:23.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:23.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:23.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:23.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:23.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:23.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:23.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:23.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:23.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:23.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:23.943 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:23:23.943 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:23.943 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:23.943 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:23.943 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:23.943 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:23.943 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:23.943 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1835 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:28.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:28.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:28.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:28.948 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:28.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:28.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:28.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:28.962 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:28.962 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:28.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:28.963 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:23:28.966 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:23:28.966 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:23:28.966 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:28.966 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:28.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:28.967 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:23:28.967 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:28.968 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:23:28.970 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:23:28.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:23:28.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:28.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:28.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:28.971 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:23:28.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:28.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:23:28.973 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:23:28.974 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:23:28.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:28.974 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:28.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:28.974 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:23:28.974 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:28.974 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:23:28.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:23:28.977 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:23:28.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:23:28.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:28.979 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:28.979 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:33.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:33.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:33.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:33.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:33.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:33.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:33.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:33.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:33.995 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:33.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:33.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:23:33.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:23:33.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:23:33.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:33.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:34.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:34.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:23:34.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:34.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:23:34.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:23:34.004 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:23:34.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:34.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:34.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:34.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:23:34.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:34.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:23:34.008 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:23:34.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:23:34.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:34.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:34.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:34.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:23:34.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:34.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:23:34.014 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.015 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:23:34.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:23:34.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:23:34.016 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:23:34.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:23:34.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:34.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:23:34.503 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:23:34.550 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:23:34.552 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:23:34.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:23:34.554 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:23:34.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:23:34.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:23:34.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:23:34.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:23:34.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:23:34.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:23:34.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:23:34.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:23:34.981 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:23:35.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:35.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:35.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:35.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:35.458 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:23:35.936 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:23:36.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:36.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:36.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:36.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:36.414 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:23:36.892 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:23:37.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:37.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:37.022 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:37.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:37.369 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:23:37.847 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:23:38.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:38.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:38.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:38.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:38.325 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:23:38.802 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:23:39.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:39.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:39.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:39.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:39.280 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:23:39.758 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:23:40.236 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:23:40.714 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:23:41.191 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:23:41.669 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:23:42.146 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:23:42.624 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:23:43.102 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:23:43.580 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:23:44.057 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:23:44.535 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:23:45.013 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:23:45.490 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:23:45.968 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:23:46.446 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:23:46.924 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:23:47.402 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:23:47.879 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:23:48.358 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:23:48.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:23:48.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:23:48.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:48.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:48.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:48.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:23:48.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:48.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:48.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:48.606 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:23:48.607 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:48.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:48.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:48.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:48.607 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:48.607 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:48.608 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:23:53.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:53.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:53.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:53.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:53.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:53.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:53.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:53.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:53.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:53.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:53.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:23:53.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:23:53.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:23:53.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:53.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:53.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:53.622 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:23:53.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:53.622 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:23:53.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:23:53.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:23:53.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:53.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:53.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:53.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:23:53.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:53.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:23:53.626 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:23:53.627 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:23:53.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:53.627 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:53.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:53.627 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:23:53.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:53.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:23:53.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:23:53.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:23:53.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:23:53.630 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:23:53.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:53.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:53.632 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:53.632 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:53.632 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:23:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.636 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:23:58.636 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:23:58.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:58.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:58.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:58.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:58.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:23:58.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:58.648 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:58.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:23:58.648 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:23:58.652 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:23:58.652 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:23:58.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:58.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:58.653 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:23:58.654 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:23:58.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:23:58.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:23:58.656 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:23:58.656 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:23:58.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:58.656 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:58.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:23:58.656 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:23:58.656 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:23:58.656 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:23:58.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:23:58.659 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:23:58.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:58.659 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:23:58.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:23:58.659 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:23:58.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:23:58.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.662 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:23:58.662 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:23:58.663 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:23:58.663 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:23:58.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:23:58.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:23:58.667 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:23:59.150 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:23:59.190 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:23:59.192 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:23:59.193 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:23:59.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:23:59.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:23:59.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:23:59.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:23:59.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:23:59.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:23:59.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:23:59.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:23:59.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:23:59.627 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:23:59.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:23:59.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:23:59.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:23:59.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:00.105 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:24:00.582 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:24:00.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:00.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:00.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:00.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:01.060 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:24:01.537 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:24:01.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:01.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:01.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:01.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:02.015 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:24:02.493 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:24:02.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:02.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:02.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:02.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:02.971 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:24:03.448 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:24:03.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:03.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:03.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:03.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:03.926 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:24:04.404 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:24:04.882 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:24:05.359 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:24:05.837 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:24:06.315 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:24:06.792 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:24:07.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:24:07.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:07.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:07.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:07.247 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:24:12.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:12.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:12.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:12.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:12.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:12.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:12.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:12.264 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:12.264 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:12.265 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:12.265 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:24:12.269 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:24:12.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:24:12.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:12.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:12.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:12.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:24:12.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:12.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:24:12.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:24:12.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:24:12.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:12.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:12.275 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:12.275 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:24:12.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:12.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:24:12.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:24:12.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:24:12.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:12.277 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:12.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:12.277 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:24:12.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:12.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:24:12.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:24:12.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:24:12.282 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:24:12.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:12.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:12.285 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:24:12.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:17.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:17.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:17.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:17.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:17.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:17.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:17.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:17.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:17.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:17.304 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:24:17.307 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:24:17.307 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:24:17.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:17.307 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:17.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:17.307 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:24:17.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:17.307 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:24:17.310 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:24:17.310 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:24:17.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:17.310 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:17.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:17.310 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:24:17.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:17.310 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:24:17.313 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:24:17.313 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:24:17.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:17.313 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:17.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:17.313 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:24:17.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:17.313 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:24:17.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:24:17.316 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:24:17.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:17.321 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:24:17.805 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:24:17.837 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:24:17.838 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:24:17.839 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:24:17.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:24:17.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:24:17.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:24:17.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:24:17.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:24:17.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:24:17.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:24:17.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:24:17.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:24:18.282 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:24:18.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:18.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:18.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:18.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:18.760 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:24:19.238 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:24:19.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:19.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:19.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:19.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:19.716 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:24:20.194 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:24:20.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:20.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:20.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:20.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:20.671 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:24:21.149 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:24:21.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:21.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:21.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:21.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:21.627 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:24:22.104 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:24:22.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:22.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:22.323 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:22.323 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:22.582 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:24:23.060 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:24:23.537 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:24:24.015 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:24:24.492 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:24:24.969 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:24:25.446 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:24:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:24:26.402 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:24:26.879 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:24:27.358 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:24:27.835 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:24:27.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:24:27.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:24:27.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:27.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:27.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:27.861 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:27.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:27.861 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:27.861 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:27.861 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:27.861 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:24:32.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:32.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:32.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:32.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:32.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:32.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:32.883 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:32.884 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:32.884 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:32.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:32.885 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:24:32.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:24:32.890 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:24:32.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:32.891 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:32.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:32.891 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:24:32.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:32.892 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:24:32.895 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:24:32.895 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:24:32.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:32.895 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:32.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:32.896 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:24:32.896 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:32.896 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:24:32.899 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:24:32.900 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:24:32.900 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:32.900 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:32.900 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:32.900 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:24:32.901 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:32.901 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.906 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:24:32.906 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:24:32.907 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:24:32.907 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.907 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.908 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:32.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:32.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:32.909 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:24:37.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:37.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:37.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:37.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:37.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:37.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:37.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:37.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:37.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:37.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:37.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:24:37.926 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:24:37.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:24:37.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:37.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:37.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:37.927 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:24:37.927 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:37.927 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:24:37.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:24:37.929 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:24:37.929 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:37.929 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:37.929 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:37.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:24:37.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:37.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:24:37.931 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:24:37.931 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:24:37.931 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:37.931 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:37.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:37.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:24:37.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:37.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:24:37.934 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:24:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:24:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:24:37.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:24:37.934 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:24:37.935 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:24:37.935 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:24:37.935 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:37.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:37.940 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:24:38.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:24:38.462 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:24:38.464 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:24:38.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:24:38.466 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:24:38.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:24:38.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:24:38.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:24:38.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:24:38.471 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:24:38.471 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:24:38.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:24:38.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:24:38.897 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:24:38.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:38.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:38.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:38.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:39.374 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:24:39.852 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:24:39.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:39.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:39.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:39.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:40.330 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:24:40.807 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:24:40.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:40.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:40.941 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:41.285 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:24:41.763 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:24:41.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:41.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:41.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:41.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:42.241 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:24:42.718 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:24:42.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:42.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:42.943 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:42.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:43.196 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:24:43.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:24:44.151 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:24:44.629 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:24:45.106 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:24:45.584 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:24:46.062 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:24:46.539 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:24:47.017 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:24:47.494 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:24:47.972 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:24:48.450 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:24:48.927 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:24:49.405 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:24:49.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:24:49.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:24:49.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:24:49.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:24:49.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:24:49.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:24:49.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:49.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:49.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:49.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:49.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:49.518 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:24:49.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:49.518 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:24:49.518 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:24:49.518 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:24:49.518 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:24:49.518 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:24:49.518 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2474 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:24:54.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:54.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:54.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:54.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:54.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:54.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:54.534 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:54.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:54.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:54.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:54.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:24:54.541 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:24:54.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:24:54.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:54.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:54.542 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:54.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:24:54.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:54.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:24:54.545 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:24:54.545 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:24:54.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:54.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:54.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:54.546 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:24:54.546 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:54.546 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:24:54.548 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:24:54.548 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:24:54.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:54.548 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:54.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:54.548 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:24:54.548 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:54.548 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:24:54.552 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:24:54.552 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:24:54.552 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:54.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:54.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:54.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:54.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:54.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:54.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:54.555 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:24:59.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:24:59.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:24:59.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:59.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:59.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:59.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:59.569 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:24:59.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:59.570 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:59.570 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:24:59.570 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:24:59.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:24:59.576 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:24:59.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:59.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:59.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:24:59.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:24:59.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:24:59.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:24:59.580 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:24:59.580 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:24:59.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:59.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:59.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:24:59.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:24:59.582 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:24:59.582 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:24:59.584 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:24:59.584 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:24:59.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:59.584 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:24:59.584 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:24:59.584 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:24:59.584 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:24:59.584 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.588 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:24:59.588 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:24:59.588 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:24:59.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:24:59.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:25:00.074 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:25:00.121 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:25:00.123 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:25:00.124 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:25:00.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:25:00.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:25:00.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:25:00.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:25:00.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:25:00.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:25:00.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:25:00.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:25:00.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:25:00.551 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:25:00.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:00.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:00.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:00.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:01.028 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:25:01.504 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:25:01.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:01.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:01.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:01.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:01.981 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:25:02.458 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:25:02.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:02.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:02.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:02.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:02.930 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:25:03.408 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:25:03.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:03.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:03.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:03.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:03.877 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:25:04.346 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:25:04.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:04.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:04.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:04.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:04.818 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:25:05.288 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:25:05.759 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:25:06.237 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:25:06.714 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:25:07.192 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:25:07.670 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:25:08.148 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:25:08.625 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:25:09.102 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:25:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:25:10.051 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:25:10.527 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:25:11.001 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:25:11.470 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:25:11.945 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:25:12.422 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:25:12.900 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:25:13.378 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:25:13.856 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:25:14.333 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:25:14.811 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:25:15.289 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:25:15.767 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:25:16.244 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:25:16.722 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:25:17.199 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:25:17.677 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:25:18.156 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:25:18.633 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:25:19.111 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:25:19.588 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:25:20.066 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:25:20.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:25:20.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:25:20.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:20.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:20.174 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:20.174 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:20.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:20.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:20.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:20.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:20.174 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:25:20.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:20.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:25.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:25.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:25.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:25.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:25.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:25.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:25.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:25.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:25.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:25.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:25.190 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:25:25.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:25:25.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:25:25.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:25.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:25.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:25.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:25:25.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:25.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:25:25.197 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:25:25.198 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:25:25.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:25.198 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:25.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:25.198 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:25:25.198 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:25.198 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:25:25.201 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:25:25.201 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:25:25.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:25.201 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:25.201 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:25:25.201 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:25.201 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:25:25.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:25:25.205 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:25:25.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:25.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:25.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:25.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:25.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:25.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:25.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:25.208 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:25:25.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:30.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:30.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:30.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:30.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:30.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:30.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:30.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:30.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:30.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:30.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:30.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:25:30.228 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:25:30.228 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:25:30.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:30.229 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:30.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:30.229 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:25:30.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:30.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:25:30.232 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:25:30.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:25:30.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:30.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:30.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:30.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:25:30.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:30.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:25:30.234 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:25:30.234 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:25:30.234 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:30.234 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:30.234 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:30.235 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:25:30.235 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:30.235 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:25:30.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:25:30.238 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:25:30.238 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:25:30.238 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:30.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:30.243 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:25:30.727 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:25:30.762 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:25:30.762 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:25:30.763 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:25:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:25:31.203 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:25:31.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:31.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:31.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:31.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:31.678 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:25:32.151 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:25:32.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:32.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:32.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:32.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:32.628 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:25:33.104 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:25:33.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:33.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:33.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:33.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:33.578 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:25:34.053 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:25:34.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:34.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:34.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:34.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:34.529 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:25:35.004 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:25:35.245 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:35.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:35.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:35.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:35.479 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:25:35.956 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:25:36.432 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:25:36.906 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:25:37.383 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:25:37.857 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:25:38.331 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:25:38.806 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:25:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:25:39.756 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:25:40.230 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:25:40.703 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:25:40.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:40.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:40.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:40.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:40.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:40.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:40.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:40.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:40.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:40.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:40.773 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:25:40.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:25:40.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:25:40.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:25:40.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:25:40.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:25:40.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:25:45.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:45.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:45.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:45.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:45.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:45.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:45.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:45.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:45.778 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:45.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:45.778 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:25:45.779 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:25:45.779 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:25:45.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:45.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:45.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:45.779 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:25:45.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:45.779 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:25:45.780 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:25:45.780 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:25:45.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:45.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:45.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:45.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:25:45.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:45.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:25:45.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:25:45.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:25:45.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:45.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:45.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:45.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:25:45.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:45.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:25:45.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:25:45.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:25:45.783 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:25:45.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:45.784 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:45.784 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:45.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.785 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:25:50.785 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:25:50.785 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:50.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:50.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:50.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:50.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:25:50.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:50.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:50.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:25:50.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:25:50.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:25:50.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:25:50.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:50.791 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:50.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:25:50.791 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:25:50.791 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:25:50.791 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:25:50.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:25:50.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:25:50.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:50.792 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:50.792 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:25:50.792 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:25:50.792 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:25:50.792 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:25:50.793 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:25:50.793 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:25:50.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:50.793 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:25:50.793 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:25:50.793 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:25:50.793 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:25:50.793 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:25:50.795 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:25:50.795 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:25:50.795 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:25:50.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.796 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:25:50.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.796 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:25:50.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:25:50.800 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:25:51.280 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:25:51.307 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:25:51.308 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:25:51.308 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:25:51.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:25:51.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:25:51.797 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:51.797 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:51.797 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:51.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:52.231 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:25:52.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:25:52.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:52.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:52.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:52.798 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:53.180 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:25:53.657 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:25:53.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:53.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:53.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:53.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:54.136 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:25:54.617 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:25:54.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:54.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:54.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:54.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:55.094 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:25:55.569 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:25:55.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:25:55.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:25:55.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:25:55.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:25:56.042 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:25:56.518 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:25:56.998 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:25:57.478 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:25:57.959 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:25:58.438 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:25:58.917 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:25:59.395 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:25:59.873 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:26:00.351 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:26:00.829 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:26:01.307 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:26:01.784 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:26:02.262 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:26:02.741 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:26:03.219 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:26:03.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:03.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:03.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:03.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:03.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:03.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:03.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:03.321 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:26:03.321 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:03.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:03.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:03.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:03.321 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:03.321 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:03.321 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:03.322 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:03.322 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:03.322 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:03.322 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2676 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:08.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:08.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:08.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:08.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:08.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:08.329 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:08.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:08.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:08.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:08.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:08.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:26:08.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:26:08.339 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:26:08.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:08.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:08.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:08.339 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:26:08.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:08.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:26:08.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:26:08.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:26:08.342 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:08.342 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:08.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:08.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:26:08.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:08.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:26:08.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:26:08.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:26:08.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:08.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:08.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:08.345 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:26:08.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:08.345 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:26:08.348 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:26:08.348 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:26:08.348 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:08.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:08.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:08.350 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:26:13.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:13.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:13.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:13.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:13.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:13.358 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:13.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:13.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:13.367 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:13.367 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:13.367 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:26:13.370 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:26:13.370 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:26:13.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:13.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:13.371 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:13.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:26:13.372 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:13.372 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:26:13.374 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:26:13.374 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:26:13.374 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:13.374 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:13.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:13.375 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:26:13.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:13.375 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:26:13.377 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:26:13.378 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:26:13.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:13.378 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:13.378 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:13.378 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:26:13.378 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:13.378 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:26:13.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:26:13.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:26:13.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:26:13.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:26:13.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:26:13.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:26:13.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:26:13.383 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:26:13.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:26:13.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:13.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:13.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:13.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:13.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:26:13.873 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:26:13.916 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:26:13.918 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:26:13.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:26:13.920 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:26:13.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:26:13.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:26:13.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:26:13.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:13.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:26:13.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:26:13.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:26:13.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:26:13.962 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:26:13.963 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:26:13.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:13.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:14.350 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:26:14.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:14.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:14.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:14.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:14.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:26:15.307 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:26:15.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:15.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:15.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:15.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:15.784 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:26:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:26:16.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:16.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:16.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:16.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:16.741 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:26:17.218 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:26:17.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:17.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:17.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:17.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:17.696 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:26:18.174 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:26:18.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:18.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:18.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:18.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:18.652 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:26:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:26:19.608 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:26:20.086 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:26:20.564 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:26:21.042 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:26:21.520 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:26:21.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:26:21.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:26:21.968 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:26:21.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:21.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:21.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:21.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:21.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:21.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:21.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:21.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:21.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:21.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:21.972 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:26:21.972 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:21.973 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:21.973 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:21.973 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:21.973 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:21.973 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:21.973 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:21.973 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:26.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:26.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:26.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:26.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:26.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:26.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:26.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:26.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:26.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:26.995 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:26.995 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:26:26.999 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:26:26.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:26:27.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:27.000 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:27.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:27.001 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:26:27.001 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:27.001 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:26:27.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:26:27.005 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:26:27.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:27.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:27.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:27.006 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:26:27.006 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:27.006 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:26:27.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:26:27.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:26:27.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:27.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:27.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:27.010 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:26:27.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:27.010 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:26:27.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:26:27.017 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:27.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:27.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:27.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:27.020 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:26:32.024 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:32.024 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:32.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:32.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:32.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:32.027 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:32.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:32.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:32.035 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:32.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:32.035 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:26:32.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:26:32.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:26:32.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:32.039 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:32.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:32.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:26:32.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:32.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:26:32.042 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:26:32.042 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:26:32.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:32.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:32.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:32.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:26:32.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:32.043 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:26:32.044 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:26:32.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:26:32.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:32.045 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:32.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:32.045 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:26:32.045 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:32.045 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.048 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:26:32.048 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:26:32.048 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:26:32.049 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:32.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:32.053 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:26:32.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:26:32.577 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:26:32.577 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:26:32.578 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:26:32.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:26:32.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:26:32.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:26:32.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:26:32.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:32.581 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:26:32.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:26:32.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:26:32.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:26:32.627 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:26:32.627 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:26:32.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:32.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:33.014 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:26:33.052 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:33.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:33.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:33.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:33.492 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:26:33.970 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:26:34.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:34.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:34.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:34.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:34.448 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:26:34.926 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:26:35.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:35.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:35.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:35.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:35.404 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:26:35.874 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:26:36.055 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:36.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:36.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:36.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:36.343 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:26:36.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:26:37.055 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:37.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:37.055 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:37.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:37.287 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:26:37.758 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:26:38.229 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:26:38.700 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:26:39.170 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:26:39.645 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:26:40.124 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:26:40.602 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:26:40.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:26:40.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:26:40.632 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:26:40.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:40.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:40.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:40.634 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:40.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:40.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:40.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:40.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:40.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:40.635 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:26:40.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:45.637 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:45.637 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:45.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:45.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:45.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:45.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:45.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:45.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:45.648 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:45.648 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:45.648 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:26:45.653 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:26:45.653 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:26:45.653 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:45.653 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:45.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:45.654 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:26:45.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:45.654 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:26:45.658 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:26:45.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:26:45.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:45.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:45.658 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:45.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:26:45.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:45.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:26:45.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:26:45.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:26:45.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:45.663 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:45.663 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:45.663 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:26:45.663 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:45.663 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:26:45.668 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:26:45.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:26:45.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:26:45.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:26:45.668 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:26:45.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:26:45.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:26:45.669 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:26:45.669 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:26:45.669 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.670 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:45.671 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:45.671 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:45.672 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:26:50.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:50.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:50.677 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:50.678 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:50.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:50.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:50.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:50.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:50.696 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:50.696 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:26:50.697 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:26:50.703 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:26:50.703 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:26:50.703 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:50.704 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:50.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:50.704 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:26:50.705 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:26:50.705 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:26:50.707 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:26:50.708 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:26:50.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:50.708 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:50.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:50.708 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:26:50.708 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:26:50.709 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:26:50.711 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:26:50.711 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:26:50.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:50.711 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:26:50.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:50.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:26:50.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:26:50.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:26:50.715 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:26:50.715 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:26:50.715 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:26:50.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:26:51.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:26:51.254 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:26:51.257 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:26:51.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:26:51.259 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:26:51.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:26:51.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:26:51.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:26:51.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:51.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:26:51.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:26:51.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:26:51.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:26:51.294 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:26:51.294 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:26:51.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:51.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:26:51.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:26:51.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:51.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:51.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:51.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:52.159 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:26:52.638 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:26:52.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:52.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:52.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:52.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:53.116 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:26:53.593 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:26:53.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:53.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:53.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:53.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:54.072 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:26:54.550 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:26:54.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:54.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:55.029 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:26:55.506 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:26:55.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:55.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:55.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:55.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:55.984 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:26:56.462 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:26:56.940 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:26:57.418 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:26:57.896 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:26:58.375 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:26:58.853 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:26:59.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:26:59.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:26:59.298 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:26:59.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:26:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:26:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:26:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:26:59.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:26:59.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:26:59.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:26:59.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:26:59.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:26:59.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:26:59.302 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:26:59.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:59.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:59.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:59.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:26:59.302 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:04.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:04.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:04.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:04.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:04.308 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:04.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:04.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:04.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:04.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:04.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:04.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:27:04.320 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:27:04.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:27:04.320 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:04.320 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:04.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:04.320 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:27:04.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:04.321 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:27:04.323 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:27:04.323 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:27:04.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:04.324 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:04.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:04.324 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:27:04.324 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:04.324 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:27:04.326 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:27:04.326 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:27:04.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:04.327 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:04.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:04.327 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:27:04.327 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:04.327 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:27:04.333 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:27:04.333 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:27:04.333 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:04.334 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:04.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:04.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:04.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:04.336 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:27:09.339 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:09.339 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:09.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:09.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:09.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:09.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:09.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:09.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:09.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:09.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:09.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:27:09.359 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:27:09.359 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:27:09.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:09.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:09.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:27:09.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:09.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:27:09.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:27:09.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:27:09.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:09.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:09.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:09.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:27:09.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:09.362 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:27:09.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:27:09.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:27:09.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:09.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:09.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:09.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:27:09.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:09.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:27:09.366 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:27:09.366 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:27:09.366 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:09.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:09.371 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:27:09.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:27:09.896 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:27:09.898 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:27:09.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:27:09.899 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:27:09.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:27:09.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:27:09.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:27:09.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:09.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:27:09.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:27:09.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:27:09.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:27:09.943 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:27:09.944 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:27:09.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:09.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:10.331 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:27:10.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:10.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:10.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:10.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:10.809 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:27:11.287 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:27:11.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:11.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:11.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:11.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:11.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:27:12.242 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:27:12.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:12.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:12.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:12.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:12.720 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:27:13.198 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:27:13.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:13.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:13.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:13.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:13.676 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:27:14.154 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:27:14.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:14.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:14.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:14.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:14.632 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:27:15.110 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:27:15.589 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:27:16.066 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:27:16.544 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:27:17.022 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:27:17.501 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:27:17.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:27:17.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:27:17.948 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:27:17.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:17.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:17.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:17.952 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:27:22.955 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:22.955 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:22.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:22.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:22.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:22.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:22.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:22.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:22.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:22.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:22.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:27:22.971 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:27:22.971 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:27:22.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:22.971 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:22.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:22.972 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:27:22.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:22.972 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:27:22.976 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:27:22.976 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:27:22.976 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:22.976 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:22.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:22.976 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:27:22.977 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:22.977 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:27:22.980 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:27:22.980 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:27:22.980 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:22.980 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:22.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:22.981 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:27:22.981 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:22.981 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:27:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:27:22.987 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:27:22.987 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:27:22.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:22.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:22.991 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:22.991 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:27:27.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:27.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:27.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:27.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:27.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:27.998 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:28.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:28.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:28.008 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:28.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:28.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:27:28.014 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:27:28.014 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:27:28.014 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:28.014 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:28.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:28.014 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:27:28.015 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:28.015 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:27:28.018 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:27:28.018 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:27:28.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:28.018 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:28.018 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:28.018 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:27:28.018 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:28.018 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:27:28.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:27:28.021 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:27:28.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:28.021 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:28.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:28.021 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:27:28.021 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:28.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.025 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:27:28.025 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:27:28.025 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:27:28.025 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:28.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:28.030 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:27:28.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:27:28.558 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:27:28.560 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:27:28.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:27:28.563 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:27:28.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:27:28.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:27:28.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:27:28.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:28.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:27:28.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:27:28.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:27:28.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:27:28.604 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:27:28.604 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:27:28.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:28.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:28.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:27:29.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:29.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:29.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:29.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:29.470 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:27:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:27:30.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:30.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:30.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:30.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:30.426 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:27:30.912 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:27:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:31.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:31.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:31.390 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:27:31.868 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:27:32.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:32.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:32.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:32.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:32.346 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:27:32.823 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:27:33.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:33.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:33.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:33.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:33.302 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:27:33.779 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:27:34.258 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:27:34.735 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:27:35.214 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:27:35.692 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:27:36.170 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:27:36.648 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:27:37.126 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:27:37.603 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:27:38.081 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:27:38.558 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:27:39.036 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:27:39.514 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:27:39.992 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:27:40.470 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:27:40.948 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:27:41.426 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:27:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:27:42.382 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:27:42.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:27:42.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:27:42.611 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:27:42.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:42.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:42.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:42.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:42.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:42.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:42.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:42.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:42.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:42.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:42.618 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:27:42.618 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3113 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:42.618 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3113 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:42.618 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3113 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:42.618 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3113 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:42.619 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3113 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:42.619 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:42.619 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:27:47.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:47.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:47.619 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:47.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:47.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:47.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:47.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:47.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:47.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:47.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:47.633 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:27:47.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:27:47.638 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:27:47.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:47.638 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:47.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:47.639 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:27:47.639 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:47.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:27:47.642 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:27:47.642 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:27:47.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:47.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:47.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:47.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:27:47.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:47.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:27:47.646 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:27:47.646 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:27:47.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:47.646 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:47.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:47.647 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:27:47.647 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:47.647 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:27:47.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:27:47.651 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:27:47.652 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:47.653 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:47.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:47.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:47.654 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:27:52.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:27:52.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:27:52.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:52.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:52.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:52.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:52.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:27:52.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:52.669 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:52.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:27:52.669 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:27:52.672 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:27:52.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:27:52.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:52.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:52.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:27:52.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:27:52.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:27:52.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:27:52.676 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:27:52.676 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:27:52.676 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:52.676 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:52.677 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:27:52.677 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:27:52.677 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:27:52.677 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:27:52.679 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:27:52.679 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:27:52.679 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:52.679 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:27:52.680 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:27:52.680 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:27:52.680 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:27:52.680 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.683 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:27:52.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:27:52.683 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:27:52.684 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.685 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:27:52.685 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:27:52.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:27:52.688 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:27:53.172 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:27:53.218 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:27:53.220 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:27:53.221 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:27:53.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:27:53.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:27:53.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:27:53.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:27:53.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:53.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:27:53.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:27:53.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:27:53.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:27:53.262 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:27:53.262 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:27:53.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:53.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:27:53.648 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:27:53.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:53.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:53.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:53.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:54.126 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:27:54.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:27:54.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:54.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:54.688 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:54.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:55.082 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:27:55.560 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:27:55.688 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:55.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:55.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:55.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:56.038 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:27:56.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:27:56.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:56.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:56.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:56.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:56.994 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:27:57.472 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:27:57.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:27:57.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:27:57.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:27:57.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:27:57.949 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:27:58.427 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:27:58.905 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:27:59.384 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:27:59.862 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:28:00.340 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:28:00.818 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:28:01.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:28:01.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:28:01.266 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:28:01.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:01.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:01.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:01.271 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:28:06.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:06.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:06.275 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:06.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:06.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:06.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:06.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:06.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:06.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:06.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:06.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:28:06.291 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:28:06.291 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:28:06.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:06.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:06.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:06.292 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:28:06.292 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:06.292 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:28:06.296 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:28:06.296 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:28:06.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:06.296 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:06.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:06.296 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:28:06.297 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:06.297 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:28:06.301 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:28:06.301 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:28:06.301 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:06.301 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:06.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:06.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:28:06.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:06.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:28:06.310 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:28:06.310 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:28:06.310 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:06.313 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:06.313 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:28:06.313 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:11.316 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:11.316 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:11.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:11.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:11.320 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:11.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:11.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:11.328 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:11.328 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:11.329 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:11.329 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:28:11.331 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:28:11.331 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:28:11.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:11.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:11.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:11.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:28:11.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:11.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:28:11.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:28:11.334 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:28:11.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:11.334 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:11.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:11.335 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:28:11.335 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:11.335 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:28:11.336 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:28:11.337 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:28:11.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:11.337 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:11.337 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:11.337 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:28:11.337 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:11.337 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:28:11.339 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:28:11.340 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:28:11.340 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:28:11.340 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:11.345 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:28:11.828 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:28:11.872 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:28:11.874 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:28:11.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:28:11.876 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:28:11.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:28:11.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:28:11.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:28:11.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:28:11.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:28:11.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:28:11.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:28:11.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:28:12.305 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:28:12.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:12.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:12.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:12.343 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:12.783 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:28:13.260 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:28:13.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:13.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:13.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:13.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:13.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:28:14.216 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:28:14.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:14.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:14.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:14.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:14.694 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:28:15.172 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:28:15.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:15.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:15.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:15.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:15.650 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:28:16.127 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:28:16.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:16.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:16.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:16.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:16.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:28:17.083 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:28:17.561 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:28:18.038 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:28:18.515 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:28:18.993 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:28:19.470 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:28:19.947 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:28:20.425 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:28:20.903 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:28:21.381 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:28:21.859 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:28:21.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:28:21.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:28:21.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:21.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:21.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:21.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:21.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:21.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:21.933 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:28:21.934 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:21.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:21.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:21.934 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.934 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.934 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.934 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.934 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2261 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:21.935 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2262 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:26.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:26.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:26.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:26.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:26.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:26.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:26.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:26.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:26.944 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:26.944 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:26.944 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:28:26.947 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:28:26.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:28:26.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:26.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:26.948 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:26.948 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:28:26.948 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:26.948 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:28:26.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:28:26.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:28:26.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:26.950 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:26.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:26.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:28:26.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:26.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:28:26.952 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:28:26.952 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:28:26.952 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:26.952 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:26.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:26.953 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:28:26.953 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:26.953 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.956 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:28:26.956 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:28:26.956 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:28:26.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:26.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:26.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:26.959 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:28:31.964 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:31.964 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:31.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:31.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:31.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:31.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:31.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:31.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:31.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:31.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:31.975 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:28:31.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:28:31.978 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:28:31.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:31.978 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:31.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:31.979 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:28:31.979 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:31.979 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:28:31.981 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:28:31.981 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:28:31.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:31.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:31.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:31.981 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:28:31.982 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:31.982 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:28:31.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:28:31.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:28:31.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:31.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:31.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:31.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:28:31.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:31.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:28:31.988 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:28:31.988 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:28:31.988 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:28:31.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:31.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:31.993 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:28:32.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:28:32.522 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:28:32.525 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:28:32.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:28:32.527 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:28:32.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:28:32.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:28:32.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:28:32.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:28:32.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:28:32.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:28:32.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:28:32.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:28:32.567 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:28:32.567 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-02-19 05:28:32.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:28:32.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:28:32.955 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:28:32.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:32.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:32.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:32.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:33.433 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:28:33.911 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:28:33.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:33.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:33.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:33.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:34.389 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:28:34.867 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:28:34.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:34.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:34.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:34.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:35.344 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:28:35.822 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:28:35.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:35.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:35.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:35.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:36.300 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:28:36.778 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:28:36.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:36.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:36.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:36.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:37.256 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:28:37.734 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:28:38.212 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:28:38.690 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:28:39.168 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:28:39.646 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:28:40.124 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:28:40.602 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:28:41.081 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:28:41.558 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:28:42.037 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:28:42.515 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:28:42.993 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:28:43.471 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:28:43.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:28:43.573 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:28:43.573 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:28:43.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:43.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:43.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:43.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:43.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:43.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:43.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:43.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:43.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:43.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:43.580 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:28:43.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2473 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:43.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2473 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:43.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2473 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:43.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2473 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:43.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2473 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:43.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2473 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:43.580 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2473 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:28:48.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:48.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:48.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:48.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:48.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:48.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:48.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:48.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:48.607 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:48.607 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:48.607 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:28:48.609 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:28:48.609 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:28:48.609 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:48.609 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:48.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:48.610 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:28:48.610 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:48.610 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:28:48.614 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:28:48.614 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:28:48.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:48.614 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:48.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:48.614 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:28:48.615 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:48.615 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:28:48.618 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:28:48.618 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:28:48.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:48.618 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:48.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:48.618 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:28:48.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:48.618 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.622 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:28:48.622 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:28:48.622 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:48.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:48.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:48.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:48.625 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:28:53.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:28:53.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:28:53.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:53.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:53.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:53.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:53.652 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:28:53.653 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:53.654 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:53.654 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:28:53.655 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:28:53.661 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:28:53.661 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:28:53.661 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:53.662 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:53.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:28:53.662 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:28:53.663 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:28:53.663 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:28:53.667 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:28:53.667 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:28:53.668 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:53.668 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:53.668 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:28:53.668 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:28:53.669 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:28:53.669 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:28:53.673 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:28:53.673 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:28:53.673 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:53.673 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:28:53.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:28:53.674 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:28:53.675 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:28:53.675 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:28:53.679 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:28:53.680 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:28:53.680 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:28:53.680 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:28:53.680 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:28:53.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:28:53.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:28:53.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:28:53.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:28:53.685 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:28:54.169 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:28:54.209 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:28:54.210 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:28:54.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:28:54.212 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:28:54.650 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:28:54.684 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:54.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:54.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:54.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:55.130 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:28:55.610 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:28:55.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:55.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:55.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:55.686 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:56.089 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:28:56.568 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:28:56.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:56.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:56.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:56.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:57.049 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:28:57.530 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:28:57.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:57.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:57.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:57.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:58.009 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:28:58.488 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:28:58.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:28:58.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:28:58.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:28:58.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:28:58.969 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:28:59.451 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:28:59.932 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:29:00.413 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:29:00.894 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:29:01.375 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:29:01.854 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:29:02.334 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:29:02.815 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:29:03.297 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:29:03.778 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:29:04.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:04.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:04.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:04.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:04.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:04.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:04.221 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:04.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:04.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:04.221 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:29:04.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:09.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:09.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:09.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:09.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:09.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:09.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:09.249 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:09.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:09.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:09.252 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:09.252 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:29:09.257 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:29:09.257 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:29:09.258 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:09.258 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:09.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:09.259 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:29:09.259 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:09.259 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:29:09.262 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:29:09.262 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:29:09.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:09.263 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:09.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:09.263 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:29:09.263 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:09.263 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:29:09.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:29:09.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:29:09.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:09.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:09.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:09.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:29:09.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:09.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:29:09.270 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:29:09.270 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:29:09.271 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:29:09.271 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:29:09.271 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:29:09.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:09.273 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:09.273 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:09.273 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:29:14.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:14.277 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:14.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:14.280 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:14.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:14.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:14.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:14.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:14.301 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:14.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:14.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:29:14.304 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:29:14.304 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:29:14.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:14.304 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:14.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:14.304 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:29:14.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:14.305 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:29:14.306 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:29:14.306 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:29:14.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:14.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:14.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:14.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:29:14.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:14.307 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:29:14.309 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:29:14.309 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:29:14.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:14.309 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:14.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:14.309 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:29:14.309 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:14.309 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:29:14.312 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:29:14.313 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:29:14.313 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:29:14.313 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:14.318 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:29:14.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:29:14.843 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:29:14.845 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:29:14.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:29:14.847 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:29:15.277 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:29:15.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:15.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:15.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:15.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:15.755 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:29:16.235 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:29:16.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:16.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:16.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:16.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:16.713 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:29:17.191 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:29:17.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:17.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:17.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:17.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:17.669 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:29:18.148 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:29:18.319 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:18.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:18.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:18.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:18.624 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:29:19.102 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:29:19.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:19.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:19.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:19.579 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:29:20.057 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:29:20.536 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:29:21.016 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:29:21.494 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:29:21.973 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:29:22.455 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:29:22.936 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:29:23.413 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:29:23.890 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:29:24.368 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:29:24.845 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:29:25.323 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:29:25.801 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:29:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:29:26.759 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:29:26.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:26.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:26.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:26.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:26.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:26.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:26.860 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:26.860 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:26.860 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:26.860 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:29:26.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:31.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:31.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:31.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:31.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:31.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:31.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:31.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:31.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:31.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:31.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:31.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:29:31.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:29:31.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:29:31.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:31.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:31.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:31.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:29:31.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:31.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:29:31.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:29:31.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:29:31.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:31.883 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:31.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:31.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:29:31.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:31.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:29:31.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:29:31.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:29:31.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:31.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:31.886 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:29:31.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:31.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:31.886 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:29:31.888 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:29:31.888 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:29:31.888 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:29:31.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:31.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:31.893 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:29:32.377 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:29:32.413 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:29:32.415 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:29:32.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:29:32.419 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:29:32.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:29:32.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:29:32.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:29:32.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:29:32.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:29:32.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:29:32.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:29:32.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:29:32.854 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:29:32.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:32.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:32.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:32.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:33.332 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:29:33.809 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:29:33.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:33.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:33.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:33.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:34.286 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:29:34.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:29:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:34.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:34.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:34.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:35.242 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:29:35.720 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:29:35.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:35.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:36.198 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:29:36.675 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:29:36.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:36.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:36.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:36.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:37.153 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:29:37.631 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:29:38.108 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:29:38.585 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:29:39.063 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:29:39.540 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:29:40.018 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:29:40.496 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:29:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:29:41.451 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:29:41.929 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:29:42.407 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:29:42.884 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:29:43.362 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:29:43.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:29:43.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:29:43.478 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:43.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:43.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:43.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:43.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:43.482 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:29:43.482 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:43.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:43.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:43.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:43.483 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:43.483 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:43.483 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:43.483 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:43.483 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:43.483 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:43.484 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2476 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:29:48.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:29:48.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:29:48.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:48.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:48.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:48.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:48.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:29:48.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:48.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:48.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:29:48.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:29:48.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:29:48.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:29:48.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:48.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:48.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:29:48.502 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:29:48.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:29:48.502 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:29:48.509 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:29:48.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:29:48.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:48.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:48.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:29:48.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:29:48.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:29:48.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:29:48.515 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:29:48.516 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:29:48.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:48.516 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:29:48.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:29:48.517 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:29:48.518 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:29:48.518 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:29:48.524 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:29:48.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:29:48.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:29:48.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:29:48.524 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:29:48.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:29:48.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.525 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:29:48.525 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:29:48.525 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:29:48.525 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:29:48.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:29:48.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:29:48.530 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:29:49.014 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:29:49.058 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:29:49.059 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:29:49.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:29:49.062 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:29:49.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:29:49.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:29:49.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:29:49.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:29:49.066 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:29:49.066 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:29:49.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:29:49.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:29:49.491 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:29:49.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:49.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:49.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:49.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:49.969 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:29:50.446 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:29:50.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:50.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:50.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:50.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:50.924 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:29:51.402 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:29:51.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:51.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:51.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:51.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:51.880 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:29:52.358 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:29:52.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:52.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:52.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:52.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:52.836 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:29:53.313 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:29:53.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:29:53.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:29:53.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:29:53.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:29:53.790 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:29:54.268 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:29:54.746 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:29:55.224 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:29:55.701 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:29:56.179 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:29:56.657 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:29:57.134 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:29:57.612 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:29:58.090 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:29:58.568 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:29:59.045 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:29:59.522 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:30:00.000 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:30:00.478 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:30:00.956 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:30:01.434 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:30:01.912 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:30:02.390 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:30:02.868 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:30:03.346 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:30:03.824 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:30:04.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:04.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:04.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:04.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:04.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:04.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:04.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:04.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:04.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:04.115 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:30:04.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3329 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:04.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:04.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:04.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:04.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3329 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:04.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3329 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:04.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3329 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:04.115 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3329 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:09.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:09.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:09.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:09.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:09.121 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:09.121 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:09.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:09.133 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:09.133 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:09.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:09.134 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:30:09.139 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:30:09.139 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:30:09.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:09.140 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:09.140 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:09.140 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:30:09.140 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:09.140 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:30:09.144 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:30:09.144 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:30:09.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:09.144 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:09.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:09.144 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:30:09.144 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:09.144 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:30:09.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:30:09.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:30:09.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:09.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:09.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:09.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:30:09.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:09.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:30:09.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:30:09.151 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:30:09.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:09.156 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:30:09.640 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:30:09.676 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:30:09.679 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:30:09.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:09.682 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:30:09.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:09.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:09.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:09.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:09.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:09.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:09.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:09.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:09.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:09.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:09.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:09.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:09.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:09.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:09.744 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:09.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:09.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:09.744 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:30:09.744 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:09.744 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:09.744 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:09.744 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:09.744 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:09.744 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:14.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:14.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:14.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:14.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:14.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:14.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:14.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:14.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:14.760 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:14.760 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:14.760 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:30:14.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:30:14.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:30:14.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:14.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:14.766 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:14.766 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:30:14.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:14.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:30:14.769 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:30:14.769 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:30:14.769 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:14.770 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:14.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:14.770 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:30:14.770 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:14.770 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:30:14.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:30:14.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:30:14.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:14.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:14.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:14.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:30:14.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:14.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:30:14.777 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:30:14.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:30:14.778 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:30:14.778 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:14.783 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:30:15.266 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:30:15.308 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:30:15.309 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:30:15.311 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:30:15.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:15.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:15.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:15.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:15.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.357 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:15.357 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:15.357 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:15.357 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:15.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:15.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:15.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:15.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:15.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:15.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:15.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:15.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:15.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:15.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:15.593 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:30:15.593 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:30:15.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:30:15.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:15.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:15.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:15.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:15.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:15.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.788 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:30:15.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:15.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:15.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:15.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:15.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:15.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:15.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:15.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:15.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:15.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:15.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:15.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:15.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:16.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:16.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:16.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:16.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:16.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:16.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:16.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:16.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:16.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:16.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:16.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:16.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:16.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:16.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:16.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:16.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:16.207 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:30:16.207 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:30:16.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:16.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:16.214 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:30:16.692 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:30:16.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:16.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:16.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:16.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:17.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:17.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:17.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:17.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:17.016 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:30:17.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:17.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:17.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:17.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:17.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:17.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:17.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:17.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:17.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:17.026 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:30:17.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:22.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:22.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:22.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:22.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:22.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:22.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:22.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:22.052 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:22.052 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:22.053 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:22.053 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:30:22.064 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:30:22.064 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:30:22.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:22.065 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:22.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:22.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:30:22.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:22.066 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:30:22.072 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:30:22.072 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:30:22.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:22.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:22.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:22.073 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:30:22.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:22.073 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:30:22.077 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:30:22.077 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:30:22.077 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:22.077 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:22.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:22.078 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:30:22.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:22.078 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:30:22.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:30:22.083 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:30:22.083 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:30:22.083 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:22.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:22.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:30:22.572 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:30:22.614 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:30:22.616 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:30:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:22.618 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:30:22.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:22.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:22.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:22.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:22.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:22.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:22.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:22.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:22.670 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:22.670 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:22.670 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:22.670 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:22.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:22.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:22.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:22.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:23.048 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:30:23.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:23.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:23.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:23.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:23.526 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:30:24.004 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:30:24.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:24.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:24.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:24.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:24.482 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:30:24.960 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:30:25.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:25.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:25.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:25.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:25.437 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:30:25.915 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:30:26.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:26.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:26.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:26.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:26.393 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:30:26.871 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:30:27.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:27.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:27.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:27.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:27.349 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:30:27.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:27.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:27.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:27.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:27.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:27.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:27.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:27.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:27.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:27.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:27.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:27.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:27.746 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:27.746 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:27.746 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:27.746 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:27.771 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:30:27.771 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:30:27.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:27.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:27.825 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:30:28.299 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:30:28.777 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:30:29.256 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:30:29.734 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:30:30.212 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:30:30.691 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:30:31.170 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:30:31.648 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:30:32.126 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:30:32.605 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:30:32.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:32.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:32.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:32.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:32.780 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:30:32.792 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:32.792 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:32.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:32.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:32.798 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:32.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:32.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:32.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:32.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:32.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:32.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:32.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:32.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:32.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:32.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:32.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:33.082 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:30:33.560 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:30:34.038 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:30:34.515 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:30:34.994 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:30:35.471 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:30:35.949 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:30:36.426 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:30:36.904 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:30:37.382 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:30:37.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:37.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:37.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:37.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:37.860 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:30:37.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:37.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:37.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:37.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:37.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:37.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:37.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:37.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:37.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:37.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:37.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:37.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:37.906 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:30:37.906 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:30:37.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:37.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:38.338 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:30:38.815 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:30:39.293 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:30:39.771 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:30:40.250 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:30:40.728 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:30:41.206 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:30:41.684 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:30:42.162 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:30:42.641 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:30:42.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:42.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:42.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:42.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:42.916 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:30:42.928 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:42.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:42.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:42.929 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:42.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:42.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:42.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:42.933 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:30:42.933 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4451 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:30:42.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:42.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:42.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:47.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:30:47.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:30:47.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:47.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:47.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:47.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:47.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:30:47.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:47.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:47.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:30:47.946 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:30:47.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:30:47.949 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:30:47.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:47.950 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:47.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:30:47.951 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:30:47.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:30:47.951 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:30:47.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:30:47.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:30:47.955 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:47.955 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:47.955 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:30:47.955 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:30:47.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:30:47.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:30:47.958 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:30:47.959 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:30:47.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:47.959 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:30:47.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:30:47.959 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:30:47.959 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:30:47.959 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:30:47.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:30:47.964 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:30:47.964 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:30:47.964 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:30:47.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:30:47.969 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:30:48.451 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:30:48.500 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:30:48.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:48.503 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:30:48.505 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:30:48.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:48.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:48.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:48.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:48.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:48.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:48.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:48.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:48.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:48.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:48.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:48.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:48.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:48.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:48.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:48.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:48.928 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:30:48.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:48.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:48.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:48.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:49.406 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:30:49.884 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:30:49.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:49.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:49.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:49.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:50.362 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:30:50.840 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:30:50.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:50.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:50.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:50.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:51.318 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:30:51.796 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:30:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:51.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:51.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:52.275 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:30:52.753 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:30:52.971 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:30:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:30:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:30:52.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:30:53.231 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:30:53.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:53.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:53.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:53.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:53.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:53.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:53.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:53.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:53.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:53.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:53.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:53.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:53.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:53.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:53.630 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:53.630 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:53.649 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:30:53.649 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:30:53.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:53.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:53.707 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:30:54.185 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:30:54.664 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:30:55.144 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:30:55.622 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:30:56.100 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:30:56.578 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:30:57.056 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:30:57.535 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:30:58.013 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:30:58.492 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:30:58.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:58.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:58.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:58.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:58.658 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:30:58.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:58.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:58.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:58.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:30:58.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:30:58.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:30:58.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:30:58.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:58.687 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:58.687 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:58.687 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:30:58.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:30:58.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:30:58.726 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:30:58.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:58.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:30:58.968 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:30:59.446 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:30:59.924 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:31:00.401 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:31:00.880 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:31:01.357 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:31:01.834 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:31:02.312 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:31:02.790 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:31:03.268 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:31:03.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:03.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:03.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:03.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:03.745 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:31:03.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:03.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:03.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:03.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:03.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:03.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:03.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:03.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:03.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:03.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:03.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:03.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:03.790 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:31:03.790 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:31:03.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:03.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:04.221 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:31:04.700 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:31:05.178 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:31:05.657 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:31:06.135 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:31:06.614 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:31:07.092 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:31:07.571 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:31:08.049 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:31:08.527 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:31:08.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:08.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:08.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:08.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:08.800 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:31:08.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:08.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:08.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:08.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:08.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:31:08.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:31:08.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:31:08.816 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:31:08.816 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:31:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:31:08.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:31:08.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:08.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:08.817 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4450 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:13.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:31:13.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:31:13.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:31:13.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:31:13.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:31:13.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:31:13.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:31:13.830 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:31:13.830 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:13.831 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:31:13.831 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:31:13.835 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:31:13.836 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:31:13.836 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:31:13.836 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:13.837 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:31:13.837 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:31:13.837 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:31:13.837 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:31:13.839 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:31:13.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:31:13.840 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:31:13.840 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:13.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:31:13.840 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:31:13.840 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:31:13.840 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:31:13.842 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:31:13.842 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:31:13.842 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:31:13.842 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:13.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:31:13.843 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:31:13.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:31:13.843 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:31:13.846 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:31:13.846 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:31:13.846 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:13.851 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:31:14.334 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:31:14.374 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:31:14.376 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:31:14.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:14.379 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:31:14.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:14.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:14.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:14.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:14.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:14.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:14.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:14.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:14.417 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:14.417 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:14.417 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:14.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:14.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:14.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:14.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:14.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:14.811 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:31:14.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:14.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:14.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:14.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:15.288 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:31:15.766 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:31:15.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:15.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:15.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:15.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:16.244 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:31:16.722 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:31:16.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:16.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:16.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:16.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:17.200 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:31:17.678 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:31:17.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:17.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:17.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:17.853 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:18.156 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:31:18.634 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:31:18.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:18.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:18.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:18.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:19.112 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:31:19.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:19.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:19.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:19.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:19.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:19.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:19.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:19.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:19.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:19.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:19.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:19.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:19.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:19.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:19.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:19.486 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:31:19.486 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:31:19.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:19.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:19.589 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:31:20.068 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:31:20.547 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:31:21.026 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:31:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:31:21.982 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:31:22.461 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:31:22.939 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:31:23.417 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:31:23.895 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:31:24.373 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:31:24.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:24.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:24.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:24.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:24.496 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:31:24.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:24.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:24.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:24.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:24.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:24.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:24.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:24.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:24.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:24.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:24.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:24.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:24.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:24.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:24.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:24.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:24.847 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:31:25.325 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:31:25.802 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:31:26.280 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:31:26.757 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:31:27.235 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:31:27.713 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:31:28.190 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:31:28.668 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:31:29.145 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:31:29.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:29.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:29.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:29.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:29.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:29.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:29.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:29.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:29.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:29.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:29.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:29.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:29.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:29.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:29.595 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:29.595 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:29.612 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:31:29.612 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:31:29.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:29.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:29.622 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:31:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:31:30.573 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:31:31.051 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:31:31.530 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:31:32.008 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:31:32.487 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:31:32.966 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:31:33.444 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:31:33.923 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:31:34.401 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:31:34.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:34.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:34.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:34.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:34.621 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:31:34.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:34.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:34.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:34.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:34.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:31:34.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:31:34.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:31:34.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:31:34.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:31:34.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:31:34.627 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:34.627 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4437 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:31:39.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:31:39.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:31:39.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:31:39.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:31:39.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:31:39.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:31:39.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:31:39.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:31:39.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:39.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:31:39.646 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:31:39.648 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:31:39.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:31:39.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:31:39.649 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:39.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:31:39.649 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:31:39.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:31:39.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:31:39.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:31:39.651 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:31:39.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:31:39.651 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:39.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:31:39.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:31:39.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:31:39.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:31:39.652 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:31:39.652 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:31:39.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:31:39.652 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:31:39.652 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:31:39.652 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:31:39.652 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:31:39.652 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:31:39.654 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:31:39.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:31:39.654 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:31:39.654 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:31:39.654 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:31:39.654 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:31:39.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:31:39.655 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:31:39.655 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:31:39.655 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:31:39.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:31:39.659 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:31:40.143 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:31:40.179 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:31:40.181 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:31:40.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:40.183 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:31:40.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:40.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:40.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:40.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:40.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:40.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:40.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:40.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:40.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:40.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:40.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:40.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:40.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:40.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:40.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:40.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:40.620 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:31:40.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:40.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:40.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:40.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:41.098 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:31:41.575 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:31:41.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:41.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:41.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:41.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:42.053 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:31:42.531 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:31:42.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:42.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:42.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:42.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:43.008 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:31:43.486 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:31:43.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:43.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:43.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:43.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:43.963 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:31:44.441 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:31:44.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:31:44.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:31:44.662 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:31:44.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:31:44.919 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:31:45.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:45.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:45.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:45.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:45.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:45.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:45.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:45.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:45.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:45.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:45.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:45.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:45.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:45.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:45.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:45.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:45.291 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:31:45.291 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:31:45.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:45.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:45.395 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:31:45.873 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:31:46.351 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:31:46.829 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:31:47.307 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:31:47.785 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:31:48.263 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:31:48.741 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:31:49.220 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:31:49.698 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:31:50.177 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:31:50.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:50.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:50.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:50.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:50.301 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:31:50.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:50.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:50.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:50.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:50.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:50.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:50.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:50.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:50.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:50.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:50.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:50.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:50.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:50.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:50.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:50.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:50.654 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:31:51.132 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:31:51.609 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:31:52.087 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:31:52.564 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:31:53.042 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:31:53.519 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:31:53.997 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:31:54.475 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:31:54.953 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:31:55.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:55.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:55.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:55.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:55.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:55.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:55.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:55.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:31:55.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:31:55.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:31:55.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:31:55.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:55.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:31:55.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:31:55.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:31:55.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:31:55.422 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:31:55.423 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:31:55.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:55.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:31:55.429 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:31:55.907 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:31:56.386 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:31:56.864 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:31:57.343 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:31:57.820 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:31:58.298 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:31:58.777 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:31:59.255 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:31:59.734 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:32:00.212 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:32:00.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:00.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:00.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:00.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:00.432 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:32:00.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:00.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:00.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:00.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:00.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:32:00.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:32:00.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:32:00.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:32:00.447 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:32:00.447 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:32:00.447 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:32:00.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4438 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:00.447 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4438 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:00.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4438 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:00.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4438 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:00.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4438 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:00.448 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4438 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:05.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:32:05.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:32:05.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:32:05.450 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:32:05.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:32:05.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:32:05.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:32:05.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:32:05.466 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:05.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:32:05.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:32:05.472 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:32:05.473 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:32:05.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:32:05.473 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:05.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:32:05.474 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:32:05.474 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:32:05.475 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:32:05.477 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:32:05.477 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:32:05.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:32:05.477 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:05.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:32:05.478 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:32:05.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:32:05.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:32:05.481 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:32:05.481 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:32:05.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:32:05.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:05.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:32:05.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:32:05.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:32:05.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:32:05.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:32:05.487 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:32:05.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:05.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:32:05.973 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:32:06.017 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:32:06.019 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:32:06.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:06.020 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:32:06.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:06.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:06.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:06.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:06.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:06.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:32:06.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:32:06.111 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:06.111 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:06.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:06.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:06.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:06.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:06.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:06.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:06.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:32:06.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:32:06.390 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:32:06.391 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:32:06.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:32:06.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:06.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:06.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:06.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:06.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:06.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.777 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:32:06.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:06.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:06.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:06.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:06.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:06.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:06.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:06.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:32:06.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:32:06.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:06.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:06.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:06.926 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:32:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:32:07.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:07.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:07.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:07.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:07.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:07.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:07.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:07.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:07.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:07.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:07.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:07.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:07.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:07.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:07.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:07.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:07.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:07.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:07.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:32:07.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:32:07.639 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:32:07.640 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:32:07.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:07.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:07.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:32:08.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:08.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:08.204 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:08.204 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:08.204 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:32:08.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:08.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:08.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:08.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:08.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:32:08.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:32:08.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:32:08.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:32:08.218 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:32:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:32:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:32:08.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=584 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:08.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=584 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:08.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=584 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:08.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:08.218 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:32:13.219 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:32:13.219 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:32:13.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:32:13.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:32:13.223 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:32:13.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:32:13.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:32:13.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:32:13.235 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:13.235 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:32:13.235 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:32:13.242 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:32:13.242 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:32:13.242 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:32:13.242 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:13.243 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:32:13.243 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:32:13.243 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:32:13.243 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:32:13.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:32:13.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:32:13.247 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:32:13.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:13.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:32:13.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:32:13.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:32:13.248 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:32:13.252 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:32:13.252 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:32:13.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:32:13.252 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:32:13.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:32:13.252 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:32:13.252 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:32:13.252 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:32:13.257 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:32:13.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:32:13.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.258 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:32:13.258 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:32:13.258 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:32:13.258 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:32:13.263 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:32:13.746 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:32:13.795 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:32:13.797 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:32:13.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:13.799 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:32:13.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:13.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:13.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:13.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:13.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:13.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:13.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:13.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:13.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:13.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:13.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:32:13.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:32:13.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:13.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:13.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:13.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:14.223 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:32:14.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:14.263 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:14.263 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:14.263 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:14.700 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:32:15.178 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:32:15.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:15.264 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:15.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:15.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:15.656 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:32:16.134 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:32:16.264 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:16.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:16.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:16.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:16.612 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:32:17.089 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:32:17.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:17.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:17.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:17.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:17.567 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:32:18.045 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:32:18.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:32:18.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:32:18.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:32:18.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:32:18.523 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:32:19.001 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:32:19.479 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:32:19.956 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:32:20.434 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:32:20.912 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:32:21.389 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:32:21.867 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:32:22.346 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:32:22.814 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:32:23.286 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:32:23.756 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:32:24.225 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:32:24.699 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:32:25.178 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:32:25.655 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:32:26.133 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:32:26.608 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:32:27.085 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:32:27.563 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:32:28.041 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:32:28.519 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:32:28.997 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:32:29.475 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:32:29.953 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:32:30.431 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:32:30.908 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:32:31.387 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:32:31.865 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:32:32.343 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:32:32.820 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:32:33.298 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:32:33.776 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:32:33.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:33.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:33.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:33.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:33.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:33.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:33.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:33.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:33.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:33.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:33.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:33.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:33.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:33.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:33.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:32:33.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:32:33.960 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:32:33.960 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:32:33.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:33.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:34.254 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:32:34.732 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:32:35.210 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:32:35.689 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:32:36.167 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:32:36.644 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:32:37.122 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:32:37.601 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:32:38.079 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:32:38.556 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:32:39.034 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:32:39.513 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:32:39.990 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:32:40.468 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:32:40.946 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:32:41.425 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:32:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:32:42.382 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:32:42.860 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:32:43.339 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:32:43.818 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:32:44.297 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:32:44.775 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:32:45.253 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:32:45.732 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:32:46.210 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:32:46.688 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:32:47.166 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:32:47.643 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 05:32:48.122 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 05:32:48.601 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 05:32:49.080 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 05:32:49.558 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 05:32:50.036 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 05:32:50.515 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 05:32:50.994 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 05:32:51.471 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 05:32:51.950 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 05:32:52.428 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 05:32:52.907 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 05:32:53.385 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 05:32:53.862 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 05:32:53.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:53.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:53.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:53.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:53.969 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:32:53.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:53.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:53.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:53.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:32:53.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:32:53.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:32:53.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:32:53.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:53.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:53.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:53.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:32:53.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:32:53.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:32:53.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:32:53.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:53.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:32:54.339 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 05:32:54.817 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 05:32:55.295 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 05:32:55.773 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 05:32:56.250 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 05:32:56.727 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 05:32:57.205 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 05:32:57.683 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 05:32:58.160 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 05:32:58.638 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 05:32:59.116 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 05:32:59.593 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 05:33:00.071 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 05:33:00.549 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 05:33:01.027 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 05:33:01.504 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 05:33:01.982 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 05:33:02.459 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 05:33:02.937 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 05:33:03.415 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 05:33:03.892 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 05:33:04.370 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 05:33:04.847 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 05:33:05.326 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 05:33:05.803 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 05:33:06.281 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 05:33:06.759 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 05:33:07.236 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 05:33:07.714 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 05:33:08.192 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 05:33:08.669 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 05:33:09.146 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 05:33:09.624 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 05:33:10.101 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 05:33:10.579 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 05:33:11.057 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 05:33:11.534 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 05:33:12.012 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 05:33:12.490 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 05:33:12.968 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 05:33:13.446 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 05:33:13.924 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 05:33:13.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:14.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:14.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:14.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:14.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:14.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:14.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:14.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:14.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:14.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:14.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:14.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:14.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:14.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:14.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:14.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:14.062 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:33:14.062 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:33:14.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:14.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:14.400 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 05:33:14.878 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 05:33:15.356 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 05:33:15.834 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 05:33:16.313 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 05:33:16.791 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 05:33:17.270 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 05:33:17.747 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 05:33:18.226 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 05:33:18.704 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 05:33:19.181 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 05:33:19.659 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 05:33:20.137 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 05:33:20.616 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 05:33:21.093 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 05:33:21.572 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 05:33:22.049 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 05:33:22.527 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 05:33:23.005 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 05:33:23.482 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 05:33:23.961 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 05:33:24.439 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 05:33:24.917 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 05:33:25.395 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 05:33:25.872 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 05:33:26.350 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 05:33:26.828 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 05:33:27.306 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 05:33:27.784 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 05:33:28.262 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 05:33:28.740 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 05:33:29.218 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 05:33:29.696 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 05:33:30.174 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 05:33:30.652 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 05:33:31.130 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 05:33:31.609 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 05:33:32.086 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 05:33:32.564 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 05:33:33.042 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 05:33:33.521 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 05:33:33.999 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 05:33:34.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:34.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:34.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:34.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:34.076 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:33:34.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:33:34.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:33:34.087 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:33:34.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:33:39.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:33:39.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:33:39.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:33:39.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:33:39.094 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:33:39.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:33:39.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:33:39.105 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:33:39.105 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:39.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:33:39.106 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:33:39.112 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:33:39.113 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:33:39.113 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:33:39.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:39.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:33:39.115 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:33:39.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:33:39.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:33:39.119 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:33:39.119 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:33:39.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:33:39.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:39.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:33:39.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:33:39.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:33:39.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:33:39.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:33:39.123 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:33:39.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:33:39.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:39.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:33:39.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:33:39.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:33:39.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:33:39.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:33:39.128 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:33:39.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:39.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:39.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:33:39.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:33:39.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:33:39.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:33:39.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:33:39.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:33:39.130 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:33:44.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:33:44.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:33:44.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:33:44.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:33:44.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:33:44.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:33:44.145 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:33:44.145 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:33:44.145 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:44.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:33:44.146 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:33:44.149 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:33:44.150 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:33:44.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:33:44.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:44.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:33:44.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:33:44.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:33:44.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:33:44.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:33:44.154 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:33:44.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:33:44.154 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:44.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:33:44.154 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:33:44.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:33:44.154 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:33:44.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:33:44.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:33:44.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:33:44.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:33:44.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:33:44.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:33:44.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:33:44.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:33:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:33:44.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:33:44.162 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:33:44.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:33:44.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:33:44.650 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:33:44.698 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:33:44.700 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:33:44.703 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:33:44.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:44.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:44.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:44.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:44.751 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:44.751 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:44.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:44.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:44.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:44.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:44.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:44.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:44.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:44.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:44.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:44.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:44.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:44.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:44.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:44.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:44.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:45.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:45.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:45.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:45.012 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:45.012 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:45.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:45.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:45.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.128 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:33:45.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:33:45.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:33:45.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:33:45.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:33:45.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:45.238 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:45.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:45.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:45.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:45.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:45.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:45.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:45.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:45.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:45.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:45.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:45.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:45.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.505 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:45.505 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:45.505 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:45.505 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:45.547 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:33:45.547 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:33:45.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.605 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:33:45.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:45.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.863 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:33:45.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:45.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:45.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:45.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:45.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:45.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:45.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:45.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:45.934 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:33:45.934 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:33:45.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:45.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.080 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:33:46.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:33:46.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:33:46.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:33:46.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:33:46.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:46.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:46.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:46.228 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:33:46.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:46.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:46.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:46.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:46.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.245 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:46.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:46.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:46.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:46.262 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:33:46.263 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:33:46.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:46.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:46.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:46.552 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:33:46.557 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:33:46.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:46.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:46.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:46.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:46.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:46.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:46.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:46.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:46.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:46.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:46.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:46.603 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:46.603 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:46.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:46.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:47.034 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:33:47.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:33:47.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:33:47.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:33:47.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:33:47.512 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:33:47.989 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:33:48.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:33:48.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:33:48.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:33:48.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:33:48.467 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:33:48.945 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:33:49.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:49.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:49.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:49.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:49.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:49.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:49.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:49.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:49.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:49.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:49.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:49.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:49.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:49.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:49.126 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:49.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:49.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:49.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:33:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:33:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:33:49.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:33:49.422 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:33:49.900 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:33:50.378 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:33:50.855 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:33:51.334 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:33:51.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:51.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:51.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:51.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:51.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:51.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:51.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:51.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:51.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:51.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:51.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:51.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:51.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:51.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:51.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:51.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:51.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:51.810 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:33:52.288 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:33:52.766 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:33:53.244 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:33:53.721 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:33:54.199 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:33:54.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:54.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:54.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:54.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:54.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:54.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:54.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:54.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:54.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:54.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:54.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:54.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:54.386 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:54.386 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:54.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:54.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:54.434 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:33:54.434 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:33:54.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:54.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:54.676 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:33:55.155 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:33:55.634 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:33:56.112 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:33:56.590 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:33:57.069 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:33:57.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:57.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:57.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:57.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:57.157 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:33:57.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:33:57.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:33:57.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:33:57.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:33:57.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:57.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:33:57.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:33:57.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:33:57.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:33:57.207 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:33:57.207 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:33:57.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:57.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:33:57.547 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:33:58.025 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:33:58.503 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:33:58.982 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:33:59.460 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:33:59.938 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:34:00.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:00.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:00.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:00.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:00.025 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:34:00.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:00.043 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:00.043 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:00.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:00.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:00.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:00.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:00.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:00.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:00.077 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:34:00.077 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:34:00.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:00.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:00.416 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:34:00.894 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:34:01.372 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:34:01.851 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:34:02.329 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:34:02.807 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:34:02.890 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:02.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:02.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:02.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:02.895 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:34:02.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:02.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:02.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:02.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:02.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:02.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:34:02.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:34:02.909 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4001 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:02.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:02.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:02.909 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4002 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:07.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:34:07.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:34:07.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:07.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:07.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:07.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:07.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:07.921 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:34:07.921 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:07.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:34:07.922 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:34:07.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:34:07.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:34:07.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:34:07.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:07.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:07.924 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:34:07.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:34:07.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:34:07.927 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:34:07.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:34:07.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:34:07.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:07.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:07.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:34:07.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:34:07.928 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:34:07.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:34:07.932 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:34:07.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:34:07.932 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:07.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:07.932 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:34:07.932 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:34:07.932 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:34:07.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:34:07.939 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:34:07.939 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:34:07.939 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:07.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:34:08.422 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:34:08.481 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:34:08.483 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:34:08.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:08.485 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:34:08.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:08.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:08.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:08.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:08.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:08.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:08.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:08.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:08.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:08.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:08.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:08.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:08.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:08.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:08.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:08.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:08.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:34:08.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:08.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:08.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:08.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:09.377 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:34:09.855 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:34:09.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:09.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:09.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:09.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:10.333 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:34:10.811 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:34:10.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:10.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:10.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:10.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:11.289 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:34:11.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:11.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:11.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:11.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:11.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:11.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:11.713 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:11.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:11.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:11.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:11.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:11.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:11.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:11.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:11.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:11.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:11.759 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:34:11.759 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:34:11.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:11.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:11.766 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:34:11.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:11.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:11.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:11.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:12.244 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:34:12.723 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:34:12.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:12.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:12.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:12.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:13.201 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:34:13.679 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:34:14.158 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:34:14.636 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:34:14.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:14.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:14.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:14.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:14.969 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:34:14.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:14.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:14.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:14.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:14.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:14.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:14.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:14.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:14.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:14.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:14.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:14.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:15.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:15.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:15.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:15.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:15.113 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:34:15.590 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:34:16.067 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:34:16.545 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:34:17.023 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:34:17.500 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:34:17.978 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:34:18.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:18.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:18.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:18.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:18.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:18.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:18.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:18.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:18.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:18.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:18.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:18.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:18.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:18.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:18.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:18.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:18.397 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:34:18.398 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:34:18.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:18.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:18.455 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:34:18.934 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:34:19.413 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:34:19.891 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:34:20.369 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:34:20.847 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:34:21.326 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:34:21.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:21.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:21.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:21.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:21.615 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:34:21.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:21.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:21.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:21.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:21.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:21.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:21.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:21.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:21.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:34:21.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:34:21.622 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:34:21.622 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2922 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:21.622 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2922 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:21.622 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2922 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:21.622 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2922 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:21.622 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2922 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:21.622 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=2922 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:26.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:34:26.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:34:26.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:26.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:26.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:26.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:26.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:26.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:34:26.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:26.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:34:26.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:34:26.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:34:26.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:34:26.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:34:26.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:26.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:26.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:34:26.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:34:26.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:34:26.639 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:34:26.639 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:34:26.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:34:26.639 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:26.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:26.639 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:34:26.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:34:26.639 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:34:26.641 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:34:26.641 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:34:26.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:34:26.641 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:26.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:26.641 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:34:26.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:34:26.641 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:34:26.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:34:26.643 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:34:26.644 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:26.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:26.648 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:34:27.131 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:34:27.170 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:34:27.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:27.174 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:34:27.177 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:34:27.206 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:27.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:27.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:27.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:27.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:27.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:27.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:27.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:27.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:27.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:27.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:27.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:27.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:27.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:27.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:27.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:27.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:27.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:27.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:27.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:27.608 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:34:27.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:27.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:27.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:27.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:27.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:27.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:27.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:27.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:27.619 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:27.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:27.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:27.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:27.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:27.653 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:34:27.654 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:34:27.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:27.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:28.085 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:34:28.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:28.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:28.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:28.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:28.145 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:34:28.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:28.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:28.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:28.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:28.171 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:28.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:28.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:28.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:28.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:28.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:28.173 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:28.173 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:28.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:28.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:28.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:28.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:28.562 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:34:28.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:28.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:28.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:28.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:29.040 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:34:29.517 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:34:29.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:29.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:29.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:29.995 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:34:30.473 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:34:30.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:30.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:30.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:30.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:30.950 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:34:31.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:31.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:31.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:31.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:31.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:31.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:31.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:31.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:31.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:31.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:31.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:31.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:31.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:31.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:31.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:31.420 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:34:31.421 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:34:31.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:31.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:31.427 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:34:31.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:31.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:31.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:31.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:31.904 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:34:32.383 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:34:32.862 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:34:33.340 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:34:33.818 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:34:34.297 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:34:34.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:34.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:34.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:34.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:34.385 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:34:34.395 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:34.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:34.395 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:34.395 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:34.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:34.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:34.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:34.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:34.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:34:34.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:34:34.399 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:34:34.399 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1656 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:34.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1656 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:34.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1656 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:34.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1656 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:34.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1656 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:34.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1656 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:34.400 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1656 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:34:39.398 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:34:39.398 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:34:39.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:39.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:39.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:39.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:39.407 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:34:39.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:34:39.409 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:39.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:34:39.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:34:39.413 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:34:39.414 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:34:39.414 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:34:39.414 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:39.415 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:34:39.415 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:34:39.415 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:34:39.415 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:34:39.417 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:34:39.417 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:34:39.417 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:34:39.418 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:39.418 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:34:39.418 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:34:39.418 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:34:39.418 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:34:39.420 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:34:39.420 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:34:39.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:34:39.420 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:34:39.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:34:39.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:34:39.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:34:39.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:34:39.423 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:34:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:34:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:34:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:34:39.423 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:34:39.424 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:34:39.424 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:34:39.424 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:34:39.429 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:34:39.912 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:34:39.952 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:34:39.954 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:34:39.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:39.956 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:34:39.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:39.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:39.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:39.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:39.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:39.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:39.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:39.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:39.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:39.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:39.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:39.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:40.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:40.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:40.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:40.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:40.390 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:34:40.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:40.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:40.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:40.428 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:40.868 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:34:41.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:41.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:41.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:41.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:41.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:41.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:41.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:41.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:41.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:41.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:41.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:41.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:41.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:41.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:41.331 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:41.331 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:41.335 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:34:41.335 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:34:41.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:41.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:41.345 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:34:41.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:41.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:41.428 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:41.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:41.822 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:34:42.300 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:34:42.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:42.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:42.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:42.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:42.779 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:34:43.258 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:34:43.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:43.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:43.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:43.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:43.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:43.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:43.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:43.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:43.504 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:34:43.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:43.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:43.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:43.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:43.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:43.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:43.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:43.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:43.530 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:43.530 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:43.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:43.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:43.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:43.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:43.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:43.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:43.736 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:34:44.213 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:34:44.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:34:44.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:34:44.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:34:44.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:34:44.691 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:34:45.169 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:34:45.647 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:34:46.125 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:34:46.602 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:34:47.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:34:47.557 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:34:48.035 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:34:48.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:48.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:48.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:48.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:48.512 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:34:48.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:48.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:48.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:48.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:34:48.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:34:48.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:34:48.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:34:48.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:48.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:34:48.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:34:48.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:34:48.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:34:48.558 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:34:48.558 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:34:48.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:48.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:34:48.990 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:34:49.469 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:34:49.947 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:34:50.425 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:34:50.903 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:34:51.382 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:34:51.860 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:34:52.338 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:34:52.816 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:34:53.295 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:34:53.771 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:34:54.249 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:34:54.728 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:34:55.206 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:34:55.685 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:34:56.163 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:34:56.641 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:34:57.119 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:34:57.598 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:34:58.076 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:34:58.555 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:34:59.033 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:34:59.511 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:34:59.990 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:35:00.468 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:35:00.946 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:35:01.424 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:35:01.903 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:35:02.382 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:35:02.860 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:35:03.339 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:35:03.817 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:35:04.296 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:35:04.774 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:35:05.252 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:35:05.731 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:35:06.209 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:35:06.688 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:35:07.166 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:35:07.644 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:35:08.122 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:35:08.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:08.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:08.524 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:35:08.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:08.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:08.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:08.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:08.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:35:08.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:35:08.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:35:08.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:35:08.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:35:08.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:35:08.528 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:35:08.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:08.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:08.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:08.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:08.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:08.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:08.528 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:13.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:35:13.530 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:35:13.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:35:13.533 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:35:13.534 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:35:13.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:35:13.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:35:13.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:35:13.543 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:13.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:35:13.543 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:35:13.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:35:13.547 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:35:13.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:35:13.547 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:13.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:35:13.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:35:13.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:35:13.547 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:35:13.550 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:35:13.550 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:35:13.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:35:13.550 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:13.550 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:35:13.550 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:35:13.550 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:35:13.550 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:35:13.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:35:13.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:35:13.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:35:13.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:13.556 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:35:13.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:35:13.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:35:13.556 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:35:13.566 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:35:13.566 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:35:13.566 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:35:13.566 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:35:13.566 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:35:13.567 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:35:13.567 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:35:13.567 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:35:13.567 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.568 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:13.572 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:35:14.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:35:14.112 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:35:14.114 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:35:14.116 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:35:14.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:14.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:14.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:14.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:14.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:14.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:14.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:14.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:14.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:14.169 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:14.169 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:14.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:14.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:14.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:14.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:14.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:14.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:14.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:35:14.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:14.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:14.575 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:14.575 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:14.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:14.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:14.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:14.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:14.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:14.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:14.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:14.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:14.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:14.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:14.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:14.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:14.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:14.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:14.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:14.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:14.857 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:35:14.857 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:35:14.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:14.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:15.010 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:35:15.489 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:35:15.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:15.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:15.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:15.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:15.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:15.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:15.798 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:15.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:15.799 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:35:15.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:15.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:15.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:15.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:15.825 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:15.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:15.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:15.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:15.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:15.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:15.827 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:15.827 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:15.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:15.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:15.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:15.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:15.967 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:35:16.444 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:35:16.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:16.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:16.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:16.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:16.922 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:35:17.400 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:35:17.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:17.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:17.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:17.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:17.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:17.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:17.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:17.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:17.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:17.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:17.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:17.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:17.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:17.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:17.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:17.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:17.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:17.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:17.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:17.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:17.816 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:35:17.816 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:35:17.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:17.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:17.876 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:35:18.354 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:35:18.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:18.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:18.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:18.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:18.833 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:35:19.312 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:35:19.790 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:35:20.269 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:35:20.747 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:35:21.225 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:35:21.703 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:35:22.181 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:35:22.660 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:35:23.138 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:35:23.616 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:35:24.095 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:35:24.573 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:35:25.052 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:35:25.530 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:35:26.008 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:35:26.487 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:35:26.965 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:35:27.444 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:35:27.922 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:35:28.401 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:35:28.879 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:35:29.357 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:35:29.836 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:35:30.314 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:35:30.792 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:35:31.271 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:35:31.749 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:35:32.227 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:35:32.705 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:35:33.184 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:35:33.662 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:35:34.140 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:35:34.619 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:35:35.097 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:35:35.574 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:35:36.053 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:35:36.531 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:35:37.009 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:35:37.487 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:35:37.809 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:37.809 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:37.809 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:35:37.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:35:37.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:35:37.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:35:37.813 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:35:37.813 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5172 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:37.813 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5172 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:37.813 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5172 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:37.813 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=5172 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:35:42.816 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:35:42.816 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:35:42.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:35:42.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:35:42.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:35:42.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:35:42.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:35:42.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:35:42.825 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:42.825 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:35:42.825 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:35:42.827 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:35:42.828 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:35:42.828 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:35:42.828 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:42.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:35:42.829 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:35:42.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:35:42.829 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:35:42.830 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:35:42.831 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:35:42.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:35:42.831 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:42.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:35:42.831 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:35:42.831 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:35:42.831 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:35:42.833 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:35:42.833 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:35:42.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:35:42.833 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:35:42.833 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:35:42.833 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:35:42.833 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:35:42.833 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:35:42.836 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:35:42.837 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:35:42.837 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:35:42.837 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.837 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:35:42.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.838 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:35:42.838 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:35:42.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:35:42.841 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:35:43.326 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:35:43.370 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:35:43.372 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:35:43.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:43.374 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:35:43.401 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:43.401 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:43.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:43.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:43.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:43.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:43.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:43.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:43.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:43.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:43.418 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:43.418 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:43.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:43.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:43.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:43.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:43.803 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:35:43.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:43.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:43.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:43.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:44.280 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:35:44.758 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:35:44.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:44.841 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:44.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:44.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:45.236 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:35:45.714 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:35:45.842 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:45.842 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:45.842 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:45.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:45.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:45.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:45.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:45.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:45.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:45.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:45.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:45.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:45.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:45.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:45.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:45.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:45.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:45.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:45.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:45.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:45.995 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:35:45.996 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:35:45.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:45.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:46.191 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:35:46.669 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:35:46.843 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:46.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:46.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:46.843 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:47.148 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:35:47.626 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:35:47.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:35:47.844 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:35:47.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:35:47.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:35:48.104 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:35:48.582 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:35:48.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:48.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:48.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:48.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:48.725 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:35:48.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:48.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:48.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:48.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:48.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:48.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:48.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:48.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:48.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:48.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:48.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:48.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:48.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:48.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:48.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:48.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:49.059 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:35:49.536 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:35:50.014 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:35:50.492 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:35:50.970 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:35:51.448 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:35:51.925 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:35:52.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:52.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:52.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:52.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:52.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:52.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:52.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:52.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:35:52.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:35:52.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:35:52.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:35:52.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:52.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:35:52.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:35:52.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:35:52.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:35:52.106 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:35:52.106 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:35:52.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:52.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:35:52.403 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:35:52.880 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:35:53.358 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:35:53.835 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:35:54.313 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:35:54.792 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:35:55.270 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:35:55.748 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:35:56.227 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:35:56.705 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:35:57.183 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:35:57.661 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:35:58.140 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:35:58.618 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:35:59.097 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:35:59.575 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:36:00.054 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:36:00.532 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:36:01.010 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:36:01.488 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:36:01.967 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:36:02.445 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:36:02.923 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:36:03.402 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:36:03.880 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:36:04.358 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:36:04.837 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:36:05.315 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:36:05.793 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:36:06.272 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:36:06.750 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:36:07.228 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:36:07.706 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:36:08.184 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:36:08.662 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:36:09.140 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:36:09.619 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:36:10.097 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:36:10.576 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:36:11.054 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:36:11.531 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:36:12.010 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:36:12.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:12.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:12.098 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:36:12.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:12.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:36:12.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:36:12.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:36:12.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:36:12.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:36:12.100 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:36:12.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:36:17.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:36:17.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:36:17.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:36:17.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:36:17.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:36:17.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:36:17.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:36:17.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:36:17.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:17.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:36:17.113 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:36:17.115 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:36:17.116 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:36:17.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:36:17.116 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:17.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:36:17.117 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:36:17.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:36:17.117 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:36:17.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:36:17.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:36:17.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:36:17.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:17.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:36:17.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:36:17.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:36:17.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:36:17.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:36:17.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:36:17.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:36:17.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:17.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:36:17.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:36:17.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:36:17.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:36:17.130 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:36:17.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:36:17.131 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:36:17.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:17.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:36:17.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:36:17.668 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:36:17.669 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:36:17.669 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:36:17.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:17.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:17.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:17.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:17.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:17.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:17.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:17.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:17.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:17.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:17.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:17.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:36:17.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:36:17.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:17.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:17.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:17.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:17.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:17.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:17.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:17.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:17.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:17.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:17.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:18.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:18.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:18.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:18.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:18.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.007 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:18.007 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:18.007 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:36:18.007 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:36:18.039 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:36:18.039 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:36:18.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.096 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:36:18.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:18.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:18.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:18.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:18.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:18.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:18.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:18.386 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:36:18.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:18.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:18.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:18.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:18.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:18.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:18.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:18.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:18.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:18.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:36:18.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:36:18.420 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:18.420 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:18.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.573 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:36:18.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:18.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:18.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:18.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:18.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:18.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:18.993 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:18.993 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:18.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:18.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:18.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:18.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:18.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:18.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:36:18.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:36:19.043 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:36:19.043 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:36:19.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:19.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:19.049 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:36:19.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:19.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:19.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:19.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:19.528 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:36:19.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:19.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:19.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:19.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:19.617 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:36:19.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:19.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:19.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:19.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:19.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:36:19.626 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:36:19.626 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:36:19.626 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:36:19.626 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:36:19.626 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:36:19.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:36:19.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:36:19.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:36:19.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:36:19.626 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:36:24.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:36:24.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:36:24.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:36:24.632 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:36:24.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:36:24.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:36:24.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:36:24.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:36:24.641 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:24.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:36:24.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:36:24.645 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:36:24.645 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:36:24.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:36:24.645 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:24.646 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:36:24.646 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:36:24.646 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:36:24.646 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:36:24.650 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:36:24.650 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:36:24.650 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:36:24.650 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:24.650 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:36:24.651 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:36:24.651 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:36:24.651 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:36:24.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:36:24.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:36:24.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:36:24.655 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:36:24.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:36:24.655 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:36:24.655 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:36:24.655 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:36:24.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:36:24.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:36:24.661 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:36:24.662 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:36:24.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:36:24.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:36:24.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:36:24.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:36:25.149 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:36:25.198 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:36:25.200 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:36:25.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:25.203 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:36:25.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:25.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:25.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:25.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:25.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:25.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:25.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:25.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:25.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:25.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:25.253 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:36:25.253 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:36:25.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:25.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:25.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:25.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:25.627 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:36:25.666 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:25.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:25.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:25.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:26.105 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:36:26.582 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:36:26.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:26.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:26.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:26.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:27.060 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:36:27.538 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:36:27.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:27.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:27.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:27.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:28.016 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:36:28.494 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:36:28.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:28.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:28.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:28.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:28.972 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:36:29.450 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:36:29.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:36:29.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:36:29.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:36:29.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:36:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:36:30.405 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:36:30.883 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:36:31.361 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:36:31.839 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:36:32.317 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:36:32.795 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:36:33.273 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:36:33.751 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:36:34.229 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:36:34.707 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:36:35.185 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:36:35.663 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:36:36.140 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:36:36.618 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:36:37.096 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:36:37.573 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:36:38.052 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:36:38.529 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:36:39.007 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:36:39.485 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:36:39.963 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:36:40.441 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:36:40.919 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:36:41.396 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:36:41.874 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:36:42.352 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:36:42.830 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:36:43.308 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:36:43.786 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:36:44.264 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:36:44.742 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:36:45.220 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:36:45.698 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:36:46.176 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:36:46.654 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:36:47.132 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:36:47.609 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:36:48.087 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:36:48.565 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:36:49.042 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:36:49.520 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:36:49.998 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:36:50.476 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:36:50.954 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:36:51.432 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:36:51.910 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:36:52.389 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:36:52.866 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:36:53.344 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:36:53.821 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:36:54.299 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:36:54.777 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:36:55.255 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:36:55.732 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:36:56.211 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:36:56.689 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:36:57.167 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:36:57.644 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:36:58.122 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:36:58.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:58.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:58.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:58.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:58.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:58.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:58.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:58.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:36:58.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:36:58.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:36:58.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:36:58.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:58.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:36:58.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:36:58.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:36:58.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:36:58.355 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:36:58.356 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:36:58.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:58.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:36:58.597 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:36:59.076 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 05:36:59.554 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 05:37:00.033 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 05:37:00.512 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 05:37:00.990 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 05:37:01.469 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 05:37:01.947 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 05:37:02.425 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 05:37:02.904 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 05:37:03.382 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 05:37:03.860 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 05:37:04.338 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 05:37:04.816 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 05:37:05.295 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 05:37:05.773 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 05:37:06.251 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 05:37:06.730 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 05:37:07.208 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 05:37:07.687 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 05:37:08.165 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 05:37:08.643 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 05:37:09.122 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 05:37:09.599 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 05:37:10.078 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 05:37:10.557 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 05:37:11.035 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 05:37:11.514 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 05:37:11.993 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 05:37:12.471 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 05:37:12.949 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 05:37:13.427 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-02-19 05:37:13.906 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-02-19 05:37:14.384 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-02-19 05:37:14.863 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-02-19 05:37:15.341 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-02-19 05:37:15.820 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-02-19 05:37:16.298 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-02-19 05:37:16.777 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-02-19 05:37:17.255 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-02-19 05:37:17.734 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-02-19 05:37:18.212 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-02-19 05:37:18.691 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-02-19 05:37:19.170 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-02-19 05:37:19.648 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-02-19 05:37:20.126 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-02-19 05:37:20.605 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-02-19 05:37:21.084 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-02-19 05:37:21.562 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-02-19 05:37:22.040 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-02-19 05:37:22.519 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-02-19 05:37:22.997 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-02-19 05:37:23.475 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-02-19 05:37:23.953 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-02-19 05:37:24.431 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-02-19 05:37:24.908 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-02-19 05:37:25.386 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-02-19 05:37:25.865 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-02-19 05:37:26.344 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-02-19 05:37:26.822 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-02-19 05:37:27.300 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-02-19 05:37:27.779 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-02-19 05:37:28.257 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-02-19 05:37:28.736 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-02-19 05:37:29.214 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-02-19 05:37:29.693 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-02-19 05:37:30.170 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-02-19 05:37:30.649 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-02-19 05:37:31.127 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-02-19 05:37:31.624 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-02-19 05:37:32.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:37:32.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:37:32.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:37:32.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:37:32.015 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:37:32.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:37:32.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:37:32.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:37:32.034 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:37:32.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:37:32.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:37:32.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:37:32.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:37:32.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:37:32.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:37:32.036 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:37:32.036 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:37:32.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:37:32.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:37:32.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:37:32.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:37:32.101 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-02-19 05:37:32.578 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-02-19 05:37:33.055 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-02-19 05:37:33.533 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-02-19 05:37:34.011 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-02-19 05:37:34.489 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-02-19 05:37:34.966 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-02-19 05:37:35.444 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-02-19 05:37:35.922 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-02-19 05:37:36.400 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-02-19 05:37:36.877 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-02-19 05:37:37.354 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-02-19 05:37:37.832 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-02-19 05:37:38.310 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-02-19 05:37:38.787 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-02-19 05:37:39.265 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-02-19 05:37:39.743 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-02-19 05:37:40.220 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-02-19 05:37:40.698 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-02-19 05:37:41.175 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-02-19 05:37:41.653 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-02-19 05:37:42.131 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-02-19 05:37:42.609 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-02-19 05:37:43.086 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-02-19 05:37:43.564 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-02-19 05:37:44.042 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-02-19 05:37:44.519 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-02-19 05:37:44.997 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-02-19 05:37:45.475 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-02-19 05:37:45.952 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-02-19 05:37:46.430 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-02-19 05:37:46.908 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-02-19 05:37:47.386 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-02-19 05:37:47.863 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-02-19 05:37:48.341 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-02-19 05:37:48.819 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-02-19 05:37:49.296 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-02-19 05:37:49.774 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-02-19 05:37:50.251 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-02-19 05:37:50.729 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-02-19 05:37:51.207 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-02-19 05:37:51.684 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-02-19 05:37:52.162 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-02-19 05:37:52.640 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-02-19 05:37:53.118 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-02-19 05:37:53.594 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-02-19 05:37:54.073 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-02-19 05:37:54.550 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-02-19 05:37:55.028 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-02-19 05:37:55.505 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-02-19 05:37:55.983 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-02-19 05:37:56.461 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-02-19 05:37:56.938 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-02-19 05:37:57.416 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-02-19 05:37:57.893 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-02-19 05:37:58.371 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-02-19 05:37:58.848 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-02-19 05:37:59.326 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-02-19 05:37:59.803 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-02-19 05:38:00.281 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-02-19 05:38:00.759 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-02-19 05:38:01.237 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-02-19 05:38:01.715 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-02-19 05:38:02.193 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-02-19 05:38:02.671 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-02-19 05:38:03.149 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-02-19 05:38:03.627 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-02-19 05:38:04.105 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-02-19 05:38:04.582 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-02-19 05:38:05.060 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-02-19 05:38:05.537 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-02-19 05:38:06.015 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-02-19 05:38:06.493 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-02-19 05:38:06.970 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-02-19 05:38:07.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:07.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:07.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:07.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:07.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:07.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:07.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:07.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:07.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:07.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:07.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:07.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:07.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:07.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:07.400 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:38:07.400 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:38:07.440 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:38:07.441 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:38:07.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:07.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:07.448 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-02-19 05:38:07.926 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-02-19 05:38:08.404 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-02-19 05:38:08.881 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-02-19 05:38:09.359 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-02-19 05:38:09.837 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-02-19 05:38:10.315 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-02-19 05:38:10.793 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-02-19 05:38:11.272 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-02-19 05:38:11.750 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-02-19 05:38:11.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:11.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:11.767 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:38:11.771 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:11.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:11.771 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:11.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:11.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:11.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:38:11.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:38:11.772 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:38:11.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=22854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:11.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:11.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:11.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:11.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=22854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:11.772 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=22854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:11.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=22854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:11.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=22854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:11.773 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=22854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:16.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:38:16.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:38:16.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:16.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:16.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:16.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:16.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:16.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:38:16.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:16.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:38:16.787 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:38:16.789 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:38:16.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:38:16.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:38:16.789 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:16.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:16.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:38:16.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:38:16.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:38:16.792 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:38:16.792 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:38:16.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:38:16.793 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:16.793 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:16.793 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:38:16.793 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:38:16.793 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:38:16.795 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:38:16.795 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:38:16.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:38:16.795 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:16.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:16.795 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:38:16.795 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:38:16.795 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:38:16.798 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:38:16.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:38:16.798 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:38:16.798 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:38:16.798 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:38:16.798 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:38:16.799 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:38:16.799 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:38:16.799 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.799 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:16.800 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:16.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:16.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:16.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:16.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:16.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:38:16.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:38:16.801 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:38:21.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:38:21.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:38:21.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:21.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:21.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:21.809 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:21.816 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:21.816 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:38:21.816 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:21.817 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:38:21.817 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:38:21.819 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:38:21.819 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:38:21.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:38:21.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:21.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:21.820 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:38:21.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:38:21.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:38:21.822 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:38:21.822 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:38:21.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:38:21.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:21.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:21.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:38:21.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:38:21.823 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:38:21.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:38:21.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:38:21.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:38:21.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:21.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:21.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:38:21.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:38:21.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:38:21.828 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:38:21.828 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:38:21.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:21.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:21.833 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:38:22.317 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:38:22.364 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:38:22.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:22.368 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:38:22.370 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:38:22.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:22.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:22.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:22.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:22.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:22.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:22.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:22.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:22.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:22.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:22.415 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:38:22.415 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:38:22.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:22.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:22.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:22.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:22.794 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:38:22.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:22.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:22.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:22.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:23.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:38:23.749 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:38:23.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:23.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:23.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:23.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:23.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:23.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:23.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:23.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:23.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:23.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:23.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:23.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:23.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:23.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:23.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:23.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:23.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:23.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:23.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:38:23.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:38:23.985 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:38:23.985 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:38:23.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:23.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:24.227 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:38:24.706 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:38:24.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:24.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:24.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:24.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:25.184 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:38:25.664 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:38:25.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:25.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:25.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:25.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:26.143 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:38:26.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:26.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:26.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:26.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:26.337 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:38:26.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:26.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:26.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:26.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:26.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:26.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:26.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:26.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:26.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:26.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:26.359 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:38:26.359 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:38:26.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:26.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:26.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:26.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:26.620 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:38:26.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:26.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:26.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:26.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:27.098 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:38:27.576 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:38:28.054 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:38:28.532 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:38:29.010 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:38:29.488 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:38:29.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:29.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:29.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:29.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:29.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:29.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:29.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:29.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:29.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:29.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:29.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:29.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:29.912 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:29.912 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:29.912 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:38:29.912 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:38:29.959 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:38:29.959 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:38:29.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:29.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:29.965 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:38:30.444 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:38:30.922 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:38:31.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:31.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:31.006 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:38:31.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:31.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:31.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:31.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:31.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:31.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:31.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:31.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:31.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:38:31.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:38:31.010 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:38:31.010 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:31.010 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:31.010 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:31.010 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=1959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:38:36.012 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:38:36.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:38:36.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:36.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:36.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:36.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:36.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:38:36.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:38:36.025 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:36.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:38:36.025 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:38:36.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:38:36.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:38:36.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:38:36.028 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:36.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:38:36.029 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:38:36.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:38:36.029 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:38:36.030 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:38:36.031 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:38:36.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:38:36.031 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:36.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:38:36.031 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:38:36.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:38:36.031 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:38:36.033 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:38:36.033 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:38:36.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:38:36.033 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:38:36.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:38:36.033 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:38:36.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:38:36.033 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:38:36.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:38:36.036 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:38:36.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:38:36.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:38:36.525 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:38:36.570 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:38:36.572 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:38:36.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:36.574 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:38:36.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:36.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:36.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:36.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:36.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:36.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:36.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:36.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:36.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:36.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:36.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:38:36.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:38:36.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:36.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:36.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:36.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:37.003 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:38:37.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:37.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:37.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:37.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:37.481 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:38:37.959 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:38:38.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:38.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:38.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:38.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:38.437 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:38:38.914 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:38:39.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:39.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:39.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:39.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:39.392 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:38:39.870 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:38:40.043 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:40.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:40.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:40.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:40.347 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:38:40.824 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:38:41.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:38:41.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:38:41.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:38:41.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:38:41.302 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:38:41.804 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:38:42.282 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:38:42.760 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:38:43.238 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:38:43.716 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:38:44.194 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:38:44.671 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:38:45.150 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:38:45.627 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:38:46.106 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:38:46.584 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:38:47.062 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:38:47.540 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:38:48.017 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:38:48.495 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:38:48.973 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:38:49.451 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:38:49.929 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:38:50.407 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:38:50.885 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:38:51.363 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:38:51.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:51.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:51.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:51.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:51.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:51.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:51.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:51.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:38:51.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:38:51.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:38:51.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:38:51.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:51.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:38:51.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:38:51.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:38:51.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:38:51.687 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:38:51.687 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:38:51.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:51.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:38:51.838 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:38:52.317 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:38:52.795 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:38:53.273 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:38:53.751 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:38:54.230 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:38:54.708 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:38:55.187 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:38:55.665 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:38:56.143 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:38:56.622 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:38:57.100 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:38:57.578 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:38:58.056 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:38:58.535 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:38:59.013 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:38:59.491 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:38:59.970 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:39:00.448 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:39:00.926 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:39:01.404 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:39:01.882 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:39:02.360 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:39:02.839 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:39:03.317 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:39:03.796 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:39:04.274 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:39:04.752 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:39:05.231 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:39:05.708 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:39:06.186 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:39:06.665 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:39:07.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:07.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:07.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:07.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:07.013 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:39:07.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:07.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:07.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:07.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:07.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:07.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:07.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:07.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:07.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:07.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:07.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:39:07.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:39:07.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:07.085 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:07.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:07.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:07.142 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:39:07.619 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:39:08.097 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:39:08.575 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:39:09.052 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:39:09.530 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:39:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:39:10.485 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 05:39:10.963 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 05:39:11.440 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 05:39:11.918 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 05:39:12.396 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 05:39:12.873 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 05:39:13.350 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 05:39:13.828 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 05:39:14.306 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 05:39:14.784 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 05:39:15.261 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 05:39:15.738 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 05:39:16.216 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 05:39:16.694 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 05:39:17.171 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 05:39:17.649 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 05:39:18.127 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 05:39:18.605 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 05:39:19.083 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 05:39:19.560 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 05:39:20.038 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 05:39:20.516 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 05:39:20.993 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 05:39:21.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:21.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:21.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:21.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:21.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:21.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:21.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:21.461 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:21.461 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:21.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:21.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:21.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:21.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:21.463 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:21.463 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:39:21.463 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:39:21.470 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 05:39:21.516 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:39:21.516 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:39:21.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:21.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:21.948 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 05:39:22.426 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 05:39:22.904 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 05:39:23.382 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 05:39:23.860 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 05:39:24.338 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-02-19 05:39:24.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:24.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:24.730 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:39:24.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:39:24.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:39:24.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:39:24.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:39:24.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:39:24.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:39:24.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:39:24.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:39:24.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:39:24.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:39:24.734 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:39:29.737 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:39:29.737 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:39:29.739 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:39:29.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:39:29.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:39:29.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:39:29.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:39:29.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:39:29.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:39:29.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:39:29.755 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:39:29.759 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:39:29.760 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:39:29.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:39:29.760 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:39:29.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:39:29.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:39:29.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:39:29.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:39:29.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:39:29.764 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:39:29.764 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:39:29.764 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:39:29.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:39:29.765 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:39:29.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:39:29.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:39:29.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:39:29.768 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:39:29.768 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:39:29.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:39:29.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:39:29.769 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:39:29.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:39:29.769 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:39:29.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:39:29.774 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:39:29.775 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:39:29.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:39:29.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:39:30.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:39:30.316 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:39:30.317 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:39:30.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:30.319 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:39:30.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:30.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:30.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:30.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:30.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:30.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:30.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:30.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:30.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:30.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:30.349 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:39:30.349 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:39:30.351 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:30.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:30.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:30.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:30.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:39:30.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:39:30.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:39:30.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:39:30.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:39:31.216 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:39:31.694 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:39:31.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:39:31.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:39:31.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:39:31.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:39:32.171 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:39:32.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:39:32.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:39:32.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:39:32.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:39:32.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:39:33.128 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:39:33.606 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:39:33.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:39:33.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:39:33.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:39:33.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:39:34.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:39:34.561 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:39:34.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:39:34.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:39:34.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:39:34.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:39:35.039 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:39:35.517 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:39:35.995 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:39:36.473 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:39:36.951 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:39:37.429 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:39:37.907 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:39:38.384 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:39:38.861 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:39:39.339 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:39:39.817 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:39:40.295 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:39:40.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:40.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:40.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:40.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:40.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:40.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:40.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:40.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:40.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:40.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:40.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:40.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:40.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:40.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:39:40.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:39:40.527 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:39:40.527 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:39:40.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:40.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:40.772 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:39:41.248 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:39:41.727 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:39:42.205 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:39:42.684 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:39:43.162 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:39:43.640 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:39:44.118 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:39:44.597 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:39:45.075 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:39:45.553 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:39:46.032 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:39:46.510 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:39:46.989 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:39:47.467 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:39:47.946 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:39:48.424 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:39:48.899 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:39:49.377 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:39:49.856 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:39:50.334 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:39:50.812 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:39:50.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:50.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:50.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:50.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:50.977 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:39:50.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:50.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:50.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:51.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:51.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:51.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:51.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:51.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:51.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:51.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:51.002 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:39:51.002 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:39:51.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:51.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:51.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:51.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:51.287 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:39:51.765 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:39:52.242 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:39:52.720 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:39:53.197 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:39:53.674 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:39:54.152 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:39:54.630 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:39:55.108 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:39:55.586 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:39:56.064 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:39:56.541 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:39:57.018 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:39:57.497 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:39:57.974 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:39:58.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:58.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:58.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:58.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:58.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:58.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:58.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:58.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:39:58.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:39:58.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:39:58.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:39:58.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:58.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:39:58.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:39:58.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:39:58.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:39:58.065 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:39:58.065 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:39:58.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:58.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:39:58.451 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:39:58.929 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:39:59.406 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-02-19 05:39:59.884 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-02-19 05:40:00.362 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-02-19 05:40:00.841 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-02-19 05:40:01.319 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-02-19 05:40:01.797 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-02-19 05:40:02.275 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-02-19 05:40:02.753 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-02-19 05:40:03.231 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-02-19 05:40:03.709 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-02-19 05:40:04.187 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-02-19 05:40:04.666 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-02-19 05:40:05.144 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-02-19 05:40:05.622 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-02-19 05:40:06.101 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-02-19 05:40:06.579 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-02-19 05:40:07.057 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-02-19 05:40:07.535 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-02-19 05:40:08.012 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-02-19 05:40:08.489 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-02-19 05:40:08.967 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-02-19 05:40:09.445 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-02-19 05:40:09.923 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-02-19 05:40:10.402 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-02-19 05:40:10.880 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-02-19 05:40:11.358 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-02-19 05:40:11.836 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-02-19 05:40:12.314 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-02-19 05:40:12.792 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-02-19 05:40:13.270 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-02-19 05:40:13.748 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-02-19 05:40:14.226 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-02-19 05:40:14.704 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-02-19 05:40:15.182 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-02-19 05:40:15.660 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-02-19 05:40:16.138 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-02-19 05:40:16.616 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-02-19 05:40:17.095 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-02-19 05:40:17.573 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-02-19 05:40:18.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:18.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:18.040 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:40:18.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:18.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:18.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:18.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:18.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:18.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:40:18.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:40:18.045 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:40:18.045 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:40:18.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:18.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:18.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:18.045 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:40:18.045 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:40:18.045 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=10304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:40:23.048 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:40:23.048 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:40:23.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:23.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:23.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:23.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:23.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:23.069 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:40:23.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:23.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:40:23.070 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:40:23.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:40:23.074 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:40:23.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:40:23.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:23.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:23.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:40:23.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:40:23.074 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:40:23.078 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:40:23.078 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:40:23.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:40:23.079 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:23.079 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:23.079 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:40:23.079 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:40:23.079 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:40:23.083 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:40:23.083 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:40:23.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:40:23.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:23.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:23.084 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:40:23.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:40:23.084 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:40:23.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:40:23.095 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:40:23.095 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:40:23.095 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:23.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:23.100 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:40:23.579 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:40:23.634 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:40:23.637 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:40:23.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:23.639 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:40:23.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:23.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:23.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:23.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:23.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:23.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:23.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:23.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:23.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:23.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:23.690 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:23.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:23.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:23.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:23.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:23.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:24.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:24.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:24.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:24.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:24.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:24.055 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:40:24.055 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:24.055 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:24.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:24.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:24.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.058 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:24.058 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:24.058 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:24.058 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:24.100 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:40:24.100 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:40:24.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.101 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:24.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:24.103 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:24.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:24.530 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:40:24.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:24.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:24.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:24.585 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:40:24.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:24.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:24.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:24.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:24.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:24.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:24.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:24.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:24.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:24.612 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:24.612 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:24.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:24.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:24.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:24.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:25.007 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:40:25.102 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:25.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:25.104 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:25.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:25.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:25.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:25.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:25.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:25.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:25.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:25.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:25.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:25.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:25.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:25.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:25.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:25.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:25.422 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:25.422 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:25.423 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:40:25.423 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:40:25.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:25.423 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:25.484 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:40:25.963 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:40:26.103 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:26.103 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:26.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:26.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:26.441 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:40:26.919 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:40:27.104 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:27.104 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:27.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:27.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:27.398 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:40:27.876 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:40:28.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:28.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:28.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:28.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:28.354 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:40:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:40:29.311 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:40:29.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:29.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:29.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:29.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:29.530 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:40:29.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:29.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:29.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:29.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:29.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:29.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:29.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:29.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:40:29.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:40:29.539 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:40:29.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:34.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:40:34.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:40:34.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:34.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:34.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:34.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:34.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:34.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:40:34.562 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:34.562 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:40:34.563 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:40:34.567 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:40:34.568 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:40:34.568 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:40:34.568 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:34.569 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:34.569 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:40:34.569 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:40:34.569 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:40:34.571 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:40:34.571 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:40:34.571 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:40:34.571 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:34.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:34.571 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:40:34.572 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:40:34.572 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:40:34.573 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:40:34.573 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:40:34.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:40:34.573 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:34.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:34.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:40:34.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:40:34.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:40:34.576 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:40:34.576 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:40:34.576 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.577 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:34.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.577 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:34.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:34.581 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:40:35.064 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:40:35.098 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:40:35.099 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:40:35.099 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:40:35.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:35.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:35.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:35.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:35.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:35.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:35.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:35.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:35.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:35.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:35.149 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:35.149 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:35.149 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:35.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:35.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:35.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:35.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:35.541 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:40:35.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:35.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:35.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:35.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:36.018 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:40:36.496 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:40:36.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:36.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:36.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:36.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:36.974 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:40:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:40:37.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:37.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:37.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:37.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:37.930 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:40:38.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:38.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:38.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:38.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:38.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:38.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:38.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:38.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:38.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:38.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:38.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:38.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:38.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:38.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:38.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:38.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:38.397 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:40:38.397 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:40:38.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:38.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:38.407 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:40:38.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:38.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:38.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:38.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:38.884 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:40:39.363 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:40:39.581 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:39.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:39.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:39.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:39.841 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:40:40.319 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:40:40.798 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:40:41.276 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:40:41.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:41.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:41.755 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:40:41.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:41.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:41.755 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:40:41.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:41.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:41.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:41.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:41.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:41.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:41.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:41.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:41.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:41.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:41.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:41.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:41.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:41.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:41.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:41.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:42.232 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:40:42.710 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:40:43.187 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:40:43.665 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:40:44.143 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:40:44.621 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:40:45.098 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:40:45.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:45.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:45.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:45.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:45.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:45.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:45.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:45.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:45.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:45.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:45.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:45.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:45.522 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:45.522 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:45.522 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:45.522 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:45.570 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:40:45.570 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:40:45.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:45.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:45.575 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:40:46.052 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:40:46.527 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:40:47.005 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:40:47.483 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:40:47.961 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:40:48.439 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:40:48.918 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:40:49.396 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:40:49.874 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:40:49.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:49.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:49.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:49.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:49.962 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:49.967 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:40:49.967 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:40:49.968 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:40:49.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:54.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:40:54.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:54.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:54.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:40:54.990 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:40:54.990 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:54.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:40:54.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:40:54.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:40:54.998 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:40:54.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:40:54.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:54.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:40:55.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:40:55.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:40:55.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:40:55.003 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:40:55.003 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:40:55.003 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:40:55.003 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:55.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:40:55.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:40:55.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:40:55.004 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:40:55.006 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:40:55.006 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:40:55.006 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:40:55.006 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:40:55.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:40:55.007 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:40:55.007 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:40:55.007 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:40:55.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:40:55.011 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:40:55.011 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:40:55.011 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.011 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:40:55.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:40:55.016 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:40:55.500 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:40:55.544 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:40:55.547 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:40:55.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:55.550 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:40:55.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:55.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:55.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:55.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:55.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:55.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:55.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:55.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:55.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:55.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:55.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:55.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:55.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:55.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:55.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:55.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:55.977 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:40:56.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:56.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:56.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:56.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:56.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:56.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:56.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:56.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:56.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:56.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:56.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:56.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:56.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:56.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:56.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.050 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:56.050 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:56.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:56.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:56.069 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:40:56.069 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:40:56.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.477 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:40:56.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:56.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:56.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:56.700 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:40:56.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:56.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:56.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:56.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:56.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:56.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:56.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:56.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:56.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:56.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:56.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:56.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:56.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:56.955 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:40:57.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:57.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:57.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:57.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:57.432 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:40:57.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:57.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:57.829 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:57.829 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:57.840 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:57.840 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:57.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:57.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:40:57.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:40:57.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:40:57.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:40:57.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:57.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:40:57.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:40:57.848 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:40:57.848 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:40:57.849 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:40:57.849 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:40:57.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:57.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:40:57.909 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:40:58.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:58.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:58.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:58.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:58.388 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:40:58.866 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:40:59.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:40:59.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:40:59.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:40:59.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:40:59.345 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:40:59.823 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:41:00.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:00.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:00.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:00.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:00.302 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:41:00.781 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:41:01.259 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:41:01.738 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:41:02.217 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:41:02.695 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:41:03.173 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:41:03.652 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:41:04.130 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:41:04.609 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:41:05.088 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:41:05.566 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:41:06.045 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:41:06.523 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:41:07.002 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:41:07.481 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:41:07.959 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:41:08.437 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:41:08.915 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:41:09.394 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:41:09.872 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:41:10.350 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:41:10.828 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:41:11.307 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:41:11.785 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:41:12.263 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:41:12.742 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:41:13.220 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:41:13.699 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:41:14.177 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:41:14.656 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:41:15.134 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:41:15.612 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:41:16.091 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:41:16.569 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:41:17.048 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:41:17.526 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:41:17.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:17.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:17.843 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:41:17.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:17.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:17.848 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:41:17.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:41:17.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:41:17.848 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:41:17.848 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:41:17.848 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:41:17.848 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:41:17.848 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:17.848 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:17.848 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:17.848 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=4865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:22.850 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:41:22.850 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:41:22.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:41:22.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:41:22.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:41:22.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:41:22.863 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:41:22.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:41:22.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:22.864 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:41:22.864 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:41:22.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:41:22.867 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:41:22.867 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:41:22.867 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:22.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:41:22.868 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:41:22.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:41:22.868 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:41:22.870 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:41:22.870 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:41:22.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:41:22.871 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:22.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:41:22.871 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:41:22.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:41:22.871 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:41:22.873 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:41:22.873 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:41:22.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:41:22.873 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:22.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:41:22.873 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:41:22.873 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:41:22.873 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:41:22.876 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:41:22.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:41:22.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:41:22.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:41:22.876 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:41:22.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:41:22.877 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:41:22.877 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:41:22.877 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:22.882 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:41:23.364 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:41:23.393 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:41:23.393 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:41:23.394 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:41:23.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:23.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:23.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:23.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:23.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:23.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:23.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:23.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:23.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:23.442 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:23.442 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:23.442 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:23.442 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:23.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:23.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:23.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:23.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:23.841 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:41:23.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:23.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:23.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:23.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:24.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:41:24.797 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:41:24.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:24.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:24.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:25.275 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:41:25.754 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:41:25.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:25.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:25.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:25.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:26.232 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:41:26.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:26.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:26.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:26.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:26.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:26.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:26.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:26.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:26.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:26.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:26.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:26.356 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:26.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:26.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:26.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:26.367 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:41:26.367 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:41:26.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:26.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:26.708 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:41:26.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:26.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:26.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:26.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:27.187 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:41:27.665 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:41:27.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:27.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:27.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:27.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:28.143 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:41:28.622 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:41:29.101 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:41:29.579 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:41:30.058 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:41:30.537 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:41:30.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:30.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:30.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:30.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:30.958 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:41:30.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:30.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:30.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:30.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:30.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:30.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:30.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:30.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:30.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:30.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:30.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:30.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:31.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:31.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:31.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:31.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:31.014 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:41:31.491 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:41:31.969 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:41:32.447 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:41:32.924 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:41:33.402 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:41:33.879 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:41:34.356 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:41:34.834 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:41:35.312 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:41:35.789 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:41:36.267 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:41:36.745 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:41:37.222 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:41:37.700 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:41:37.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:37.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:37.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:37.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:37.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:37.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:37.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:37.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:37.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:37.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:37.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:37.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:37.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:37.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:37.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:37.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:37.935 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:41:37.935 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:41:37.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:37.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:38.177 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:41:38.654 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:41:38.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:38.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:38.738 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:41:38.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:38.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:38.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:38.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:38.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:41:38.743 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:41:38.743 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:41:38.743 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:41:38.743 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:38.743 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:41:38.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:38.743 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:41:43.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:41:43.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:41:43.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:41:43.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:41:43.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:41:43.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:41:43.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:41:43.758 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:41:43.759 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:43.759 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:41:43.759 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:41:43.765 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:41:43.766 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:41:43.766 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:41:43.766 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:43.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:41:43.767 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:41:43.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:41:43.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:41:43.772 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:41:43.772 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:41:43.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:41:43.772 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:43.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:41:43.773 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:41:43.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:41:43.773 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:41:43.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:41:43.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:41:43.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:41:43.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:41:43.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:41:43.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:41:43.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:41:43.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:41:43.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:41:43.782 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:41:43.782 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:41:43.782 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:41:43.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:41:43.787 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:41:44.271 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:41:44.310 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:41:44.310 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:41:44.311 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:41:44.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:44.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:44.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:44.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:44.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:44.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:44.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:44.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:44.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:44.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:44.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:44.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:44.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:44.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:44.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:44.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:44.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:44.748 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:41:44.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:44.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:44.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:44.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:45.226 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:41:45.704 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:41:45.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:45.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:45.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:45.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:46.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:46.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:46.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:46.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:46.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:46.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:46.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:46.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:46.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:46.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:46.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:46.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:46.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:46.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:46.132 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:46.132 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:46.174 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:41:46.174 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-02-19 05:41:46.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:46.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:46.180 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:41:46.659 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:41:46.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:46.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:46.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:46.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:47.138 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:41:47.615 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:41:47.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:47.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:47.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:47.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:48.094 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:41:48.572 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:41:48.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:41:48.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:41:48.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:41:48.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:41:48.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:48.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:48.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:48.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:48.937 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:41:48.951 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:48.951 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:48.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:48.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:48.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:48.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:48.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:48.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:48.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:48.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:48.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:48.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:48.991 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:48.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:48.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:48.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:49.049 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:41:49.527 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:41:50.005 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:41:50.482 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:41:50.960 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:41:51.438 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:41:51.922 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:41:52.400 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:41:52.878 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:41:53.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:53.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:53.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:53.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:53.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:53.294 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:53.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:53.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:41:53.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:41:53.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:41:53.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:41:53.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:53.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:41:53.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:41:53.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:41:53.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:41:53.345 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.36.22:6700) Recv SETFH cmd
2026-02-19 05:41:53.345 [INFO] transceiver.py:201 (MS@172.18.36.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-02-19 05:41:53.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:53.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:41:53.355 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:41:53.832 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:41:54.311 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:41:54.789 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:41:55.268 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:41:55.746 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:41:56.224 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:41:56.702 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:41:57.181 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:41:57.659 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:41:58.137 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:41:58.615 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:41:59.094 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:41:59.572 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:42:00.051 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-02-19 05:42:00.529 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-02-19 05:42:01.008 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-02-19 05:42:01.486 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-02-19 05:42:01.970 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-02-19 05:42:02.449 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-02-19 05:42:02.927 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-02-19 05:42:03.406 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-02-19 05:42:03.884 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-02-19 05:42:04.362 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-02-19 05:42:04.841 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-02-19 05:42:05.319 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-02-19 05:42:05.798 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-02-19 05:42:06.276 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-02-19 05:42:06.755 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-02-19 05:42:07.233 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-02-19 05:42:07.712 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-02-19 05:42:08.190 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-02-19 05:42:08.668 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-02-19 05:42:09.146 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-02-19 05:42:09.624 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-02-19 05:42:10.102 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-02-19 05:42:10.580 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-02-19 05:42:11.058 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-02-19 05:42:11.537 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-02-19 05:42:12.015 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-02-19 05:42:12.494 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-02-19 05:42:12.972 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-02-19 05:42:13.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:42:13.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:42:13.299 [INFO] transceiver.py:205 (MS@172.18.36.22:6700) Frequency hopping disabled
2026-02-19 05:42:13.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:13.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:13.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:13.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:13.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:13.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:13.306 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:42:13.306 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:13.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:13.306 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.306 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.306 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:13.307 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=6296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:18.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:18.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:18.306 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:18.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:18.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:18.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:18.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:18.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:18.316 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:18.316 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:18.316 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:42:18.320 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:42:18.320 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:42:18.321 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:18.321 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:18.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:18.322 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:42:18.322 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:18.322 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:42:18.325 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:42:18.325 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:42:18.325 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:18.326 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:18.326 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:18.326 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:42:18.326 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:18.326 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:42:18.329 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:42:18.329 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:42:18.329 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:18.329 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:18.329 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:18.329 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:42:18.330 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:18.330 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:42:18.335 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:42:18.336 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:42:18.336 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:42:18.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:42:18.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:18.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:18.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:18.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:18.341 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:42:18.823 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:42:18.874 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:42:18.876 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:42:18.877 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:42:18.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:18.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:18.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.300 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:42:19.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:19.341 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:19.341 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:19.341 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:19.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.778 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:42:19.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:19.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:20.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:20.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:20.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:20.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:20.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:20.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:20.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:20.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:20.197 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:42:20.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:20.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:20.197 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:20.197 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:20.197 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:20.197 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:20.197 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:25.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:25.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:25.199 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:25.201 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:25.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:25.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:25.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:25.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:25.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:25.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:25.209 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:42:25.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:42:25.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:42:25.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:25.212 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:25.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:25.213 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:42:25.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:25.213 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:42:25.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:42:25.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:42:25.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:25.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:25.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:25.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:42:25.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:25.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:42:25.217 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:42:25.217 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:42:25.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:25.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:25.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:25.218 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:42:25.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:25.218 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:42:25.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:42:25.221 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:42:25.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:25.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:25.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:42:25.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:42:25.747 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:42:25.749 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:42:25.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:25.751 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:42:25.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:25.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:25.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:25.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.184 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:42:26.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:26.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:26.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:26.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:26.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.660 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:42:26.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:26.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:27.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:27.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:27.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:27.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:27.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:27.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:27.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:27.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:27.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:27.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:27.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:27.100 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:27.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:27.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=402 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:27.100 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=403 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:32.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:32.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:32.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:32.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:32.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:32.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:32.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:32.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:32.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:32.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:32.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:42:32.118 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:42:32.119 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:42:32.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:32.119 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:32.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:32.120 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:42:32.120 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:32.120 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:42:32.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:42:32.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:42:32.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:32.123 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:32.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:32.123 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:42:32.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:32.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:32.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:42:32.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:32.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.128 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:42:32.128 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:42:32.128 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:42:32.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:32.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:32.133 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:42:32.615 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:42:32.658 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:42:32.660 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:42:32.662 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:42:32.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:32.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:32.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:32.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:32.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:42:33.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:33.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:33.133 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:33.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:33.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:42:33.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:33.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:34.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:34.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:34.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:34.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:34.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:34.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:34.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:34.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:34.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:34.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:34.014 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:42:34.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:34.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:34.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:34.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:34.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:34.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:34.014 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:39.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:39.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:39.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:39.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:39.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:39.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:39.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:39.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:39.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:39.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:39.022 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:42:39.027 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:42:39.027 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:42:39.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:39.027 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:39.028 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:39.028 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:42:39.028 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:39.028 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:42:39.031 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:42:39.031 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:42:39.031 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:39.031 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:39.031 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:39.031 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:42:39.032 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:39.032 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:42:39.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:42:39.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:42:39.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:39.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:39.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:39.035 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:42:39.035 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:39.035 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:42:39.039 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.040 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:42:39.040 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:42:39.040 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:42:39.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:39.045 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:42:39.528 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:42:39.569 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:42:39.573 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:42:39.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:39.576 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:42:39.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:39.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:39.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:39.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:39.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:39.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.000 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:42:40.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:40.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:40.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:40.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:40.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.476 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:42:40.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:40.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:40.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:40.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:40.891 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:40.892 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:40.892 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:40.892 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:40.892 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:40.892 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:40.892 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:40.892 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:42:40.892 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:40.892 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:40.893 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:40.893 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:40.893 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:40.893 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:45.895 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:45.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:45.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:45.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:45.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:45.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:45.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:45.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:45.912 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:45.912 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:45.912 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:42:45.914 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:42:45.914 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:42:45.914 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:45.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:45.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:45.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:42:45.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:45.915 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:42:45.917 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:42:45.917 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:42:45.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:45.917 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:45.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:45.917 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:42:45.917 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:45.917 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:42:45.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:42:45.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:42:45.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:45.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:45.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:45.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:42:45.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:45.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:42:45.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:42:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:42:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:42:45.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:42:45.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:42:45.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:42:45.922 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:42:45.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:45.927 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:42:46.410 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:42:46.454 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:42:46.456 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:42:46.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:46.459 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:42:46.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:46.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:46.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:46.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:46.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:46.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:46.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:46.887 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:42:46.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:46.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:46.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:46.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:47.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.365 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:42:47.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:47.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:47.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:47.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:47.772 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:47.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:47.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:47.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:47.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:47.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:47.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:47.773 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:42:52.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:52.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:52.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:52.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:52.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:52.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:52.790 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:52.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:52.791 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:52.791 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:52.791 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:42:52.794 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:42:52.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:42:52.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:52.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:52.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:52.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:42:52.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:52.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:42:52.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:42:52.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:42:52.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:52.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:52.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:52.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:42:52.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:52.799 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:42:52.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:42:52.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:42:52.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:52.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:52.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:52.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:42:52.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:52.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:42:52.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:42:52.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:42:52.806 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:42:52.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:52.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:52.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:42:53.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:42:53.336 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:42:53.337 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:42:53.339 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:42:53.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:53.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.766 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:42:53.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:53.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:53.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:53.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:53.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.243 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:42:54.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:42:54.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:42:54.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:42:54.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:42:54.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:42:54.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:54.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:54.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:54.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:54.673 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.674 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:54.675 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:42:59.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:42:59.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:42:59.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:59.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:59.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:59.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:59.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:42:59.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:59.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:59.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:42:59.686 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:42:59.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:42:59.689 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:42:59.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:59.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:59.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:42:59.690 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:42:59.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:42:59.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:42:59.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:42:59.692 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:42:59.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:59.693 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:59.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:42:59.693 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:42:59.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:42:59.693 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:42:59.695 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:42:59.695 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:42:59.695 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:59.695 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:42:59.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:42:59.695 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:42:59.695 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:42:59.696 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:42:59.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:42:59.699 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:42:59.699 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:42:59.699 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:42:59.704 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:00.187 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:00.226 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:00.228 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:00.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.230 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:00.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:00.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.663 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:43:00.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:00.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:00.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:00.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:00.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:00.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.141 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:43:01.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:01.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:01.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:01.568 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:06.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:06.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:06.573 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:06.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:06.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:06.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:06.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:06.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:06.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:06.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:06.584 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:06.587 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:06.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:06.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:06.588 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:06.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:06.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:06.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:06.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:06.592 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:06.592 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:06.592 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:06.592 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:06.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:06.593 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:06.593 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:06.593 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:06.596 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:06.596 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:06.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:06.597 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:06.597 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:06.597 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:06.597 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:06.597 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:06.602 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:06.602 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:06.602 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:06.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:06.603 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:06.603 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:06.603 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.603 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:06.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:06.608 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:07.091 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:07.136 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:07.138 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:07.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.140 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:07.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:07.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:07.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:07.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:07.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:07.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:07.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:07.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:07.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:07.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:07.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:07.212 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:07.212 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:07.212 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:07.212 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:07.212 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:07.212 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:07.212 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:07.212 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:12.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:12.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:12.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:12.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:12.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:12.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:12.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:12.227 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:12.228 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:12.228 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:12.228 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:12.233 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:12.233 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:12.234 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:12.234 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:12.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:12.235 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:12.235 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:12.235 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:12.238 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:12.238 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:12.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:12.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:12.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:12.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:12.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:12.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:12.242 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:12.242 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:12.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:12.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:12.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:12.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:12.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:12.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:12.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:12.248 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:12.248 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:12.248 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:12.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:12.253 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:12.736 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:12.780 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:12.783 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:12.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.785 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:12.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:12.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:12.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:12.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:12.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:12.920 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:17.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:17.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:17.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:17.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:17.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:17.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:17.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:17.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:17.945 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:17.945 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:17.945 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:17.949 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:17.950 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:17.950 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:17.950 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:17.951 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:17.951 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:17.951 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:17.951 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:17.953 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:17.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:17.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:17.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:17.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:17.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:17.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:17.955 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:17.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:17.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:17.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:17.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:17.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:17.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:17.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:17.957 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:17.961 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:17.961 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:17.961 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:17.966 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:18.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:18.488 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:18.490 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:18.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.492 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:18.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:18.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:18.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:18.600 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:23.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:23.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:23.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:23.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:23.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:23.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:23.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:23.616 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:23.616 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:23.616 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:23.619 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:23.619 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:23.620 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:23.620 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:23.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:23.620 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:23.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:23.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:23.623 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:23.623 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:23.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:23.623 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:23.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:23.623 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:23.623 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:23.623 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:23.625 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:23.626 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:23.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:23.626 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:23.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:23.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:23.626 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:23.626 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.629 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:23.629 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:23.629 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:23.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:23.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:23.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:23.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:23.634 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:24.117 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:24.166 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:24.168 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:24.169 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:24.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.203 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:24.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:24.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:24.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:24.247 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:24.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:24.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:24.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:24.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:24.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:24.248 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:24.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:29.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:29.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:29.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:29.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:29.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:29.256 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:29.265 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:29.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:29.267 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:29.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:29.267 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:29.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:29.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:29.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:29.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:29.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:29.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:29.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:29.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:29.276 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:29.276 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:29.276 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:29.276 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:29.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:29.276 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:29.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:29.277 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:29.280 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:29.280 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:29.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:29.280 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:29.280 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:29.280 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:29.280 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:29.280 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:29.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:29.285 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:29.285 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:29.285 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:29.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:29.772 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:29.820 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:29.822 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:29.824 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:29.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:29.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:29.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:29.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:29.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:29.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:29.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:29.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:29.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:29.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:29.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:29.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:29.914 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:34.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:34.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:34.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:34.919 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:34.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:34.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:34.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:34.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:34.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:34.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:34.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:34.931 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:34.931 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:34.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:34.931 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:34.931 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:34.932 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:34.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:34.932 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:34.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:34.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:34.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:34.934 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:34.934 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:34.934 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:34.934 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:34.934 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:34.936 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:34.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:34.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:34.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:34.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:34.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:34.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:34.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.939 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:34.939 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:34.939 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:34.939 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:34.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:34.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:35.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:35.474 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:35.477 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:35.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.479 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:35.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:35.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:35.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:35.602 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:35.602 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:35.602 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:35.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:35.602 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:35.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:35.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:35.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:35.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:35.603 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:40.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:40.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:40.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:40.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:40.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:40.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:40.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:40.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:40.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:40.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:40.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:40.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:40.622 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:40.622 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:40.622 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:40.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:40.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:40.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:40.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:40.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:40.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:40.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:40.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:40.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:40.625 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:40.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:40.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:40.628 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:40.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:40.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:40.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:40.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:40.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:40.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:40.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.631 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:40.631 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:40.631 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:40.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:40.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:41.119 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:41.160 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:41.162 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:41.163 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:41.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:41.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:41.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:41.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:41.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:41.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:41.255 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:41.255 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:41.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:41.255 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:41.255 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:41.255 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:41.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:46.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:46.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:46.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:46.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:46.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:46.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:46.277 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:46.277 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:46.277 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:46.278 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:46.278 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:46.280 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:46.280 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:46.280 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:46.280 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:46.280 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:46.280 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:46.281 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:46.281 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:46.282 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:46.282 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:46.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:46.282 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:46.282 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:46.282 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:46.282 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:46.282 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:46.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:46.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:46.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:46.284 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:46.284 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:46.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:46.284 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:46.284 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:46.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:46.286 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:46.286 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:46.286 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:46.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:46.290 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:46.773 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:46.810 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:46.832 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:46.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:46.835 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:46.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:43:46.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:43:46.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:43:46.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:43:46.840 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:43:46.840 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:43:46.840 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:43:46.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:43:47.250 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:43:47.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:47.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:47.289 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:47.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:47.727 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:43:48.204 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:43:48.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:48.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:48.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:48.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:48.682 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:43:49.159 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:43:49.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:49.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:49.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:49.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:49.637 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:43:50.115 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:43:50.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:43:50.289 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:50.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:50.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:50.292 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:50.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:55.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:55.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:55.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:55.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:55.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:55.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:55.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:55.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:55.310 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:55.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:43:55.310 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:43:55.314 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:43:55.314 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:43:55.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:55.315 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:55.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:55.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:43:55.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:43:55.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:43:55.319 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:43:55.319 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:43:55.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:55.319 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:55.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:55.319 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:43:55.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:43:55.319 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:43:55.323 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:43:55.323 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:43:55.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:55.323 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:43:55.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:55.323 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:43:55.323 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:43:55.323 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:43:55.328 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:43:55.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:43:55.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.329 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:43:55.329 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:43:55.329 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:43:55.329 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:43:55.334 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:43:55.813 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:43:55.868 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:43:55.869 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:43:55.871 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:43:55.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:55.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:43:55.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:43:55.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:43:55.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:43:55.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:43:55.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:43:55.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:43:55.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:43:55.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 05:43:55.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:43:55.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:43:55.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:43:55.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:43:56.290 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:43:56.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:56.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:56.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:56.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:56.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:43:56.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:43:56.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:43:56.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:43:56.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:43:56.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:43:56.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:43:56.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:43:56.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:43:56.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:43:56.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:43:56.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:43:56.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:43:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:43:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:43:56.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:43:56.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:43:56.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:43:56.443 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:43:56.443 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:43:56.443 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:43:56.443 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:43:56.444 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:43:56.444 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:56.444 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:56.444 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:56.444 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:56.444 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:43:56.445 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:01.442 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:01.442 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:01.443 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:01.445 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:01.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:01.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:01.451 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:01.452 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:01.452 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:01.453 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:01.453 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:44:01.456 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:44:01.456 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:44:01.457 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:01.457 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:01.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:01.457 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:44:01.458 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:01.458 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:44:01.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:44:01.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:44:01.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:01.461 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:01.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:01.461 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:44:01.461 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:01.461 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:44:01.467 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:44:01.467 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:44:01.467 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:01.467 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:01.468 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:01.468 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:44:01.468 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:01.468 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:44:01.472 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:44:01.473 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:44:01.473 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:44:01.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:01.478 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:44:01.960 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:44:02.000 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:44:02.004 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:44:02.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:02.006 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:44:02.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:02.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:02.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:44:02.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:02.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:02.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:02.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:44:02.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:44:02.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 05:44:02.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:02.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:02.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:02.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:02.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:02.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:02.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:02.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:02.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:44:02.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:02.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:02.178 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:02.178 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:44:02.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:44:02.438 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:44:02.476 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:02.476 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:02.476 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:02.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:02.915 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:44:03.393 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:44:03.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:03.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:03.871 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:44:04.349 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-02-19 05:44:04.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:04.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:04.827 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-02-19 05:44:05.305 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-02-19 05:44:05.478 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:05.479 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:05.479 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:05.479 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:05.782 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-02-19 05:44:06.260 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-02-19 05:44:06.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:06.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:06.480 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:06.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:06.738 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-02-19 05:44:07.216 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-02-19 05:44:07.694 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-02-19 05:44:08.172 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-02-19 05:44:08.649 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-02-19 05:44:09.126 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-02-19 05:44:09.604 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-02-19 05:44:10.083 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-02-19 05:44:10.561 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-02-19 05:44:11.038 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-02-19 05:44:11.516 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-02-19 05:44:11.993 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-02-19 05:44:12.472 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-02-19 05:44:12.949 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-02-19 05:44:13.427 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-02-19 05:44:13.905 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-02-19 05:44:14.383 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-02-19 05:44:14.860 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-02-19 05:44:15.338 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-02-19 05:44:15.816 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-02-19 05:44:16.293 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-02-19 05:44:16.771 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-02-19 05:44:17.248 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-02-19 05:44:17.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:17.545 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:17.545 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:17.546 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.546 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:44:17.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:17.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:17.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:17.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:44:17.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:44:17.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:17.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:17.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:17.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:17.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:17.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:17.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:17.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:17.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:17.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:17.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:17.590 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:44:17.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:17.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:17.591 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.591 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.591 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.591 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:17.592 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=3442 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:22.590 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:22.590 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:22.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:22.593 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:22.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:22.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:22.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:22.609 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:22.610 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:22.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:22.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:44:22.612 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:44:22.612 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:44:22.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:22.612 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:22.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:22.612 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:44:22.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:22.613 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:44:22.614 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:44:22.614 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:44:22.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:22.614 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:22.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:22.614 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:44:22.614 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:22.614 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:44:22.615 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:44:22.615 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:44:22.615 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:22.615 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:22.616 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:44:22.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:22.616 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:22.616 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:44:22.617 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:44:22.618 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:44:22.618 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:44:22.618 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:22.618 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:22.622 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:44:23.105 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:44:23.149 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:44:23.151 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:44:23.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:23.153 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:44:23.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:23.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:23.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:44:23.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:23.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:23.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:23.184 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:44:23.185 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:44:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 05:44:23.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:23.206 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:23.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:23.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:23.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:23.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 05:44:23.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:23.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:23.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:23.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:44:23.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:23.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:23.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:23.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:44:23.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:44:23.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:23.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:23.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:23.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:23.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:23.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:23.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:23.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:23.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:23.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:23.539 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:44:23.539 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:23.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:23.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:23.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:23.539 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:23.539 [WARNING] transceiver.py:257 (BTS@172.18.36.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:28.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:28.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:28.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:28.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:28.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:28.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:28.550 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:28.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:28.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:28.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:28.551 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:44:28.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:44:28.554 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:44:28.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:28.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:28.554 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:44:28.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:28.554 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:44:28.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:28.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:44:28.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:44:28.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:28.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:28.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:28.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:44:28.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:28.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:44:28.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:44:28.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:44:28.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:28.560 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:28.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:28.560 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:44:28.560 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:28.560 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:44:28.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:44:28.564 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:44:28.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:28.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:28.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-02-19 05:44:29.052 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-02-19 05:44:29.102 [DEBUG] fake_trx.py:278 (BTS@172.18.36.20:5700) Recv FAKE_TOA cmd
2026-02-19 05:44:29.104 [DEBUG] fake_trx.py:297 (BTS@172.18.36.20:5700) Recv FAKE_RSSI cmd
2026-02-19 05:44:29.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:29.106 [DEBUG] fake_trx.py:322 (BTS@172.18.36.20:5700) Recv FAKE_CI cmd
2026-02-19 05:44:29.125 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:29.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:29.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:44:29.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:29.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:29.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:29.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:44:29.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:44:29.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD HANDOVER
2026-02-19 05:44:29.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:29.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:29.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:29.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:29.529 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-02-19 05:44:29.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:29.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:29.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:29.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:30.006 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-02-19 05:44:30.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-02-19 05:44:30.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:30.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:30.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:30.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:30.962 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-02-19 05:44:31.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:31.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:31.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:31.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD ECHO
2026-02-19 05:44:31.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.36.22:6700) Ignore CMD SETSLOT
2026-02-19 05:44:31.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.36.22:6700) Recv RXTUNE cmd
2026-02-19 05:44:31.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.36.22:6700) Recv TXTUNE cmd
2026-02-19 05:44:31.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.36.22:6700) Recv POWERON CMD
2026-02-19 05:44:31.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.36.22:6700) Starting transceiver...
2026-02-19 05:44:31.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD NOHANDOVER
2026-02-19 05:44:31.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.36.22:6700) Recv POWEROFF cmd
2026-02-19 05:44:31.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.36.22:6700) Stopping transceiver...
2026-02-19 05:44:31.200 [WARNING] transceiver.py:257 (MS@172.18.36.22:6700) RX TRXD message (fn=563 tn=7 pwr=0), but transceiver is not running => dropping...
2026-02-19 05:44:31.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.36.20:5700) Recv SETPOWER cmd
2026-02-19 05:44:31.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.36.20:5700/1) Recv SETPOWER cmd
2026-02-19 05:44:31.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.36.20:5700/2) Recv SETPOWER cmd
2026-02-19 05:44:31.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.36.20:5700/3) Recv SETPOWER cmd
2026-02-19 05:44:31.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:31.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:31.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:31.211 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:31.211 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:31.211 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:44:31.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:36.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:36.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:36.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:36.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:36.209 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:36.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:36.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:36.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:36.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:36.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:36.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:44:36.214 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:44:36.214 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:44:36.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:36.214 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:36.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:36.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:44:36.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:36.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:44:36.215 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:44:36.215 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:44:36.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:36.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:36.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:36.215 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:44:36.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:36.215 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:44:36.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:44:36.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:44:36.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:36.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:36.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:36.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:44:36.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:36.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:44:36.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:44:36.217 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:44:36.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:44:36.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:36.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:36.218 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:36.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:41.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:41.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:41.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:41.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:41.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:41.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:41.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:41.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:41.230 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.36.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:41.230 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.36.20:5700) Recv SETFORMAT cmd
2026-02-19 05:44:41.230 [INFO] ctrl_if_trx.py:201 (BTS@172.18.36.20:5700) TRXD header version 1 -> 1
2026-02-19 05:44:41.231 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.36.20:5700/1) Recv RXTUNE cmd
2026-02-19 05:44:41.231 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.36.20:5700/1) Recv TXTUNE cmd
2026-02-19 05:44:41.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:41.231 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.36.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:41.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:41.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.36.20:5700/1) Recv NOMTXPOWER cmd
2026-02-19 05:44:41.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.36.20:5700/1) Recv SETFORMAT cmd
2026-02-19 05:44:41.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.36.20:5700/1) TRXD header version 1 -> 1
2026-02-19 05:44:41.231 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.36.20:5700/2) Recv RXTUNE cmd
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.36.20:5700/2) Recv TXTUNE cmd
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:41.232 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.36.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.36.20:5700/2) Recv RFMUTE cmd
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.36.20:5700/2) Recv NOMTXPOWER cmd
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.36.20:5700/2) Recv SETFORMAT cmd
2026-02-19 05:44:41.232 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.36.20:5700/2) TRXD header version 1 -> 1
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.36.20:5700/3) Recv RXTUNE cmd
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.36.20:5700/3) Recv TXTUNE cmd
2026-02-19 05:44:41.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:41.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.36.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-02-19 05:44:41.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.36.20:5700/3) Recv RFMUTE cmd
2026-02-19 05:44:41.233 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.36.20:5700/3) Recv NOMTXPOWER cmd
2026-02-19 05:44:41.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.36.20:5700/3) Recv SETFORMAT cmd
2026-02-19 05:44:41.233 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.36.20:5700/3) TRXD header version 1 -> 1
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.36.20:5700) Recv RXTUNE cmd
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETTSC
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETTSC
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETTSC
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.36.20:5700) Recv TXTUNE cmd
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETRXGAIN
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETRXGAIN
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETTSC
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETRXGAIN
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.36.20:5700) Recv NOMTXPOWER cmd
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.36.20:5700) Recv POWERON CMD
2026-02-19 05:44:41.234 [INFO] ctrl_if_trx.py:109 (BTS@172.18.36.20:5700) Starting transceiver...
2026-02-19 05:44:41.234 [INFO] transceiver.py:243 Starting clock generator
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETRXGAIN
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:41.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.36.20:5700/1) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.36.20:5700/1) Recv RFMUTE cmd
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.36.20:5700) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.36.20:5700) Recv RFMUTE cmd
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.36.20:5700) Recv POWEROFF cmd
2026-02-19 05:44:41.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.36.20:5700) Stopping transceiver...
2026-02-19 05:44:41.235 [INFO] transceiver.py:246 Stopping clock generator
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.36.20:5700/2) Ignore CMD SETSLOT
2026-02-19 05:44:41.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.36.20:5700/3) Ignore CMD SETSLOT